Patents by Inventor Ebin Liao

Ebin Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210005515
    Abstract: A semiconductor component includes a substrate having an opening. The semiconductor component further includes a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T1 at a first end of the opening, and a thickness T2 at a second end of the opening, and R1 is a ratio of T1 to T2. The semiconductor component further includes a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T3 at the first end of the opening, a thickness T4 at the second end of the opening, R2 is a ratio of T3 to T4, and R1 is greater than R2.
    Type: Application
    Filed: September 15, 2020
    Publication date: January 7, 2021
    Inventors: Chen-Hua YU, Cheng-Hung CHANG, Ebin LIAO, Chia-Lin YU, Hsiang-Yi WANG, Chun Hua CHANG, Li-Hsien HUANG, Darryl KUO, Tsang-Jiuh WU, Wen-Chih CHIOU
  • Patent number: 10872874
    Abstract: A bonding apparatus includes a chuck and a bonding head. The chuck is configured to carry a plurality of substrates to be bonded. The bonding head has a cavity facing the chuck and includes a divider, at least one pneumatic component and a diaphragm. The divider is disposed in the cavity and dividing the cavity into a plurality of compartments. The at least one pneumatic component is disposed in at least one of the compartments. The diaphragm covers the cavity and is disposed between the at least one pneumatic component and the chuck.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: December 22, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Ebin Liao, Wen-Chih Chiou
  • Patent number: 10867831
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Publication number: 20200373185
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Application
    Filed: August 14, 2020
    Publication date: November 26, 2020
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Patent number: 10784162
    Abstract: A method of making a semiconductor component includes etching a substrate to define an opening. The method further includes depositing a first dielectric liner in the opening, wherein the first dielectric liner has a first stress. The method further includes depositing a second dielectric liner over the first dielectric liner, wherein the second dielectric liner has a second stress, and a direction of the first stress is opposite a direction of the second stress. The method further includes depositing a conductive material over the second dielectric liner.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: September 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua Yu, Cheng-Hung Chang, Ebin Liao, Chia-Lin Yu, Hsiang-Yi Wang, Chun Hua Chang, Li-Hsien Huang, Darryl Kuo, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Publication number: 20200294966
    Abstract: The disclosure provides a method of forming a package structure, and the method includes: bonding a die to a wafer; performing a thinning process on the die, wherein the die has a first total thickness variation (TTV) after performing the thinning process; forming a dielectric layer on the wafer to cover sidewalls and a top surface the die; performing a first removal process to remove a first portion of the dielectric layer and expose the top surface of the die; and performing a second removal process to remove a second portion of the dielectric layer and a portion of the die, wherein after performing the second removal process, the die has a second TTV less than the first TTV.
    Type: Application
    Filed: May 31, 2020
    Publication date: September 17, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsiu Chen, Ebin Liao, Hong-Ye Shih, Wen-Chih Chiou, Jia-Ling Ko
  • Patent number: 10748803
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: August 18, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Patent number: 10727294
    Abstract: Semiconductor devices, methods of manufacture thereof, and capacitors are disclosed. In some embodiments, a semiconductor device includes a first capacitor and a protection device coupled in series with the first capacitor. A second capacitor is coupled in parallel with the first capacitor and the protection device.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Wen-Chih Chiou, Shin-Puu Jeng, Ebin Liao
  • Patent number: 10672737
    Abstract: Provided is a 3DIC structure includes a wafer, a die and a dielectric layer. The die is over and bonded to the wafer. The dielectric layer is over the wafer and aside the die, covering sidewalls of the die. A total thickness variation (TTV) of the die is less than 0.8 ?m.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsiu Chen, Ebin Liao, Hong-Ye Shih, Wen-Chih Chiou, Jia-Ling Ko
  • Publication number: 20190267347
    Abstract: A bonding apparatus includes a chuck and a bonding head. The chuck is configured to carry a plurality of substrates to be bonded. The bonding head has a cavity facing the chuck and includes a divider, at least one pneumatic component and a diaphragm. The divider is disposed in the cavity and dividing the cavity into a plurality of compartments. The at least one pneumatic component is disposed in at least one of the compartments. The diaphragm covers the cavity and is disposed between the at least one pneumatic component and the chuck.
    Type: Application
    Filed: August 23, 2018
    Publication date: August 29, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Hua Yu, Ebin Liao, Wen-Chih Chiou
  • Publication number: 20190244851
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 8, 2019
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Publication number: 20190139935
    Abstract: Provided is a 3DIC structure includes a wafer, a die and a dielectric layer. The die is over and bonded to the wafer. The dielectric layer is over the wafer and aside the die, covering sidewalls of the die. A total thickness variation (TTV) of the die is less than 0.8 ?m.
    Type: Application
    Filed: January 19, 2018
    Publication date: May 9, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Hsiu Chen, Ebin Liao, Hong-Ye Shih, Wen-Chih Chiou, Jia-Ling Ko
  • Patent number: 10269611
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Publication number: 20190067107
    Abstract: A method of making a semiconductor component includes etching a substrate to define an opening. The method further includes depositing a first dielectric liner in the opening, wherein the first dielectric liner has a first stress. The method further includes depositing a second dielectric liner over the first dielectric liner, wherein the second dielectric liner has a second stress, and a direction of the first stress is opposite a direction of the second stress. The method further includes depositing a conductive material over the second dielectric liner.
    Type: Application
    Filed: October 23, 2018
    Publication date: February 28, 2019
    Inventors: Chen-Hua YU, Cheng-Hung CHANG, Ebin LIAO, Chia-Lin YU, Hsiang-Yi WANG, Chun Hua CHANG, Li-Hsien HUANG, Darryl KUO, Tsang-Jiuh WU, Wen-Chih CHIOU
  • Patent number: 10115634
    Abstract: A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: October 30, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Hua Yu, Cheng-Hung Chang, Ebin Liao, Chia-Lin Yu, Hsiang-Yi Wang, Chun Hua Chang, Li-Hsien Huang, Darryl Kuo, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Publication number: 20180175137
    Abstract: Semiconductor devices, methods of manufacture thereof, and capacitors are disclosed. In some embodiments, a semiconductor device includes a first capacitor and a protection device coupled in series with the first capacitor. A second capacitor is coupled in parallel with the first capacitor and the protection device.
    Type: Application
    Filed: January 30, 2018
    Publication date: June 21, 2018
    Inventors: Wen-Chih Chiou, Shin-Puu Jeng, Ebin Liao
  • Patent number: 9899467
    Abstract: Semiconductor devices, methods of manufacture thereof, and capacitors are disclosed. In some embodiments, a semiconductor device includes a first capacitor and a protection device coupled in series with the first capacitor. A second capacitor is coupled in parallel with the first capacitor and the protection device.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: February 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chih Chiou, Shin-Puu Jeng, Ebin Liao
  • Patent number: 9847256
    Abstract: A device including a first dielectric layer on a semiconductor substrate, a gate electrode formed in the first dielectric layer, and a through-substrate via (TSV) structure penetrating the first dielectric layer and extending into the semiconductor substrate. The TSV structure includes a conductive layer, a diffusion barrier layer surrounding the conductive layer and an isolation layer surrounding the diffusion barrier layer. A capping layer including cobalt is formed on the top surface of the conductive layer of the TSV structure.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: December 19, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Chi Lin, Yen-Hung Chen, Yin-Hua Chen, Ebin Liao, Ku-Feng Yang, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Publication number: 20170084489
    Abstract: A device including a first dielectric layer on a semiconductor substrate, a gate electrode formed in the first dielectric layer, and a through-substrate via (TSV) structure penetrating the first dielectric layer and extending into the semiconductor substrate. The TSV structure includes a conductive layer, a diffusion barrier layer surrounding the conductive layer and an isolation layer surrounding the diffusion barrier layer. A capping layer including cobalt is formed on the top surface of the conductive layer of the TSV structure.
    Type: Application
    Filed: December 5, 2016
    Publication date: March 23, 2017
    Inventors: Yung-Chi Lin, Yen-Hung Chen, Yin-Hua Chen, Ebin Liao, Ku-Feng Yang, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Patent number: 9514986
    Abstract: A device including a first dielectric layer on a semiconductor substrate, a gate electrode formed in the first dielectric layer, and a through-substrate via (TSV) structure penetrating the first dielectric layer and extending into the semiconductor substrate. The TSV structure includes a conductive layer, a diffusion barrier layer surrounding the conductive layer and an isolation layer surrounding the diffusion barrier layer. A capping layer including cobalt is formed on the top surface of the conductive layer of the TSV structure.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: December 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Chi Lin, Yen-Hung Chen, Yin-Hua Chen, Ebin Liao, Ku-Feng Yang, Tsang-Jiuh Wu, Wen-Chih Chiou