Abstract: The invention relates to a process for the multi-stage production of diffusion-soldered joints for power components with semiconductor chips, the melting points of diffusion-soldering alloys and diffusion-soldered joints being staggered in such a manner that a first melting point of the first diffusion-soldering alloy is lower than a second melting point of the second diffusion-soldering alloy, and the second melting point being lower than a third melting point of a first diffusion-soldered joint of the first diffusion-soldering alloy.

Abstract: A semiconductor device includes semiconductor device components, an adhesion promoter structure and a plastic housing composition. The semiconductor device components are embedded in the plastic housing composition with the adhesion promoter structure being disposed between the device components and the housing composition. The adhesion promoter structure includes first and second adhesion promoter layers. The first layer includes metal oxides. The metal oxides being silicates of a reactive compound composed of oxygen and organometallic molecules. The second layer includes at least one polymer.

Abstract: A method of fabricating a semiconductor device. One embodiment provides a metal carrier. A semiconductor chip is provided. A porous layer is produced at a surface of at least one of the carrier and the semiconductor chip. The semiconductor chip is placed on the carrier. The resulting structure is heated until the semiconductor chip is attached to the carrier.

Abstract: An electrically conductive body, which in particular includes a metal and/or an alloy and/or a semiconductor, includes an adhesion promoter layer provided on at least one surface of the electrically conductive body. The adhesion promoter layer includes a metal, in particular zinc, and a porous, in particular platelike and/or needle-shaped and/or sponge-like, surface structure.

Abstract: The invention relates to a soft solder which includes the alloying constituents bismuth and two of the three metals silver, copper and nickel, wherein bismuth forms between 20% by weight and 99.8% by weight of the alloy, silver forms between 0.1% by weight and 50% by weight of the alloy, copper forms between 0.1% by weight and 30% by weight of the alloy and nickel forms between 0.1% by weight and 30% by weight of the alloy.

Abstract: A semiconductor package includes a leadframe defining a die pad, a chip electrically coupled to the die pad, encapsulation material covering the chip and the die pad, and a plurality of lead ends exposed relative to the encapsulation material and configured for electrical communication with the chip, and a nitrogen-containing hydrocarbon coating disposed over at least the lead ends of the leadframe, where the hydrocarbon coating is free of metal particles.

Abstract: A semiconductor chip arrangement and method is disclosed. In one embodiment, the invention provides a method for providing a semiconductor chip arrangement including providing a semiconductor chip having a first connecting area, and providing a chip carrier having a concave shaped section formed in a second connecting area. A connecting mechanism is provided between the first connecting area and the second connecting area and pressing the semiconductor chip onto the chip carrier such that the connecting mechanism positively locks the first connecting area to the concave shaped section of the second connecting area.

Abstract: A semiconductor package includes a semiconductor component including a circuit carrier with a plurality of inner contact pads, a semiconductor chip, and a plurality of electrical connections. An adhesion promotion layer is disposed on at least areas of the semiconductor component and a plastic encapsulation material encapsulates at least the semiconductor chip, the plurality of electrical connections and the plurality of the inner contact pads. Surface regions of the semiconductor component are selectively activated.

Abstract: A semiconductor device includes a carrier, a chip including a first face having a contact area, where the chip is attached to the carrier such that the contact area faces away from the carrier, a copper connector configured for attachment to the contact area, and a solder material configured to couple the copper connector to the contact area.

Abstract: A method of making an integrated circuit including a composition of matter for electrodepositing of chromium is disclosed. One embodiment provides a bath having a solution of a chromium salt in a substantially anhydrous organic solvent, to uses of certain chromium salts for electrodepositing and to processes for electrodepositing chromium.

Abstract: A method of making an integrated circuit including composition of matter for electrodepositing of aluminium is disclosed. One embodiment includes a bath having a solution of selected aluminium salts in a substantially anhydrous organic solvent, to uses of certain aluminium salts for electrodepositing and to processes for electrodepositing aluminium.

Abstract: A method of producing a metal article intended for at least partially coating with a substance, which includes a metal solder, a plastic, a glass, or a ceramic. The metal article itself may include, in particular, connecting, supporting, or conducting components for an electronic component. The metal article has macroscopically smooth surface portions and a plurality of multiply curved nanopores in the region of at least one surface portion.

Abstract: A metal article intended for at least partially coating with a substance, which includes a metal solder, a plastic, a glass, or a ceramic. The metal article itself may include, in particular, connecting, supporting, or conducting components for an electronic component. The metal article has macroscopically smooth surface portions and a multiplicity of multiply curved nanopores in the region of at least one surface portion.

Abstract: A diffusion solder position between two parts has intermetallic phases formed by two solder components. Nanoparticles of a filler material are three-dimensionally distributed in its diffusion region in addition to the intermetallic phases. Furthermore, a process for producing the diffusion solder position and for producing an electronic power component, which has a plurality of diffusion solder positions, is provided.

Abstract: The invention relates to a process for the multi-stage production of diffusion-soldered joints for power components with semiconductor chips, the melting points of diffusion-soldering alloys and diffusion-soldered joints being staggered in such a manner that a first melting point of the first diffusion-soldering alloy is lower than a second melting point of the second diffusion-soldering alloy, and the second melting point being lower than a third melting point of a first diffusion-soldered joint of the first diffusion-soldering alloy.

Abstract: A semiconductor device includes semiconductor device components, an adhesion promoter structure and a plastic housing composition. The semiconductor device components are embedded in the plastic housing composition with the adhesion promoter structure being disposed between the device components and the housing composition. The adhesion promoter structure includes first and second adhesion promoter layers. The first layer includes metal oxides. The metal oxides being silicates of a reactive compound composed of oxygen and organometallic molecules. The second layer includes at least one polymer.

Abstract: A method for the planar joining of components of semiconductor devices involves coating the components with diffusion materials on their upper sides and rear sides, respectively. Subsequently, the components to be joined one on the other are introduced into a reducing atmosphere. The components are aligned and a compressive pressure is exerted on the aligned components. While heating up the components to be joined in the reducing atmosphere to a diffusion joining temperature, isothermal solidification takes place, the diffusion joining temperature lying below the melting temperature of the forming diffusion joint of the joined material.

Abstract: An electrically conductive body, which in particular includes a metal and/or an alloy and/or a semiconductor, includes an adhesion promoter layer provided on at least one surface of the electrically conductive body. The adhesion promoter layer includes a metal, in particular zinc, and a porous, in particular platelike and/or needle-shaped and/or sponge-like, surface structure.

Abstract: A semiconductor chip arrangement and method is disclosed. In one embodiment, the invention provides a method for providing a semiconductor chip arrangement including providing a semiconductor chip having a first connecting area, and providing a chip carrier having a concave shaped section formed in a second connecting area. A connecting mechanism is provided between the first connecting area and the second connecting area and pressing the semiconductor chip onto the chip carrier such that the connecting mechanism positively locks the first connecting area to the concave shaped section of the second connecting area.

Abstract: A metal article intended for at least partially coating with a substance, which includes a metal solder, a plastic, a glass, or a ceramic. The metal article itself may include, in particular, connecting, supporting, or conducting components for an electronic component. The metal article has macroscopically smooth surface portions and a multiplicity of multiply curved nanopores in the region of at least one surface portion.