Abstract: Devices and methods for patterning the vertical solid state devices are provided. In some examples, a method of fabricating micro devices comprising forming device layers on a substrate, forming a first masking layer on a top layer of the device layers, forming a second masking layer on the first masking layer; and etching the device layers using the first and second masking layers to pattern the device layers.

Abstract: This disclosure relates to the process of alignment using at least an alignment mark or structure that exists on the system substrate (or donor substrate) and at least an alignment mark is associated with microdevices. The alignment marks used to align the microdevices are created by changing optical properties of the structure. The disclosure further outlines different alignment mark structures.

Abstract: The present invention discloses a different option electronic devices with their structure so layers that include doping, function, ohmic, conductive, planarization and passivation layer. The invention also discloses configuration of connections of top and bottom sides comprising isolated structures, related electrodes and height configuration of isolated structures.

Abstract: This disclosure relates to the process of etching and treatment of side walls while processing microdevices. One aspect is to fill the device wall indentation with a polymer. The disclosure relates to a method and device with its structure to the process of etching and treatment of sidewalls. The methods of etching, coating, and curing are used.

Abstract: The present disclosure relates to a solid state micro device structure that has a microdevice formed on a substrate, with p and n doped layers, active layers between at least the two doped layers, pads coupled to each doped layer, and wherein the n-doped layer is modulated to have a lower conductivity towards an edge of the device. The invention further involves, dielectric layer, conductive layer, passivation layer and MIS structure.

Abstract: The present disclosure relates to development of microdevices on a substrate that can be released and transferred to a system substrate. The disclosure further relates to methods to integrate anchors to hold a microdevice to a substrate. The microdevices are in different configurations with respect to anchors, release layers, buffers layers and substrate.

Abstract: This disclosure is related to compensation of micro devices based on cartridge information.

Abstract: The present disclosure deals with a method of integrating microdevices on a backplane using bonded pads. The process has a substrate having microdevices with bonding of selective microdevices through connecting pads on the microdevices and corresponding pads on the backplane, forming anchors and leaving the bonded selective set of microdevices on the backplane by separating the micro device substrate.

Abstract: A vertical solid state device comprising: a connection pad; and side walls comprising a metal-insulator-semiconductor (MIS) structure; wherein a gate of the MIS structure is shorted to at least one contact of the vertical solid state device and a threshold voltage (VT) of the MIS structure is adjusted to increase the efficiency of the device.

Abstract: The present invention discloses a different option electronic devices with their structure so layers that include doping, function, ohmic, conductive, planarization and passivation layer. The invention also discloses configuration of connections of top and bottom sides comprising isolated structures, related electrodes and height configuration of isolated structures.

Abstract: What is disclosed is structures and methods of integrating micro devices into system substrate. Further, the disclosure, also relates to methods and structures for enhancing the bonding process of micro-devices into a substrate. More specifically, it relates to expanding the micro device area or bonding area of micro devices.

Abstract: In a micro-device integration process, a donor substrate is provided on which to conduct the initial manufacturing and pixelation steps to define the micro devices, including functional, e.g. light emitting layers, sandwiched between top and bottom conductive layers. The microdevices are then transferred to a system substrate for finalizing and electronic control integration. The transfer may be facilitated by various means, including providing a continuous light emitting functional layer, breakable anchors on the donor substrates, temporary intermediate substrates enabling a thermal transfer technique, or temporary intermediate substrates with a breakable substrate bonding layer.

Abstract: This disclosure relates to the process of etching and treatment of side walls while processing microdevices. One aspect is to fill the device wall indentation with a polymer. The disclosure relates to a method and device with its structure to the process of etching and treatment of sidewalls. The methods of etching, coating, and curing are used.

Abstract: This disclosure is related to compensation of micro devices based on cartridge information.

Abstract: This disclosure is related to arranging micro devices in the donor substrate by either patterning or population so that there is no interfering with non-receiving pads and the non-interfering area in the donor substrate is maximized. This enables the transfer of micro devices to a receiver substrate with fewer steps.

Abstract: In an aspect, a method of integrating micro devices on a backplane includes; providing a micro device substrate comprising one or more micro devices; bonding a selective set of the micro devices from the substrate to the backplane by connecting pads on the micro devices and corresponding pads on the backplane; and leaving the bonded selective set of micro devices on the backplane by separating the micro device substrate.

Abstract: The present disclosure deals with a method of integrating microdevices on a backplane using bonded pads. The process has a substrate having microdevices with bonding of selective microdevices through connecting pads on the microdevices and corresponding pads on the backplane, forming anchors and leaving the bonded selective set of microdevices on the backplane by separating the micro device substrate.

Abstract: Methods and structures are disclosed for highly efficient vertical devices. The vertical device comprising a plurality of planar active layers formed on a substrate, at least one of a top layer of the plurality of the layers is formed as a plurality of nano-pillars and a passivation layer formed on a space between the plurality of the nanopillars.

Abstract: Methods and structures are disclosed for highly efficient vertical devices. The vertical device comprising a plurality of planar active layers formed on a substrate, at least one of a top layer of the plurality of the layers is formed as a plurality of nano-pillars and a passivation layer formed on a space between the plurality of the nanopillars.

Abstract: In a micro-device integration process, a donor substrate is provided on which to conduct the initial manufacturing and pixelation steps to define the micro devices, including functional, e.g. light emitting layers, sandwiched between top and bottom conductive layers. The microdevices are then transferred to a system substrate for finalizing and electronic control integration. The transfer may be facilitated by various means, including providing a continuous light emitting functional layer, breakable anchors on the donor substrates, temporary intermediate substrates enabling a thermal transfer technique, or temporary intermediate substrates with a breakable substrate bonding layer.