Patents by Inventor Eiji Makino

Eiji Makino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8599305
    Abstract: A solid-state imaging device having a pixel array section in which pixels including photoelectric conversion elements are arranged in a matrix form, and sweeping out unnecessary charges by setting a predetermined number, two or more, of adjacent rows or a predetermined number, two or more, of adjacent columns, in the pixel array section, to a single group, and by applying a shutter pulse in units of groups before storing signal charges, and sequentially reading the signal charges in the units of groups. In the solid-state imaging device, a pre-shutter pulse is applied to pixels belonging to at least a single row or a single column within a succeeding group and adjacent to a preceding group, prior to the shutter pulse, before a reading timing for the preceding group, to sweep out unnecessary charges stored in the pixels.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: December 3, 2013
    Assignee: Sony Corporation
    Inventors: Takahiro Abiru, Ryoji Suzuki, Eiji Makino, Takayuki Usui
  • Patent number: 8558932
    Abstract: A MOS type solid state imaging device having unit pixels, each having a photodiode a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: October 15, 2013
    Assignee: Sony Corporation
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 8451355
    Abstract: An image sensor that supplies a control signal together with an address specifying each of a plurality of pixels arrayed in a pixel array with predetermined rows and columns to thereby perform an electronic shutter operation on a pixel corresponding to the address or perform reading of a pixel signal of a pixel corresponding to the address, is disclosed. The sensor includes: address generating means for generating a shutter row address specifying a row of pixels, on which an electronic shutter operation is to be performed within one horizontal period, among the pixels arrayed in the pixel array and a read row address specifying a row of pixels on which reading of a pixel signal is to be performed within the same one horizontal period; first storage means for storing the shutter row address; and second storage means for storing the read row address.
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: May 28, 2013
    Assignee: Sony Corporation
    Inventor: Eiji Makino
  • Patent number: 8416222
    Abstract: Disclosed herein is a driving apparatus for driving a pixel, including a first pMOS type transistor connected to a first potential a first nMOS type transistor connected in series to the first pMOS type transistor and connected to a second potential; and a control section configured to control the first pMOS type transistor and the first nMOS type transistor individually using a first on-signal for controlling the timing of turning on of one of the first pMOS type transistor and the first nMOS type transistor; a signal of a potential at a node between the first pMOS type transistor and the first nMOS type transistor being inputted as a driving signal for driving the pixel to the pixel.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: April 9, 2013
    Assignee: Sony Corporation
    Inventors: Youji Sakioka, Eiji Makino
  • Patent number: 8247350
    Abstract: The present invention relates to an adjuvant composition characterized by containing the following (A) and (B): (A) Sodium dialkylsulfosuccinate and polyoxyethylene alkyl ether, the total content being 45% to 85% by mass; (B) 5 to 40% by mass of component for pour-point depressant, and the adjuvant composition can uniformly adhere agrochemical active ingredients to crops, has an effect to stabilize the agrochemical efficacy and particularly exerts a pronounced effect when used in drift-reducing spraying.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: August 21, 2012
    Assignees: National Agriculture And Food Research Organization, Nippon Kayaku Kabushiki Kaisha
    Inventors: Kazuteru Ogawa, Yasuhito Kato, Sumihiko Miyahara, Eiji Makino, Yoshihiko Usui
  • Publication number: 20120105698
    Abstract: A MOS type solid state imaging device having unit pixels, each having a photodiode a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Application
    Filed: November 14, 2011
    Publication date: May 3, 2012
    Applicant: SONY CORPORATION
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Publication number: 20120008027
    Abstract: A solid-state imaging device includes: a pixel section wherein pixels including photoelectric conversion devices are arranged in a matrix; and a pixel driving section including a row selection circuit which controls the pixels to perform an electronic shutter operation and readout of the pixel section. The row selection circuit has a function of selecting a readout row from which a signal is read out and a shutter row on which reset is performed by discharging charge accumulated in the photoelectric conversion devices, in accordance with address and control signals. The row selection circuit can set, in accordance with the address and control signals, in the pixels of the selected row, at least a readout state, a discharge state where a smaller amount of the charge accumulated in the photoelectric conversion devices than the reset is discharged, an electronic shutter state, and a charge state where the charge is accumulated in the photoelectric conversion devices.
    Type: Application
    Filed: June 13, 2011
    Publication date: January 12, 2012
    Applicant: Sony Corporation
    Inventors: Eiji Makino, Tetsuji Nakaseko, Ryoji Eki, Youji Sakioka
  • Patent number: 8072528
    Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: December 6, 2011
    Assignee: Sony Corporation
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Publication number: 20110292262
    Abstract: A solid-state imaging device having a pixel array section in which pixels including photoelectric conversion elements are arranged in a matrix form, and sweeping out unnecessary charges by setting a predetermined number, two or more, of adjacent rows or a predetermined number, two or more, of adjacent columns, in the pixel array section, to a single group, and by applying a shutter pulse in units of groups before storing signal charges, and sequentially reading the signal charges in the units of groups. In the solid-state imaging device, a pre-shutter pulse is applied to pixels belonging to at least a single row or a single column within a succeeding group and adjacent to a preceding group, prior to the shutter pulse, before a reading timing for the preceding group, to sweep out unnecessary charges stored in the pixels.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Applicant: SONY CORPORATION
    Inventors: Takahiro Abiru, Ryoji Suzuki, Eiji Makino, Takayuki Usui
  • Patent number: 8031246
    Abstract: An image sensor that has a pixel array section in which pixels are arrayed in a two-dimensional manner in vertical and horizontal directions and that controls an exposure time of each pixel in a rolling shutter method is disclosed. The sensor includes control means for determining an electronic shutter occurrence number within one horizontal scanning period, which is the number of rows where electronic shutters are simultaneously performed in one horizontal scanning period, by an operation based on an address addition amount (P1, P2, P3, . . . , PN) when a vertical address movement amount of the pixel array section for every one horizontal scanning period in an exposure regulation shutter, which is an electronic shutter for regulating exposure, executed corresponding to electric charge reading in each pixel is expressed as repetition of the address addition amount (P1, P2, P3, . . . , PN).
    Type: Grant
    Filed: May 13, 2008
    Date of Patent: October 4, 2011
    Assignee: Sony Corporation
    Inventors: Eiji Makino, Takahiro Abiru, Ryoji Suzuki, Masahiro Itoh
  • Patent number: 8013931
    Abstract: There is provided a solid-state imaging device having a pixel array section in which pixels including photoelectric conversion elements are arranged in a matrix form, and sweeping out unnecessary charges by setting a predetermined number, two or more, of adjacent rows or a predetermined number, two or more, of adjacent columns, in the pixel array section, to a single group, and by applying a shutter pulse in units of groups before storing signal charges, and sequentially reading the signal charges in the units of groups. In the solid-state imaging device, a pre-shutter pulse is applied to pixels belonging to at least a single row or a single column within a succeeding group and adjacent to a preceding group, prior to the shutter pulse, before a reading timing for the preceding group, to sweep out unnecessary charges stored in the pixels.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: September 6, 2011
    Assignee: Sony Corporation
    Inventors: Takahiro Abiru, Ryoji Suzuki, Eiji Makino, Takayuki Usui
  • Publication number: 20110205415
    Abstract: An image sensor that has a pixel array section in which pixels are arrayed in a two-dimensional manner in vertical and horizontal directions and that controls an exposure time of each pixel in a rolling shutter method is disclosed. The sensor includes control means for determining an electronic shutter occurrence number within one horizontal scanning period, which is the number of rows where electronic shutters are simultaneously performed in one horizontal scanning period, by an operation based on an address addition amount (P1, P2, P3, . . . , PN) when a vertical address movement amount of the pixel array section for every one horizontal scanning period in an exposure regulation shutter, which is an electronic shutter for regulating exposure, executed corresponding to electric charge reading in each pixel is expressed as repetition of the address addition amount (P1, P2, P3, . . . , PN).
    Type: Application
    Filed: May 4, 2011
    Publication date: August 25, 2011
    Applicant: SONY CORPORATION
    Inventors: Eiji Makino, Takahiro Abiru, Ryoji Suzuki, Masahiro Itoh
  • Publication number: 20110194001
    Abstract: An image signal processing device includes: a color mixture correction circuit correcting color mixture among pixels arranged in the row and column directions, having plural light receiving units which perform photoelectric conversion and including filters dividing light incident on respective plural light receiving units into plural color components, wherein the color mixture correction circuit performs correction processing to a signal value of a target pixel of color mixture correction by associating respective signal values of neighboring pixels adjacent to the target pixel of color mixture correction with correction parameters unique to an address of each signal.
    Type: Application
    Filed: January 14, 2011
    Publication date: August 11, 2011
    Applicant: Sony Corporaion
    Inventors: Ryoji Eki, Eiji Makino
  • Publication number: 20100141796
    Abstract: A solid-state imaging device includes: an imaging unit taking a subject image focused by an imaging optical system; a digital signal processing unit generating image data of the subject image taken by the imaging unit and luminance data thereof; an input/output unit inputting and outputting data; a focus evaluation value generating unit generating a focus evaluation value of the subject image based on the luminance data outputted from the digital signal processing unit and outputting the focus evaluation value from the input/output unit; and an imaging drive unit starting an imaging operation by the imaging unit when an imaging instruction signal is inputted from the input/output unit, and outputting an imaging-end timing signal from the input/output unit when the imaging operation is completed.
    Type: Application
    Filed: November 17, 2009
    Publication date: June 10, 2010
    Applicant: Sony Corporation
    Inventors: Tsutomu Haruta, Eiji Makino, Takeshi Yamaguchi, Shinsuke Shimomoto
  • Publication number: 20100099569
    Abstract: The present invention relates to an adjuvant composition characterized by containing the following (A) and (B): (A) Sodium dialkylsulfosuccinate and polyoxyethylene alkyl ether, the total content being 45% to 85% by mass; (B) 5 to 40% by mass of component for pour-point depressant, and the adjuvant composition can uniformly adhere agrochemical active ingredients to crops, has an effect to stabilize the agrochemical efficacy and particularly exerts a pronounced effect when used in drift-reducing spraying.
    Type: Application
    Filed: March 6, 2008
    Publication date: April 22, 2010
    Applicants: National Agriculture and Food Research Organizatio n, Nippon Kayaku Kabushiki Kaisha
    Inventors: Kazuteru Ogawa, Yasuhito Kato, Sumihiko Miyahara, Eiji Makino, Yoshihiko Usui
  • Publication number: 20100073536
    Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Application
    Filed: November 30, 2009
    Publication date: March 25, 2010
    Applicant: SONY CORPORATION
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 7626625
    Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: December 1, 2009
    Assignee: Sony Corporation
    Inventors: Tetsuo Nomoto, Eiji Makino, Keiji Mabuchi, Tsutomu Haruta, Shinjiro Kameda
  • Patent number: 7508975
    Abstract: An image sensor is disclosed, which includes: a pixel unit having a plurality of pixels each outputting incident light as a pixel signal; an amplifier amplifying the pixel signal output from the pixel unit; and a defective pixel detection circuit performing a defective pixel detection on signals output from the amplifier, wherein the defective pixel detection circuit adjusts the detection accuracy of the defective pixel detection in accordance with an exposure condition of the pixel unit.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: March 24, 2009
    Assignee: Sony Corporation
    Inventors: Daisaku Izumi, Tsutomu Haruta, Eiji Makino
  • Publication number: 20080284250
    Abstract: A power supply device that switches one of a first power supply, a second power supply, and a third power supply, all of which supply power to an auxiliary device, to a transfer gate in a CMOS image sensor having a photodiode and outputs the corresponding power to the transfer gate is disclosed. The device includes: a first transistor driven by the second power supply and outputting power of the second power supply to the transfer gate; a second transistor driven by the second power supply and outputting power of the first power supply to the transfer gate; a third transistor driven by the third power supply and outputting power of the third power supply to the transfer gate; and a fourth transistor located before the second transistor, driven by the first power supply, and outputting power of the first power supply to a source of the second transistor.
    Type: Application
    Filed: April 15, 2008
    Publication date: November 20, 2008
    Inventors: Eiji Makino, Youji Sakioka, Shizunori Matsumoto
  • Publication number: 20080284903
    Abstract: An image sensor includes a solid-state image pickup device, an optical system, and a flash. The solid-state image pickup device has an electronic shutter function of outputting accumulated signal charges at a timing corresponding to a shutter speed. The optical system collects incident light to an image pickup area of the solid-state image pickup device. The flash irradiates light to an object to be photographed by the solid-state image pickup device. The solid-state image pickup device includes a pulse generator circuit for generating one or more of an electronic shutter pulse for controlling an accumulation time of signal charges by using the electronic shutter function, an optical system movement pulse for controlling movement of the optical system, and a flash pulse for controlling an emission timing of the flash.
    Type: Application
    Filed: May 14, 2008
    Publication date: November 20, 2008
    Applicant: Sony Corporation
    Inventors: Tsutomu Haruta, Eiji Makino, Takeshi Yamaguchi, Tatsuya Matsumura