Abstract: Disclosed herein is a driving apparatus for driving a pixel, including a first pMOS type transistor connected to a first potential a first nMOS type transistor connected in series to the first pMOS type transistor and connected to a second potential; and a control section configured to control the first pMOS type transistor and the first nMOS type transistor individually using a first on-signal for controlling the timing of turning on of one of the first pMOS type transistor and the first nMOS type transistor; a signal of a potential at a node between the first pMOS type transistor and the first nMOS type transistor being inputted as a driving signal for driving the pixel to the pixel.

Abstract: An image sensor that supplies a control signal together with an address specifying each of a plurality of pixels arrayed in a pixel array with predetermined rows and columns to thereby perform an electronic shutter operation on a pixel corresponding to the address or perform reading of a pixel signal of a pixel corresponding to the address, is disclosed. The sensor includes: address generating means for generating a shutter row address specifying a row of pixels, on which an electronic shutter operation is to be performed within one horizontal period, among the pixels arrayed in the pixel array and a read row address specifying a row of pixels on which reading of a pixel signal is to be performed within the same one horizontal period; first storage means for storing the shutter row address; and second storage means for storing the read row address.

Abstract: An image sensor that has a pixel array section in which pixels are arrayed in a two-dimensional manner in vertical and horizontal directions and that controls an exposure time of each pixel in a rolling shutter method is disclosed. The sensor includes control means for determining an electronic shutter occurrence number within one horizontal scanning period, which is the number of rows where electronic shutters are simultaneously performed in one horizontal scanning period, by an operation based on an address addition amount (P1, P2, P3, . . . , PN) when a vertical address movement amount of the pixel array section for every one horizontal scanning period in an exposure regulation shutter, which is an electronic shutter for regulating exposure, executed corresponding to electric charge reading in each pixel is expressed as repetition of the address addition amount (P1, P2, P3, . . . , PN).

Abstract: There is provided a solid-state imaging device having a pixel array section in which pixels including photoelectric conversion elements are arranged in a matrix form, and sweeping out unnecessary charges by setting a predetermined number, two or more, of adjacent rows or a predetermined number, two or more, of adjacent columns, in the pixel array section, to a single group, and by applying a shutter pulse in units of groups before storing signal charges, and sequentially reading the signal charges in the units of groups. In the solid-state imaging device, a pre-shutter pulse is applied to pixels belonging to at least a single row or a single column within a succeeding group and adjacent to a preceding group, prior to the shutter pulse, before a reading timing for the preceding group, to sweep out unnecessary charges stored in the pixels.

Abstract: A solid state imaging device able to make noise from a nonselected row small, able to suppress occurrence of vertical stripes in a bright scene, not requiring charging including a floating node capacity via a reset transistor, able to prevent an increase of a driver size of a drain line, and able to secure high speed operation and a camera system using this as the imaging device are provided. An MOS type solid state imaging device in which unit pixels 10 each having a photodiode 11, a transfer transistor 12 for transferring the signal of the photodiode 11 to a floating node N11, an amplifier transistor 13 for outputting the signal of the floating node N11 to a vertical signal line 22, and a reset transistor 14 for resetting the floating node N11 are arrayed in a matrix and in which a gate voltage of the reset transistor 14 is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example ?1V).

Abstract: An image sensor is disclosed, which includes: a pixel unit having a plurality of pixels each outputting incident light as a pixel signal; an amplifier amplifying the pixel signal output from the pixel unit; and a defective pixel detection circuit performing a defective pixel detection on signals output from the amplifier, wherein the defective pixel detection circuit adjusts the detection accuracy of the defective pixel detection in accordance with an exposure condition of the pixel unit.

Abstract: A Cu film as the non-magnetic layer of a spin valve film is formed on a substrate in a sputter film forming chamber in which a film is formed by sputtering under a reduced pressure, a substrate is exposed to a gas atmosphere in a gas exposing chamber into which gas activating the surface of the Cu film is introduced, and the substrate is moved again to the sputter film forming chamber to form the remaining portion of the spin valve film.

Abstract: On a given substrate are successively formed electrode patterns constituting electrode wirings for measuring points, respectively. Then, an insulating layer and an underlayer covering the electrode patterns are etched and removed to expose the substrate, which suffers from anisotropic etching using a given etching solution, to fabricate a multipoint minute electrode with a sharpened probe and a supporter for the probe.

Abstract: A giant magneto-resistive effect element includes a laminated layer film having a ferromagnetic film, a non-magnetic film and an anti-ferromagnetic film. A current is caused to flow in the direction perpendicular to the film plane of the laminated layer film by upper and lower electrodes. Hard magnetic films are directly connected to both sides in the width direction of the laminated layer film. Insulating films are formed above or under the hard magnetic films. A current path between the upper electrodes or the lower electrodes and the laminated layer film is restricted by an opening defined between the insulating layers at both sides. The hard magnetic films have a specific resistance substantially the same as or larger than that of the laminated layer film. Further, there are provided a magneto-resistive effect type head, a thin-film magnetic memory and a thin-film magnetic sensor including the above-mentioned giant magneto-resistive effect element.

Abstract: In the present invention, some layers, the last of which is the Cu film serving as the nonmagnetic layer, are formed on the substrate by means of sputtering performed at a reduced pressure in a film-forming sputtering chamber. The substrate is then exposed in a gas atmosphere in a gas-exposure chamber filled with gas that activates a surface of the Cu film. The remaining layers of the spin valve film are formed on the substrate, in the film-forming sputtering chamber.

Abstract: A CPP configuration of a GMR element includes a lamination layer structure portion 10 based upon a spin-valve configuration in which there are laminated a free layer 1 of which the magnetization is rotated in response to an external magnetic field, a fixed layer 3, an antiferromagnetic layer 4 for fixing the magnetization of this fixed layer 3 and a nonmagnetic layer 2 interposed between the free layer 1 and the fixed layer 3, a substantially lamination direction of this lamination layer structure portion 10, i.e., direction intersecting, e.g., perpendicular to, a plane direction is set to a conducting direction of a sense current and at least either the free layer 1 or the fixed layer 3 is divided by thin film layers having a film thickness of less than 1.9 nm and thereby formed as a multilayer form in which a plurality of heterogeneous interfaces are formed in the free layer or the fixed layer.

Abstract: A giant magneto-resistive effect element includes a laminated layer film comprising a ferromagnetic film, a non-magnetic film and an anti-ferromagnetic film, a current is caused to flow in the direction perpendicular to the film plane of the laminated layer film by upper electrodes and lower electrodes, hard magnetic films are directly connected to both sides in the width direction of the laminated layer film insulating films are formed above or under the hard magnetic films, a current path between the upper electrodes or the lower electrodes and the laminated layer film is restricted by an opening defined between the insulating layers at both sides, and the hard magnetic films has a specific resistance substantially the same as or larger than that of the laminated layer film. Further, there are constructed a magneto-resistive effect type head, a thin-film magnetic memory and a thin-film magnetic sensor including the above-mentioned giant magneto-resistive effect element.

Abstract: A magnetoresistance film has an ordered antiferromagnetic layer (1), a fixed magnetic structure portion (2) joined thereto, a non-magnetic conductive layer (3), and a free magnetic layer portion (4) having at least one magnetic layer, the fixed magnetic structure portion (2) having provided therein an amorphous magnetic layer (5). The magnetoresistance film is thereby constructed such that the amorphous magnetic layer (5) and the non-magnetic conductive layer (3) are joined to each other with a crystalline ferromagnetic intermediate layer (61) existing in between. Thereby, the fixed magnetic structure portion of a spin valve construction has therein the amorphous magnetic layer to thereby achieve the enhancement of the magneto-resistance change rate and the improvement of the heat resistance of the resulting magnetoresistance film.