Patents by Inventor Eiji Sugiyama
Eiji Sugiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20060267204Abstract: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.Type: ApplicationFiled: May 18, 2006Publication date: November 30, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Takahashi, Daiki Yamada, Kyosuke Ito, Eiji Sugiyama, Yoshitaka Dozen
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Publication number: 20060199382Abstract: The present invention has an object to perform a peeling treatment in a short time. Peeling is performed while a peeling layer is exposed to an atmosphere of an etching gas. Alternatively, peeling is performed while an etching gas for a peeling layer is blown to the peeling layer in an atmosphere of an etching gas. Specifically, an etching gas is blown to a part to be peeled while a layer to be peeled is torn off from a substrate. Alternatively, peeling is performed in an etchant for a peeling layer while supplying an etchant to the peeling layer.Type: ApplicationFiled: February 24, 2006Publication date: September 7, 2006Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Eiji Sugiyama, Yoshitaka Dozen, Yumiko Fukumoto, Hideaki Kuwabara, Shunpei Yamazaki
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Publication number: 20060175112Abstract: In a motorcycle, a fuel tank shroud is arranged on each side of the fuel tank so that the shrouds cover at least part of both side surfaces of the fuel tank. The rear portions of the shrouds are stably supported to avoid vibration. Each shroud is formed of synthetic resin and integrally includes a main portion for covering the side of a fuel tank, a supporting arm portion extending inward from a rear portion of the main portion and sandwiched between a front portion of a seat and a rear portion of the fuel tank, and an engaging portion projecting from a distal end of the supporting arm portion. A bottom plate of the seat is integrally provided with a latching portion for allowing removable engagement with the engaging portion of the fuel tank shrouds, whereby the rear portion of the shrouds are supported.Type: ApplicationFiled: February 7, 2006Publication date: August 10, 2006Applicant: Honda Motor Co., Ltd.Inventors: Naoki Yoshida, Eiji Sugiyama
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Publication number: 20060085152Abstract: In respect to emissions trading, although the emission of carbon dioxide may be reduced, there arises a need for reduction of energy so used in conjunction therewith with the possibility of global recession. The present invention purports to facilitate supply of organic compounds having environmentally-friendly values by providing a support system, an certification system and a method of trading environmentally-friendly values of organic compounds, in conjunction with accompanying computer software, to operators creating environmentally-friendly values of organic compounds; to a wide range of companies wishing to purchase organic compounds having said environmentally-friendly values and products produced by using said organic compounds; and to individual consumers.Type: ApplicationFiled: March 5, 2004Publication date: April 20, 2006Applicant: Toyota Tsusho CorporationInventors: Eiji Sugiyama, Kenichi Osakabe, Mitsuaki Katayanagi, Reiko Ono, Tatsunori Kaiden, Shinichi Satou
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Publication number: 20060082035Abstract: A magnetic annealing device for inserting a recording medium 1 provided with an axial hole formed at a center thereof and having a disk shape into a chamber 10 and applying a heat treatment to the recording medium 1 in a magnetic field is provided with a magnetic circuit for forming a magnetic field in the chamber 10, the magnetic circuit comprises a pair of magnets 4 and 5 disposed with a distance therebetween along an axial direction of the axial hole and having magnetic fields directionally opposed to each other and a first ferromagnetic substance 6 disposed between the pair of magnets 4 and 5, wherein the recording medium 1 to be heat-treated is disposed at an intermediate position between the pair of magnets 4 and 5 facing each other in the state in which the first ferromagnetic substance 6 is inserted into the axial hole. A second ferromagnetic substance 7 having a ring shape is preferably disposed in a periphery of the recording medium 1.Type: ApplicationFiled: February 18, 2004Publication date: April 20, 2006Inventors: Eiji Sugiyama, Masaaki Aoki, Hiroyuki Kenju, Ryouichi Utsumi, Kiichi Itagaki
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Publication number: 20060063309Abstract: In the case where an integrated circuit formed of a thin film is formed over a substrate and peeled from the substrate, a fissure (also referred to as crack) is generated in the integrated circuit in some cases. The present invention is to restrain the generation of a fissure by fixing the proceeding direction of etching in one direction to make a peeled layer warp in one direction in accordance with the proceeding of etching. For example, the proceeding of etching can be controlled by utilizing the fact that a portion where a substrate is in contact with a base insulating layer is not etched in the case of patterning a peeling layer provided over the substrate, then forming the base insulating layer, and then fixing a peeled layer by the portion where the substrate is in contact with the base insulating layer.Type: ApplicationFiled: September 20, 2005Publication date: March 23, 2006Inventors: Eiji Sugiyama, Kyosuke Ito
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Publication number: 20050285231Abstract: An efficient mass-production method of very small devices that can receive or transmit data in touch, preferably, out of touch is provided by forming an integrated circuit made of a thin film over a large glass substrate and transferring the integrated circuit to another backing to be divided. Especially, the integrated circuit made of a thin film is difficult to use since there is a threat that the integrated circuit is flied in all directions as the integrated circuit is extremely thin. According to the present invention, multiple holes or grooves reaching the peel layer are provided, and a material body having a pattern shape that does not cover the holes (or grooves) and the device portion is provided, then, gas or liquid containing fluorine halide is introduced to remove selectively the peel layer.Type: ApplicationFiled: June 21, 2005Publication date: December 29, 2005Inventors: Tatsuya Arao, Yoshitaka Dozen, Daiki Yamada, Eiji Sugiyama, Tomoko Tamura, Junya Maruyama, Nozomi Horikoshi, Yuugo Goto
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Publication number: 20050258784Abstract: A permanent magnet for a particle accelerator and a magnetic field generator, in which Nd—Fe—B based magnets are used but are not demagnetized so easily even when exposed to a radiation, are provided. A permanent magnet for a particle accelerator is used in an environment in which the magnet is exposed to a radiation at an absorbed dose of at least 3,000 Gy. The magnet includes R (which is at least one of the rare-earth elements), B, TM (which is at least one transition element and includes Fe) and inevitably contained impurity elements. The magnet is a sintered magnet that has been magnetized to a permeance coefficient of 0.5 or more and that has a coercivity HcJ of 1.6 MA/m or more.Type: ApplicationFiled: February 20, 2004Publication date: November 24, 2005Applicants: Neomax Co., LTD., Inter-University Research Institute Corporation High Energy Accelerator Research OrganizationInventors: Ken Makita, Eiji Sugiyama, Masaaki Aoki, Kaichi Murakami, Tadamichi Kawakubo, Eiji Nakamura
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Publication number: 20050167573Abstract: The object of the present invention is to miniaturize the area occupied by the element and to integrate a plenty of elements in a limited area so that the sensor element can have higher output and smaller size. In the present invention, higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active layer over a plastic film substrate that can resist the temperature in the process for mounting such as a solder reflow process. According to the present invention, the sensor element that can resist the bending stress can be obtained.Type: ApplicationFiled: September 30, 2004Publication date: August 4, 2005Inventors: Junya Maruyama, Toru Takayama, Masafumi Morisue, Ryosuke Watanabe, Eiji Sugiyama, Susumu Okazaki, Kazuo Nishi, Jun Koyama, Takeshi Osada, Takanori Matsuzaki
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Publication number: 20050116310Abstract: The present invention provides a semiconductor device formed over an insulating substrate, typically a semiconductor device having a structure in which mounting strength to a wiring board can be increased in an optical sensor, a solar battery, or a circuit using a TFT, and which can make it mount on a wiring board with high density, and further a method for manufacturing the same. According to the present invention, in a semiconductor device, a semiconductor element is formed on an insulating substrate, a concave portion is formed on a side face of the semiconductor device, and a conductive film electrically connected to the semiconductor element is formed in the concave portion.Type: ApplicationFiled: October 5, 2004Publication date: June 2, 2005Inventors: Kazuo Nishi, Hiroki Adachi, Junya Maruyama, Naoto Kusumoto, Yuusuke Sugawara, Tomoyuki Aoki, Eiji Sugiyama, Hironobu Takahashi
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Publication number: 20040096623Abstract: To provide a fiberboard capable of reducing a load on the environment at all states of producing, using, and abolishing and moreover having a high degree of bending strength and a high bending-strength retention rate at high temperature and high humidity so as to be usable for an automobile interior material or building material and a fiber-board producing method. The fiberboard is formed by mixing natural fiber with polylactic acid resin serving as a binder and has an apparent density of 0.2 g/cm3.Type: ApplicationFiled: September 17, 2003Publication date: May 20, 2004Inventors: Masanori Hashiba, Takehiro Kato, Kousuke Tamaki, Osamu Mito, Kazuya Matsumura, Tomomichi Fujiyama, Yuhei Maeda, Eiji Sugiyama, Takashi Inoh, Hiroshi Urayama, Hisashi Okuyama
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Patent number: 6303797Abstract: A compound represented by the formula [I] wherein Y1 represents an oxygen atom, or a group represented by NH, O—CO, O—SO2, O—CO—NH, O—CS—NH, NH—CO, NH—SO2, NH—CO—NH or NH—CS—NH, R1 represents an alkyl group, an alkenyl group, an alkynyl group, an aryl group, an aralkyl group, an arylalkenyl group, an arylalkynyl group, a cycloalkyl group, a cycloalkylalkyl group, an alkylcarbonyl group, an alkoxycarbonyl group, an arylcarbonyl group or a heterocyclic group, each optionally having a substituent, or a pharmacologically acceptable salt or ester thereof. The compound shows an excellent antifungal activity on fungi on which existing antifungal agents cannot sufficiently display their effects, and thus is useful as an antifungal agent.Type: GrantFiled: January 30, 2001Date of Patent: October 16, 2001Assignee: Banyu Pharmaceutical Co., Ltd.Inventors: Atsushi Hirano, Eiji Sugiyama, Hisao Kondo, Hiroyuki Suda, Hidenori Ogawa, Katsuhisa Kojiri
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Patent number: 5570766Abstract: An end bearing for one-way clutch which is preferred for use in an automatic transmission is disclosed. The end bearing comprises a body formed of a steel plate, a hard coating applied to the surface of the body, and a soft coating applied to the surface of the hard coating. The steel plate of the body assures a sufficient rigidity. Regions of the end bearing which provide sliding surfaces are covered by a soft coating and a hard coating, which improves the anti-seizing resistance and the durability of the end bearing.Type: GrantFiled: March 14, 1995Date of Patent: November 5, 1996Assignees: Taiho Kogyo Co., Ltd., Koyo Seiko Co., Ltd.Inventors: Eichi Sato, Yoshihiro Kaku, Yuji Yokota, Hiroshi Shibata, Masanori Hatanaka, Eiji Sugiyama, Jun Sonoda, Tetsuaki Numata
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Patent number: 5508634Abstract: A semiconductor integrated circuit device has a dual configuration involving a first latch circuit and a second latch circuit that are connected in parallel with each other. The first latch circuit is provided with an input terminal to operate the first latch circuit independently of the second latch circuit. This semiconductor integrated circuit device is capable of individually testing the latch circuits of the dual configuration, to ensure the merit of the dual configuration.Type: GrantFiled: May 24, 1995Date of Patent: April 16, 1996Assignee: Fujitsu LimitedInventor: Eiji Sugiyama
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Patent number: 5436572Abstract: A semiconductor integrated circuit device has a dual configuration involving a first latch circuit and a second latch circuit that are connected in parallel with each other. The first latch circuit is provided with an input terminal to operate the first latch circuit independently of the second latch circuit. This semiconductor integrated circuit device is capable of individually testing the latch circuits of the dual configuration, to ensure the merit of the dual configuration.Type: GrantFiled: August 20, 1993Date of Patent: July 25, 1995Assignee: Fujitsu LimitedInventor: Eiji Sugiyama
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Patent number: 5242741Abstract: In the boronizing of a ferrous sintered material, the porosity of the surface to be boronized is reduced, while the interior of the ferrous sintered material is kept essentiall as sintered. The boron phase is selectively on the surface having a low porosity, resistance are attained.Type: GrantFiled: October 21, 1992Date of Patent: September 7, 1993Assignee: Taiho Kogyo Co., Ltd.Inventors: Eiji Sugiyama, Motoshi Hayashi
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Patent number: 4952997Abstract: A semiconductor integrated-circuit apparatus includes an electro-conductive layer formed on a substrate, a plurality of internal cells formed on the electro-conductive layer, a plurality of bonding pads arranged around the internal cells, and a plurality of bias cells which are common to the plurality of internal cells and which generate a predetermined voltage. A plurality of bias buffer circuits supply the predetermined voltage generated in the bias cells to the internal cells.Type: GrantFiled: March 20, 1989Date of Patent: August 28, 1990Assignee: Fujitsu LimitedInventors: Eiji Sugiyama, Mitsuaki Natsume, Toshiharu Saito
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Patent number: 4904887Abstract: A semiconductor integrated-circuit apparatus includes an electro-conductive layer formed on a substrate, a plurality of internal cells formed on the electro-conductive layer, a plurality of bonding pads arranged around the internal cells, and a plurality of bias cells which are common to the plurality of internal cells and which generate a predetermined voltage. A plurality of bias buffer circuits supply the predetermined voltage generated in the bias cells to the internal cells.Type: GrantFiled: August 4, 1988Date of Patent: February 27, 1990Assignee: Fujitsu LimitedInventors: Eiji Sugiyama, Mitsuaki Natsume, Toshiharu Saito
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Patent number: 4891729Abstract: A semiconductor integrated-circuit apparatus includes a electro-conductive layer formed on a substrate, a plurality of internal cells formed on the electro-conductive layer, a plurality of bonding pads arranged around the internal cells, and a plurality of bias cells which are common to the plurality of internal cells and which generate a predetermined voltage. A plurality of bias buffer circuits supply the predetermined voltage generated in the bias cells to the internal cells.Type: GrantFiled: March 20, 1989Date of Patent: January 2, 1990Assignee: Fujitsu LimitedInventors: Eiji Sugiyama, Mitsuaki Natsume, Toshiharu Saito
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Patent number: 4779009Abstract: In a master-slave type flip-flop circuit including a normal function in a normal mode for flip/flop operation and a scanning function in a scanning mode for testing an integrated circuit, the master-slave type flip-flop circuit comprises: a master stage having a first pair of differential transistors for taking in data, a second pair of differential transistors for latching data taken in to the first pair of differential transistors, a third pair of differential transistors for taking in scanning data, and a fourth pair of differential transistors for activating the second and third pair of differential transistors in the scanning mode; and a slave stage having a first pair of differential transistors for taking in data from the master stage, a second pair of differential transistors for latching data taken in to the first pair of differential transistors, a third pair of differential transistors for latching scanning data, and a fourth pair of differential transistors for activating the first and third pairType: GrantFiled: July 18, 1986Date of Patent: October 18, 1988Assignee: Fujitsu LimitedInventors: Hiroyuki Tsunoi, Eiji Sugiyama, Motohiro Seto