Patents by Inventor Eiji Watanabe

Eiji Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6732911
    Abstract: There is provided a chamber open to the outside through openings through which a solder-adhered object is passed and the chamber having a heating/melting area, a carrying mechanism for carrying the solder-adhered object into the heating/melting area, a formic-acid supplying means for supplying a formic acid into the heating/melting area, an exhausting means for exhausting a gas from the heating/melting area and its neighboring area to create a lower pressure area in the heating/melting area as compared to the pressure of outside the chamber, heating means for heating directly or indirectly the solder-adhered object in the heating/melting area, and an air-stream suppressing means for disturbing a gas flow between the heating/melting area and the carrying areas.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: May 11, 2004
    Assignee: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Hiroyuki Matsui, Eiji Yoshida, Takao Ohno, Koki Otake, Akiyo Mizutani, Motoshu Miyajima, Masataka Mizukoshi, Eiji Watanabe
  • Patent number: 6712522
    Abstract: A cylindrical sleeve connector for mounting ferrules retaining optical fibers therein is formed with a plurality of perforations arranged in a given pattern so as to be elastically deformable within in a specified elastic region. The sleeve connector is produced, using electroforming process, on a cylindrical electroforming mandrel comprising a conductive rod with external surface texture that is equivalent to required internal surface texture of the sleeve connector and a non-conductive layer formed on the conductive rod so as to provide non-conductive segments identical in configuration with the perforations and arranged in conformity with the given pattern of perforations of the cylindrical sleeve connector.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: March 30, 2004
    Assignee: Oudensha Co., Ltd.
    Inventors: Eiji Watanabe, Kenji Nakamura
  • Publication number: 20040057262
    Abstract: On the basis of: a first calculated value ic which is a product of a calculated value of a time of three-phase output voltages in a state where a positive bus, a negative bus, and a neutral line are connected respectively to three-phase phase output terminals, and a predicted neutral current value in the state; and second and third calculated values icx and icy which are products of a calculated value of a time of the three-phase output voltages that can take state 1 where two of the three-phase phase output terminals are connected to the positive bus or the neutral line, and a remaining one terminal is connected to the neutral line or the negative bus, and state 2 opposite to the state, and predicted neutral current values in states 1 and 2, a time ratio of state 1 and 2 during a PWM period is determined so as to make a current flowing through the neutral line close to zero, or a potential of the neutral line of the three-phase output voltages close to a voltage which is exactly the middle between voltages o
    Type: Application
    Filed: June 6, 2003
    Publication date: March 25, 2004
    Inventors: Yoshiyuki Tanaka, Katsutoshi Yamanaka, Eiji Watanabe
  • Patent number: 6703559
    Abstract: Feedthrough apparatus has a metal housing with an opening therein and a base having a surface at the opening. A ceramic feedthrough extends through the opening in the housing and forms an interface therewith, and is brazed to the housing at the interface. The surface of the base extends at least to the feedthrough and has a cut-out area or opening therein adjacent the feedthrough in order to minimize the surface area contact at the interface between the ceramic feedthrough and the metal housing. The opening in the base may have edges which extend from sidewalls of the feedthrough under the feedthrough by small distances, in order to form a small ledge beneath the outer periphery of the feedthrough. Alternatively, the opening in the base may be approximately equal in size to the feedthrough so as to have edges which engage sidewalls of the feedthrough.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: March 9, 2004
    Assignee: Kyocera America, Inc.
    Inventors: Franklin Kim, Eiji Watanabe, Nobuo Takeshita
  • Publication number: 20040003425
    Abstract: An object of the present invention is to provide a null mutant non-human animal showing salt intake behavior similar to that of wild-type animals under water-sufficient conditions and showing much more intakes of hypertonic saline compared with wild-type animals under water- and salt-depleted conditions, for example, an Nav2 gene-deficient non-human animal, which is useful as a model animal of excessive salt intake experiments.
    Type: Application
    Filed: May 6, 2003
    Publication date: January 1, 2004
    Inventors: Masaharu Noda, Eiji Watanabe
  • Patent number: 6664021
    Abstract: A photosensitive resin composition is provide which includes a compound for generating an acid by light irradiation and at least one polyimide precursor selected from the group consisting of a silicon-containing polyimide precursor (a) obtained from A mol of a tetracarboxylic dianhydride or its derivative formed by adding 2 mols or less of a monovalent saturated alcohol to 1 mol of the tetracarboxylic dianhydride, B mol of a diamine and C mol of an aminosilicon compound represented by the formula (1) H2N—R1—SiR23−kXk  (1) {wherein R1 is —(CH2)s—, (wherein s is an integer of from 1 to 4); R2 is independently an alkyl group having 1 to 6 carbon atoms, a phenyl group or a phenyl group substituted by an alkyl group having 7 to 12 carbon atoms; X is a hydrolytic alkoxy group; and k is 1≦k≦3} in a ratio meeting the following formulae (2) and (3) 1 ≦ C
    Type: Grant
    Filed: November 26, 1996
    Date of Patent: December 16, 2003
    Assignee: Chisso Corporation
    Inventors: Hirotoshi Maeda, Kouichi Kunimune, Eiji Watanabe, Kouichi Katou
  • Patent number: 6664125
    Abstract: A method of manufacturing a solid-state image pickup device including the steps of preparing a package including a housing section to house a solid-state image pickup element chip and an opening section in an upper section thereof, sporadically applying adhesive with a predetermined thickness on a bottom surface of the housing section, moving the solid-state image pickup element toward the housing section, an upper surface of the package and an upper surface of the element each having desired parallelism with respect to a predetermined reference surface with high precision, bringing a rear surface of the solid-state image pickup element into contact with the adhesive and stopping the movement of the element before the element comes into contact with the bottom surface of the housing section, curing the adhesive while the solid-state image pickup element is floating on the adhesive and fixing the element in the housing section.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: December 16, 2003
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Eiji Watanabe, Takeshi Nishida
  • Publication number: 20030219969
    Abstract: A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.
    Type: Application
    Filed: December 31, 2002
    Publication date: November 27, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Nobukatsu Saito, Masaharu Minamizawa, Yoshiyuki Yoneda, Nobutaka Shimizu, Kazuyuki Imamura, Atsushi Kikuchi, Tadahiro Okamoto, Eiji Watanabe
  • Publication number: 20030204863
    Abstract: An object of the present invention is to provide a null mutant non-human animal showing salt intake behavior similar to that of wild-type animals under water-sufficient conditions and showing much more intakes of hypertonic saline compared with wild-type animals under water- and salt-depleted conditions, for example, an Nav2 gene-deficient non-human animal, which is useful as a model animal of excessive salt intake experiments.
    Type: Application
    Filed: May 6, 2003
    Publication date: October 30, 2003
    Inventors: Masaharu Noda, Eiji Watanabe
  • Patent number: 6614113
    Abstract: A semiconductor device includes a barrier metal structure which are sandwiched between an electrode provided on a semiconductor chip and a bump. The barrier metal structure has a first through third conductive metal layers, where the third conductive metal layer as an uppermost layer thereof in contact with the bump covers the second conductive metal layer made of a material which is weak in resistance to diffusion and oxidation.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: September 2, 2003
    Assignee: Fujitsu Limited
    Inventors: Eiji Watanabe, Kouichi Murata
  • Publication number: 20030160325
    Abstract: A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
    Type: Application
    Filed: October 2, 2002
    Publication date: August 28, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Yoneda, Masaharu Minamizawa, Eiji Watanabe, Mitsutaka Sato
  • Publication number: 20030137857
    Abstract: For an interval in which an Op-vector and a b-vector are successively output among intervals of output voltage vectors of each phase within a PWM cycle, the output times of each vector are divided by a positive integer m to find divided times of each vector, and the Op-vector and the b-vector are each alternately output for the divided time, each vector being output m times. For an interval in which an On-vector and an a-vector are successively output, the output times of each vector are divided by a positive integer n to find divided times of each vector, and the On-vector and a-vector are each alternately output for the divided time, each vector being output n times. The adoption of this method enables dispersion of the frequency component of current ripple that arises from PWM pulses (1)-(3).
    Type: Application
    Filed: November 18, 2002
    Publication date: July 24, 2003
    Inventors: Katsutoshi Yamanaka, Eiji Watanabe, Takaaki Terada, Yoshiyuki Tanaka, Yuuichi Terazono
  • Patent number: 6566239
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes the steps of forming a wiring layer on an underlying metal film formed on a substrate, the wiring layer being electrically connected to an electrode pad formed on a substrate, removing a part of the wiring layer so as to form a wiring on the substrate, a part of the underlying metal film being exposed other than a part where the wiring is formed, removing the exposed part of the underlying metal film by using the wiring as a mask, forming a barrier metal film on the wiring so as to cover the wiring and the underlying metal film underneath the wiring, forming a post terminal by electroless plating so that the post terminal is electrically connected to said wiring and providing a sealing resin so as to cover said substrate except a position at which said post terminal is formed.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: May 20, 2003
    Assignee: Fujitsu Limited
    Inventors: Yutaka Makino, Eiji Watanabe, Hirohisa Matsuki, Tetsuya Fujisawa
  • Patent number: 6550596
    Abstract: In a fan coupling device in which the interior of a sealed housing supported and born by a rotary shaft having a driving disc secured thereto is separated by a partition plate having an oil supply adjusting hole into an oil reservoir and a torque transmission chamber in which the driving disc is contained and in which driving torque is transmitted to a driven side by oil supplied to the torque transmission chamber, a non-excited electromagnet utilizing a permanent magnet located in the oil reservoir of the sealed housing being supported around the rotary shaft, the valve member being actuated by the electromagnet to provide a mechanism for controlling the opening and closing of the oil supply adjusting hole.
    Type: Grant
    Filed: June 26, 2001
    Date of Patent: April 22, 2003
    Assignee: Usui Kokusai Sangyo Kaisha Limited
    Inventors: Ken Shiozaki, Eiji Watanabe, Yoshinobu Iida
  • Publication number: 20030059169
    Abstract: A cylindrical sleeve connector for mounting ferrules retaining optical fibers therein is formed with a plurality of perforations arranged in a given pattern so as to be elastically deformable within in a specified elastic region. The sleeve connector is produced, using electroforming process, on a cylindrical electroforming mandrel comprising a conductive rod with external surface texture that is equivalent to required internal surface texture of the sleeve connector and a non-conductive layer formed on the conductive rod so as to provide non-conductive segments identical in configuration with the perforations and arranged in conformity with the given pattern of perforations of the cylindrical sleeve connector.
    Type: Application
    Filed: February 7, 2002
    Publication date: March 27, 2003
    Inventors: Eiji Watanabe, Kenji Nakamura
  • Publication number: 20030052544
    Abstract: A PWM cycloconverter is disclosed that can switch power supplies without interrupting operation in the event of a power supply abnormality. When a power supply abnormality occurs in three-phase AC power supply 1, power supply abnormality detection circuit 30 outputs power supply abnormality detection signal 120, whereby power supply switch 20 selects and outputs the output voltage of uninterruptible power supply 10. Phase detection circuit switch 43 selects and outputs phase information that is output from uninterruptible power supply phase detection circuit 41. Uninterruptible power supply phase detection circuit 41 detects the phase of uninterruptible power supply 10 from before the occurrence of the power supply abnormality, whereby accurate phase information of uninterruptible power supply 10 can be output even immediately after phase detection circuit switch 43 switches the phase information that is output. As a result, operation is not interrupted when switching power supplies.
    Type: Application
    Filed: September 5, 2002
    Publication date: March 20, 2003
    Inventors: Eiji Yamamoto, Sadao Ishii, Hidenori Hara, Eiji Watanabe, Tetsuya Yamasaki, Koji Tanaka
  • Patent number: 6522016
    Abstract: A semiconductor device having a highly resistant metal film and a method of producing such a semiconductor device, which includes a metal film formed on an electrode pad, and a protection film formed in an area where he metal film does not exist. The metal film has a greater thickness on its peripheral end portion in contact with the protection film. The semiconductor device can be produced by a semiconductor production method including the steps of activating the surface o the electrode pad with a chelating solution containing glycine and a compound having a metallic element as nuclei, and forming a metal film by electroless metal plating.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: February 18, 2003
    Assignee: Fujitsu Limited
    Inventors: Yutaka Makino, Toshiharu Egami, Eiji Watanabe
  • Publication number: 20030015350
    Abstract: Feedthrough apparatus has a metal housing with an opening therein and a base having a surface at the opening. A ceramic feedthrough extends through the opening in the housing and forms an interface therewith, and is brazed to the housing at the interface. The surface of the base extends at least to the feedthrough and has a cut-out area or opening therein adjacent the feedthrough in order to minimize the surface area contact at the interface between the ceramic feedthrough and the metal housing. The opening in the base may have edges which extend from sidewalls of the feedthrough under the feedthrough by small distances, in order to form a small ledge beneath the outer periphery of the feedthrough. Alternatively, the opening in the base may be approximately equal in size to the feedthrough so as to have edges which engage sidewalls of the feedthrough.
    Type: Application
    Filed: July 19, 2001
    Publication date: January 23, 2003
    Applicant: Kyocera America, Inc.
    Inventors: Franklin Kim, Eiji Watanabe, Nobuo Takeshita
  • Patent number: 6472763
    Abstract: A conductive electrode pad is formed on a partial area of an insulating surface. An insulating film covers the electrode pad. The insulating film has an opening exposing at least a partial upper surface of the electrode pad. A barrier layer of conductive material is formed on the partial upper surface exposed on the bottom of the opening and on the surface of the insulating film near the opening. A conductive bump is adhered to the barrier layer. A step is formed on the surface of a layer under the barrier layer between an outer periphery of the barrier layer and an outer periphery of the opening.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: October 29, 2002
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Fukuda, Eiji Watanabe
  • Patent number: 6462415
    Abstract: There is provided a semiconductor device which comprises electrode pads formed on an insulating film on a semiconductor substrate, an insulating cover film formed on the insulating film to have openings that expose the electrode pads, and a masking tape having a base material layer and a resist layer coated on the base material layer, and for covering an upper surface of the cover film and inner surfaces of the openings in a situation that the resist layer is directed toward a semiconductor substrate side. Accordingly, it is possible to improve a throughput in a series of steps of grinding/polishing the semiconductor substrate and forming the bump electrodes which are required to thin the substrate of the semiconductor device.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: October 8, 2002
    Assignee: Fujitsu Limited
    Inventors: Masahiko Ishiguri, Eiji Watanabe, Yutaka Makino, Koichi Murata