Patents by Inventor Ellie Y. Yieh

Ellie Y. Yieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210189555
    Abstract: Methods for plasma enhanced chemical vapor deposition (PECVD) of silicon carbonitride films are described. A flowable silicon carbonitride film is formed on a substrate surface by exposing the substrate surface to a precursor and a reactant, the precursor having a structure of general formula (I) or general formula (II) wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12 are independently selected from hydrogen (H), substituted or unsubstituted alkyl, substituted or unsubstituted alkoxy, substituted or unsubstituted vinyl, silane, substituted or unsubstituted amine, or halide; purging the processing chamber of the silicon precursor, and then exposing the substrate to an ammonia plasma.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 24, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Mei-Yee Shek, Bhargav S. Citla, Joshua Rubnitz, Jethro Tannos, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20210143323
    Abstract: Embodiments of the disclosure provide methods and apparatus for fabricating magnetic tunnel junction (MTJ) structures on a substrate for MRAM applications. In one embodiment, a method for forming a magnetic tunnel junction (MTJ) device structure includes performing a patterning process by an ion beam etching process in a processing chamber to pattern a film stack disposed on a substrate, wherein the film stack comprises a reference layer, a tunneling barrier layer and a free layer disposed on the tunneling barrier, and determining an end point for the patterning process.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 13, 2021
    Inventors: Jong Mun KIM, Minrui YU, Chando PARK, Mang-Mang LING, Jaesoo AHN, Chentsau Chris YING, Srinivas D. NEMANI, Mahendra PAKALA, Ellie Y. YIEH
  • Patent number: 10998200
    Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Mei-Yee Shek, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20210088896
    Abstract: Embodiments of the disclosure relate to lithography simulation and optical proximity correction. Field-guided post exposure bake processes have enabled improved lithography performance and various parameters of such processes are included in the optical proximity correction models generated in accordance with the embodiments described herein. An optical proximity correction model includes one or more parameters of anisotropic acid etching characteristics, ion generation and/or movement, electron movement, hole movement, and chemical reaction characteristics.
    Type: Application
    Filed: August 3, 2020
    Publication date: March 25, 2021
    Inventors: Huixiong DAI, Mangesh Ashok BANGAR, Pinkesh Rohit SHAH, Srinivas D. NEMANI, Steven Hiloong WELCH, Christopher Siu Wing NGAI, Ellie Y. YIEH
  • Publication number: 20210041785
    Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. A method of processing a substrate is provided. The method includes applying a photoresist layer that includes a photoacid generator to a multi-layer disposed on the substrate. The multi-layer includes an underlayer. Further, the method includes exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process. A thermal energy is provided to the photoresist layer and the multi-layer in a post-exposure baking process. The multi-layer is disposed beneath the photoresist layer. An electric field or a magnetic field is applied to photoresist layer and the multi-layer while performing the post-exposure baking process. An additive within the underlayer is driven in a vertical direction into the photoresist layer. The additive assist in distribution of a photoacid throughout the photoresist layer during the post-exposure baking process.
    Type: Application
    Filed: August 10, 2020
    Publication date: February 11, 2021
    Inventors: Huixiong DAI, Mangesh Ashok BANGAR, Pinkesh Rohit SHAH, Christopher Siu Wing NGAI, Srinivas D. NEMANI, Ellie Y. YIEH
  • Patent number: 10916426
    Abstract: Embodiments of the present disclosure relate to forming a two-dimensional crystalline dichalcogenide by positioning a substrate in an annealing apparatus. The substrate includes an amorphous film of a transition metal and a chalcogenide. The film is annealed at a temperature from 500° C. to 1200° C. In response to the annealing, a two-dimensional crystalline structure is formed from the film. The two-dimensional crystalline structure is according to a formula MX2, M includes one or more of molybdenum (Mo) or tungsten (W) and X includes one or more of sulfur (S), selenium (Se), or tellurium (Te).
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: February 9, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Keith Tatseun Wong, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20210035619
    Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.
    Type: Application
    Filed: July 29, 2019
    Publication date: February 4, 2021
    Inventors: John O. DUKOVIC, Srinivas D. NEMANI, Ellie Y. YIEH, Praburam GOPALRAJA, Steven Hiloong WELCH, Bhargav S. CITLA
  • Publication number: 20210028282
    Abstract: The present disclosure provides methods for forming a channel structure in a film stack for manufacturing three dimensional (3D) stacked memory cell semiconductor devices. In one embodiment, a memory cell device includes a film stack comprising alternating pairs of dielectric layers and conductive structures horizontally formed on a substrate, and a channel structure formed in the film stack, wherein the channel structure is filled with a channel layer and a protective blocking layer, wherein the channel layer has a gradient dopant concentration along a vertical stacking of the film stack.
    Type: Application
    Filed: July 23, 2019
    Publication date: January 28, 2021
    Inventors: Arvind KUMAR, Sanjeev MANHAS, Mahendra PAKALA, Ellie Y. YIEH
  • Patent number: 10847360
    Abstract: Methods and systems relating to processes for treating a silicon nitride film on a workpiece including supporting the workpiece in a chamber, introducing an amine gas into the chamber and establishing a pressure of at least 5 atmospheres, and exposing the silicon nitride film on the workpiece to the amine gas while the pressure in the chamber is at least 5 atmospheres.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: November 24, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Keith Tatseun Wong, Sean Kang, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20200350183
    Abstract: A high-pressure processing system for processing a layer on a substrate includes a first chamber, a support to hold the substrate in the first chamber, a second chamber adjacent the first chamber, a foreline to remove gas from the second chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, a gas delivery system configured to increase the pressure within the first chamber to at least 10 atmospheres while the first chamber is isolated from the second chamber, an exhaust system comprising an exhaust line to remove gas from the first chamber, and a common housing surrounding both the first gas delivery module and the second gas delivery module.
    Type: Application
    Filed: July 20, 2020
    Publication date: November 5, 2020
    Inventors: Qiwei LIANG, Srinivas D. NEMANI, Sean S. KANG, Adib KHAN, Ellie Y. YIEH
  • Patent number: 10825665
    Abstract: Embodiments of the disclosure include apparatus and methods for modifying a surface of a substrate using a surface modification process. The process of modifying a surface of a substrate generally includes the alteration of a physical or chemical property and/or redistribution of a portion of an exposed material on the surface of the substrate by use of one or more energetic particle beams while the substrate is disposed within a particle beam modification apparatus. Embodiments of the disclosure also provide a surface modification process that includes one or more pre-modification processing steps and/or one or more post-modification processing steps that are all performed within one processing system.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: November 3, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Ludovic Godet, Huixiong Dai, Srinivas D. Nemani, Ellie Y. Yieh, Nitin Krishnarao Ingle
  • Patent number: 10811250
    Abstract: Methods for depositing silicon nitride films with higher nitrogen content are described. Certain methods comprise exposing a substrate to a silicon-nitrogen precursor and ammonia plasma to form a flowable polymer, and then curing the polymer to form a silicon nitride film. Certain methods cure the flowable polymer without the use of a UV-cure process. Also described is the film generated by the methods described above.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: October 20, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Atashi Basu, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20200233307
    Abstract: Methods and apparatuses for minimizing line edge/width roughness in lines formed by photolithography are provided. In one example, a method of processing a substrate includes applying a photoresist layer comprising a photoacid generator to on a multi-layer disposed on a substrate, wherein the multi-layer comprises an underlayer formed from an organic material, inorganic material, or a mixture of organic and inorganic materials, exposing a first portion of the photoresist layer unprotected by a photomask to a radiation light in a lithographic exposure process, and applying an electric field or a magnetic field to alter movement of photoacid generated from the photoacid generator substantially in a vertical direction.
    Type: Application
    Filed: October 11, 2019
    Publication date: July 23, 2020
    Inventors: Huixiong DAI, Mangesh BANGAR, Christopher S. NGAI, Srinivas D. NEMANI, Ellie Y. YIEH, Steven Hiloong WELCH
  • Patent number: 10720341
    Abstract: A high-pressure processing system for processing a layer on a substrate includes a first chamber, a support to hold the substrate in the first chamber, a second chamber adjacent the first chamber, a foreline to remove gas from the second chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, a gas delivery system configured to increase the pressure within the first chamber to at least 10 atmospheres while the first chamber is isolated from the second chamber, an exhaust system comprising an exhaust line to remove gas from the first chamber, and a common housing surrounding both the first gas delivery module and the second gas delivery module.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: July 21, 2020
    Assignee: Micromaterials, LLC
    Inventors: Qiwei Liang, Srinivas D. Nemani, Sean S. Kang, Adib Khan, Ellie Y. Yieh
  • Patent number: 10714331
    Abstract: A method for forming a thermally stable spacer layer is disclosed. The method includes first disposing a substrate in an internal volume of a processing chamber. The substrate has a film formed thereon, the film including silicon, carbon, nitrogen, and hydrogen. Next, high pressure steam is introduced into the processing chamber. The film is exposed to the high pressure steam to convert the film to reacted film, the reacted film including silicon, carbon, oxygen, and hydrogen.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: July 14, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mihaela Balseanu, Srinivas D. Nemani, Mei-Yee Shek, Ellie Y. Yieh
  • Publication number: 20200161176
    Abstract: Methods for forming a transition metal material on a substrate and thermal processing such metal containing material in a cluster processing system are provided. In one embodiment, a method for a device structure for semiconductor devices includes forming a two-dimensional transition metal dichalcogenide layer on a substrate in a first processing chamber disposed in a cluster processing system, thermally treating the two-dimensional transition metal dichalcogenide layer to form a treated metal layer in a second processing chamber disposed in the cluster processing system, and forming a capping layer on the treated metal layer in a third processing chamber disposed in the cluster processing system.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 21, 2020
    Inventors: Keith Tatseun WONG, Srinivas D. Nemani, Ellie Y. Yieh
  • Patent number: 10636704
    Abstract: Aspects of the disclosure include methods of treating a substrate to remove one or more of voids, seams, and grain boundaries from interconnects formed on the substrate. The method includes heating the substrate in an environment pressurized at supra-atmospheric pressure. In one example, the substrate may be heated in a hydrogen-containing atmosphere.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: April 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bencherki Mebarki, Sean S. Kang, Keith Tatseun Wong, He Ren, Mehul B. Naik, Ellie Y. Yieh, Srinivas D. Nemani
  • Patent number: 10622214
    Abstract: Methods and systems relating to processes for treating a tungsten film on a workpiece including supporting the workpiece in a chamber, introducing hydrogen gas into the chamber and establishing a pressure of at least 5 atmospheres, and exposing the tungsten film on the workpiece to the hydrogen gas while the pressure in the chamber is at least 5 atmospheres.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: April 14, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Keith Tatseun Wong, Thomas Jongwan Kwon, Sean Kang, Ellie Y. Yieh
  • Publication number: 20200105525
    Abstract: A method of forming graphene layers is disclosed. A method of improving graphene deposition is also disclosed. Some methods are advantageously performed at lower temperatures. Some methods advantageously provide graphene layers with lower resistance. Some methods advantageously provide graphene layers in a relatively short period of time.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 2, 2020
    Inventors: Jie Zhou, Erica Chen, Qiwei Liang, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20200098574
    Abstract: An annealing system is provided that includes a chamber body that defines a chamber, a support to hold a workpiece and a robot to insert the workpiece into the chamber. The annealing system also includes a first gas supply to provide a hydrogen gas, a pressure source coupled to the chamber to raise a pressure in the chamber to at least 5 atmospheres, and a controller configured to cause the robot to transport a workpiece having a metal film thereon into the chamber, where the metal film contains fluorine on a surface or embedded within the metal film, to cause the first gas supply to supply the hydrogen gas to the chamber and form atomic hydrogen therein, and to cause the pressure source to raise a pressure in the chamber to at least 5 atmospheres while the workpiece is held on the support in the chamber.
    Type: Application
    Filed: November 26, 2019
    Publication date: March 26, 2020
    Inventors: Keith Tatseun WONG, Thomas Jongwan KWON, Sean KANG, Ellie Y. YIEH