Abstract: The present invention provides a method for increasing the metabolic rate of recombinant microorganism growth under an anaerobic environment, wherein a recombinant strain is placed under an anaerobic environment and cultured under a culture condition, wherein the culture condition includes a potential difference and a nitrogen source, but not includes an organic carbon source. According to the method disclosed by the present invention, the recombinant strain can perform anaerobic respiration and metabolic reaction in an anaerobic environment, and can grow stably and rapidly.

Abstract: The present invention relates to a scald-proof pot handle, comprising a proximal end, a handle body and a distal end which are connected in order. A heat absorbing component is disposed within the handle body and extends along the same direction of the handle body. The heat absorbing component is connected and fixed to one end of the handle body, and an air layer is formed between the heat absorbing component and the handle body. The proximal end comprises a first connecting portion and a second connecting portion. The first connecting portion is connected to the pot body, and the second connecting portion is connected to the handle body. The end surface of the first connecting portion that contacts with the pot body is a curved surface, and the radian of the curved surface is consistent with the radian of the surface of the pot body.

Abstract: A power supply includes a boost converter, a capacitor, a step-down converter and a control unit. The boost converter, when activated, converts an input voltage into a boost voltage. The capacitor has a bulk voltage which is equal to the boost voltage when the boost converter is activated. The step-down converter converts the boost voltage into a step-down voltage for output. While the boost converter is deactivated, the control unit samples the input voltage and the bulk voltage, calculates an estimated value, and determines a calibration parameter. While the boost converter is activated, the control unit calculates a calibration value for enabling the boost converter to convert the input voltage with reference to the calibration value.

Abstract: A power supply includes a boost converter, a capacitor, a step-down converter and a control unit. The boost converter, when activated, converts an input voltage into a boost voltage. The capacitor has a bulk voltage which is equal to the boost voltage when the boost converter is activated. The step-down converter converts the boost voltage into a step-down voltage for output. While the boost converter is deactivated, the control unit samples the input voltage and the bulk voltage, calculates an estimated value, and determines a calibration parameter. While the boost converter is activated, the control unit calculates a calibration value for enabling the boost converter to convert the input voltage with reference to the calibration value.

Abstract: Techniques are presented for determining current levels based on the behavior of a charge pump system while driving a load under regulation. Rather than diving the load directly, a fixed pump output voltage is used to supply a step-down regulator, which it turn drives the load at the selected voltage. While driving the load under regulation, the number of pump clocks during a set interval is counted. This can be compared to a reference that can be obtained, for example, from the numbers of cycles needed to drive a known load current over an interval of the duration. By comparing the counts, the amount of current being drawn by the load can be determined. This technique can be applied to determining leakage from circuit elements, such as word lines in a non-volatile memory.

Abstract: A control method for implementation in a power supply system includes steps (A), (B), and (C). In step (A), while the power supply system is providing electricity to a load, a control circuit determines, an estimated capacitance value related to an output capacitor. In step (B), while the output capacitor is providing electricity to the load, the control circuit determines an average power value related to the electricity provided by the output capacitor to the load. In step (C), the control circuit determines an estimated hold-up time value related to the power supply system based on a predetermined target voltage value, a predetermined minimum voltage value, the average power value and the estimated capacitance value.

Abstract: An amplifier system an amplified path and a bypass path for carrying an RF signal. A switch in the amplified system routes the RF signal through the amplified path in response to a normal condition in the amplifier system, and routes the RF signal through the bypass path in response to an abnormal condition in the amplifier system. The amplified path includes an amplified forward circuit and a return circuit. The amplified forward circuit has an amplifier, and the return circuit has a return amplifier and detection circuitry for providing power to the return amplifier. The detection circuitry provides power to the return amplifier in response to a normal condition in the return circuit, and removes power from the return amplifier in response to an abnormal condition in the return circuit.

Abstract: Techniques and apparatuses for identifying weak charge pumps and for setting an optimal clock period for charge pumps to minimize variations in a current-voltage characteristic. A current sink which absorbs a specified current is connected to an output node of a charge pump. In one approach, a success or fail status is set for a charge pump by driving it with a specified clock period in a constantly pumping mode and determining if the output voltage reaches a specified output voltage. In another approach, a success or fail status is set for a charge pump by driving it with a specified clock period in a regulation mode and determining if the period in which the output voltage cycles is a specified multiple, e.g., 2×, of a period of the clock signal. In another approach, an optimal clock period is determined.

Abstract: A circuit for providing a plurality of clock signals of differing frequencies includes: a phase locked loop section including a first voltage controller oscillator, connected to receive a reference clock value and generate therefrom a first voltage level, wherein the first voltage controller oscillator receives the first voltage level and generates therefrom a first clock signal; and one or more second voltage controller oscillators, each connected to receive the first voltage level, a corresponding trim value and a corresponding control voltage and derive therefrom a corresponding second clock signal.

Abstract: In non-volatile memories, bit lines and word lines commonly to driving and decoding circuitry on a single end. Techniques are presented for determining the time constant associated with charging the far end of such lines from the near end, at which the circuitry is connected. While driving a discharged line from the near end, the number of clock cycles for the current to drop from a first level to a second level can be used to estimate the time constant for the far end. Alternately, the line can be initially charged up, after which the current is monitored at the near end. The differences in time constants for different word lines can be used to vary the time used when accessing a selected word line.

Abstract: To maintain stability of memory array operations, a supplemental current can supply a common source line of a memory array so that the combined current from the memory array and supplemental current is at least a minimum regulation current level. When enabled for sensing operations, a driver circuit maintains the common source line's voltage level. A current subtractor circuit determines the difference between a reference current and a current proportional to the current flowing from the array, where the reference current is proportional to the minimum regulation current. The difference current is then mirrored by a self-adjusting current loop and supplied to the common source line to maintain its current level.

Abstract: In non-volatile memories, bit lines and word lines commonly to driving and decoding circuitry on a single end. Techniques are presented for determining the time constant associated with charging the far end of such lines from the near end, at which the circuitry is connected. While driving a discharged line from the near end, the number of clock cycles for the current to drop from a first level to a second level can be used to estimate the time constant for the far end. Alternately, the line can be initially charged up, after which the current is monitored at the near end. The differences in time constants for different word lines can be used to vary the time used when accessing a selected word line.

Abstract: To maintain stability of memory array operations, a current source supplies a common source line of a memory. The magnitude of the regulation current from the source is dynamically determined based on the amount of current from the array itself through use of a feedback control signal provided by a current comparator circuit. The current comparison circuit can use either a digital or an analog implementation.

Abstract: An LDO/HDO circuit adds a supplementary current source to supply the output node. The current boosting section includes a digital comparator with a first input connected to the LDO's feedback loop and a second input connected to a reference level. The comparator then generates a digital output used to control the supplementary current source. This approach also can be used in a far-side implementation, where the local supply level for the load is boosted by the current source based a comparison of this local level and the output of the LDO. Miller capacitive compensation is also considered. Current in shunted to ground from a node in the Miller loop, where the level is controlled by the output of a digital comparator base on a comparison of the circuit's output voltage and a reference level.

Abstract: To maintain stability of memory array operations, a supplemental current can supply a common source line of a memory array so that the combined current from the memory array and supplemental current is at least a minimum regulation current level. When enabled for sensing operations, a driver circuit maintains the common source line's voltage level. A current subtractor circuit determines the difference between a reference current and a current proportional to the current flowing from the array, where the reference current is proportional to the minimum regulation current. The difference current is then mirrored by a self-adjusting current loop and supplied to the common source line to maintain its current level.

Abstract: A circuit for providing a plurality of clock signals of differing frequencies includes: a phase locked loop section including a first voltage controller oscillator, connected to receive a reference clock value and generate therefrom a first voltage level, wherein the first voltage controller oscillator receives the first voltage level and generates therefrom a first clock signal; and one or more second voltage controller oscillators, each connected to receive the first voltage level, a corresponding trim value and a corresponding control voltage and derive therefrom a corresponding second clock signal.

Abstract: Techniques are presented for improving the efficiency of charge pumps. A charge pump, or a stage of a charge pump, provides its output through a pass gate. For example, this could be a charge pump of a voltage doubler type, where the output is supplied through pass gate transistors whose gates are connected to receive the output of an auxiliary section, also of a voltage doubler type of design. The waveforms provided to the gates of the pass gate transistors are modified so that their low values are offset to a higher value to take into account the threshold voltage of the pass gate transistors. In a voltage doubler based example, this can be implemented by way of introducing diodes into each leg of the auxiliary section.

Abstract: A control method for implementation in a power supply system includes steps (A), (B), and (C). In step (A), while the power supply system is providing electricity to a load, a control circuit determines, an estimated capacitance value related to an output capacitor. In step (B), while the output capacitor is providing electricity to the load, the control circuit determines an average power value related to the electricity provided by the output capacitor to the load. In step (C), the control circuit determines an estimated hold-up time value related to the power supply system based on a predetermined target voltage value, a predetermined minimum voltage value, the average power value and the estimated capacitance value.

Abstract: Techniques are presented for improving the efficiency of charge pumps. A charge pump, or a stage of a charge pump, provides its output through a pass gate. For example, this could be a charge pump of a voltage doubler type, where the output is supplied through pass gate transistors whose gates are connected to receive the output of an auxiliary section, also of a voltage doubler type of design. The waveforms provided to the gates of the pass gate transistors are modified so that their low values are offset to a higher value to take into account the threshold voltage of the pass gate transistors. In a voltage doubler based example, this can be implemented by way of introducing diodes into each leg of the auxiliary section.

Abstract: To maintain stability of memory array operations, a current source supplies a common source line of a memory. The magnitude of the regulation current from the source is dynamically determined based on the amount of current from the array itself through use of a feedback control signal provided by a current comparator circuit. The current comparison circuit can use either a digital or an analog implementation.