Patents by Inventor En Wang

En Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10529386
    Abstract: Disclosed is a device including a distributed controller and a common controller. The distributed controller includes a first circuit to generate an output voltage according to a control signal. The common controller includes a common feedback loop coupled to the distributed controller. The common feedback loop includes an amplifier circuit to generate the control signal, and a second circuit coupled to the amplifier circuit. The second circuit replicates the first circuit and stabilizes the control signal.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: January 7, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Albert Chang, Sung-En Wang, Khin Htoo, Supraja Sundaresan, Matt Chen
  • Patent number: 10424358
    Abstract: Disclosed is a device including a selected distributed driver, a first feedback control circuit, and a second feedback control circuit. The first feedback control circuit is coupled to the selected distributed driver. The first feedback control circuit is configured to maintain an output of the selected distributed driver within a first predetermined range. The second feedback control circuit is selectively coupled to the selected distributed driver and is configured to maintain the output of the selected distributed driver to be within a second predetermined range. The second predetermined range is within the first predetermined range.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: September 24, 2019
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Supraja Sundaresan, Sung-en Wang, Khin Htoo, Primit Modi
  • Publication number: 20190006020
    Abstract: A memory system includes a leakage current detection circuit to detect for leakage current flowing in a bias line, such as due to a short or a breakdown of dielectric. A leakage sense circuit senses the leakage current, and generates a common mode voltage in response to the sensing. A tracking circuit tracks the common mode voltage, and a leakage current measurement circuit measures the leakage current based on the common mode voltage tracking. The leakage current detection circuit may be an on-the-fly leakage current detection circuit that detects leakage current as part of another operation, such as a memory operation.
    Type: Application
    Filed: June 21, 2018
    Publication date: January 3, 2019
    Applicant: SanDisk Technologies LLC
    Inventors: Supraja Sundaresan, Sung-En Wang, Steve Choi
  • Publication number: 20190006019
    Abstract: A leakage detection circuit is configured to generate a regulated voltage at a node and supply the regulated voltage to one or more word lines. The leakage detection circuit may adjust a source current used to regulate the voltage in response to leakage current sourced to the node. The leakage detection circuit may control an adjustable current sink connected to the node in order to maintain the source current within a target range. The leakage detection circuit may measure the amount of the leakage current by determining how much it had to adjust the leakage current amount to keep the source current within the target range.
    Type: Application
    Filed: June 28, 2017
    Publication date: January 3, 2019
    Applicant: SanDisk Technologies LLC
    Inventors: Sung-En Wang, Jonathan Huynh
  • Publication number: 20180358057
    Abstract: Disclosed is a device including a distributed controller and a common controller. The distributed controller includes a first circuit to generate an output voltage according to a control signal. The common controller includes a common feedback loop coupled to the distributed controller. The common feedback loop includes an amplifier circuit to generate the control signal, and a second circuit coupled to the amplifier circuit. The second circuit replicates the first circuit and stabilizes the control signal.
    Type: Application
    Filed: January 25, 2018
    Publication date: December 13, 2018
    Inventors: Albert CHANG, Sung-En WANG, Khin HTOO, Supraja SUNDARESAN, Matt CHEN
  • Publication number: 20180358069
    Abstract: Disclosed is a device including a selected distributed driver, a first feedback control circuit, and a second feedback control circuit. The first feedback control circuit is coupled to the selected distributed driver. The first feedback control circuit is configured to maintain an output of the selected distributed driver within a first predetermined range. The second feedback control circuit is selectively coupled to the selected distributed driver and is configured to maintain the output of the selected distributed driver to be within a second predetermined range. The second predetermined range is within the first predetermined range.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 13, 2018
    Inventors: Supraja SUNDARESAN, Sung-en WANG, Khin HTOO, Primit MODI
  • Publication number: 20180340164
    Abstract: The present invention provides a method for increasing the metabolic rate of recombinant microorganism growth under an anaerobic environment, wherein a recombinant strain is placed under an anaerobic environment and cultured under a culture condition, wherein the culture condition includes a potential difference and a nitrogen source, but not includes an organic carbon source. According to the method disclosed by the present invention, the recombinant strain can perform anaerobic respiration and metabolic reaction in an anaerobic environment, and can grow stably and rapidly.
    Type: Application
    Filed: May 22, 2018
    Publication date: November 29, 2018
    Inventors: Chieh-Chen Huang, Shou-Chen LO, Dong-Yan Wu, Jia-En WANG, Shuo CHENG, Guan-Min LI, Yu-Han JIANG, Tzu-Yu LIN, Yu-Chieh CHEN, Nai-Tzu KUO, Man-Yun YU, Hsuan-Yu LIU
  • Publication number: 20180279837
    Abstract: The present invention relates to a scald-proof pot handle, comprising a proximal end, a handle body and a distal end which are connected in order. A heat absorbing component is disposed within the handle body and extends along the same direction of the handle body. The heat absorbing component is connected and fixed to one end of the handle body, and an air layer is formed between the heat absorbing component and the handle body. The proximal end comprises a first connecting portion and a second connecting portion. The first connecting portion is connected to the pot body, and the second connecting portion is connected to the handle body. The end surface of the first connecting portion that contacts with the pot body is a curved surface, and the radian of the curved surface is consistent with the radian of the surface of the pot body.
    Type: Application
    Filed: July 21, 2017
    Publication date: October 4, 2018
    Inventor: En WANG
  • Patent number: 9923479
    Abstract: A power supply includes a boost converter, a capacitor, a step-down converter and a control unit. The boost converter, when activated, converts an input voltage into a boost voltage. The capacitor has a bulk voltage which is equal to the boost voltage when the boost converter is activated. The step-down converter converts the boost voltage into a step-down voltage for output. While the boost converter is deactivated, the control unit samples the input voltage and the bulk voltage, calculates an estimated value, and determines a calibration parameter. While the boost converter is activated, the control unit calculates a calibration value for enabling the boost converter to convert the input voltage with reference to the calibration value.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: March 20, 2018
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corp.
    Inventors: Yu-Shun Liu, Shi-en Wang, Shun-Hung Lo
  • Publication number: 20170353121
    Abstract: A power supply includes a boost converter, a capacitor, a step-down converter and a control unit. The boost converter, when activated, converts an input voltage into a boost voltage. The capacitor has a bulk voltage which is equal to the boost voltage when the boost converter is activated. The step-down converter converts the boost voltage into a step-down voltage for output. While the boost converter is deactivated, the control unit samples the input voltage and the bulk voltage, calculates an estimated value, and determines a calibration parameter. While the boost converter is activated, the control unit calculates a calibration value for enabling the boost converter to convert the input voltage with reference to the calibration value.
    Type: Application
    Filed: April 25, 2017
    Publication date: December 7, 2017
    Inventors: YU-SHUN LIU, SHI-EN WANG, SHUN-HUNG LO
  • Patent number: 9698676
    Abstract: Techniques are presented for determining current levels based on the behavior of a charge pump system while driving a load under regulation. Rather than diving the load directly, a fixed pump output voltage is used to supply a step-down regulator, which it turn drives the load at the selected voltage. While driving the load under regulation, the number of pump clocks during a set interval is counted. This can be compared to a reference that can be obtained, for example, from the numbers of cycles needed to drive a known load current over an interval of the duration. By comparing the counts, the amount of current being drawn by the load can be determined. This technique can be applied to determining leakage from circuit elements, such as word lines in a non-volatile memory.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: July 4, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jonathan Huynh, Trung Pham, Sung-en Wang, Jongmin Park
  • Patent number: 9692255
    Abstract: A control method for implementation in a power supply system includes steps (A), (B), and (C). In step (A), while the power supply system is providing electricity to a load, a control circuit determines, an estimated capacitance value related to an output capacitor. In step (B), while the output capacitor is providing electricity to the load, the control circuit determines an average power value related to the electricity provided by the output capacitor to the load. In step (C), the control circuit determines an estimated hold-up time value related to the power supply system based on a predetermined target voltage value, a predetermined minimum voltage value, the average power value and the estimated capacitance value.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: June 27, 2017
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corp.
    Inventors: Yu-Shun Liu, Shi-En Wang
  • Patent number: 9654062
    Abstract: An amplifier system an amplified path and a bypass path for carrying an RF signal. A switch in the amplified system routes the RF signal through the amplified path in response to a normal condition in the amplifier system, and routes the RF signal through the bypass path in response to an abnormal condition in the amplifier system. The amplified path includes an amplified forward circuit and a return circuit. The amplified forward circuit has an amplifier, and the return circuit has a return amplifier and detection circuitry for providing power to the return amplifier. The detection circuitry provides power to the return amplifier in response to a normal condition in the return circuit, and removes power from the return amplifier in response to an abnormal condition in the return circuit.
    Type: Grant
    Filed: February 15, 2014
    Date of Patent: May 16, 2017
    Inventors: Kang Lin, Jon-En Wang
  • Patent number: 9553506
    Abstract: Techniques and apparatuses for identifying weak charge pumps and for setting an optimal clock period for charge pumps to minimize variations in a current-voltage characteristic. A current sink which absorbs a specified current is connected to an output node of a charge pump. In one approach, a success or fail status is set for a charge pump by driving it with a specified clock period in a constantly pumping mode and determining if the output voltage reaches a specified output voltage. In another approach, a success or fail status is set for a charge pump by driving it with a specified clock period in a regulation mode and determining if the period in which the output voltage cycles is a specified multiple, e.g., 2×, of a period of the clock signal. In another approach, an optimal clock period is determined.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: January 24, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Jonathan Huynh, Sung-En Wang, Jongmin Park
  • Patent number: 9514831
    Abstract: A circuit for providing a plurality of clock signals of differing frequencies includes: a phase locked loop section including a first voltage controller oscillator, connected to receive a reference clock value and generate therefrom a first voltage level, wherein the first voltage controller oscillator receives the first voltage level and generates therefrom a first clock signal; and one or more second voltage controller oscillators, each connected to receive the first voltage level, a corresponding trim value and a corresponding control voltage and derive therefrom a corresponding second clock signal.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: December 6, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Jonathan Huynh, Sung-En Wang, Steve Choi, Jongmin Park
  • Patent number: 9418750
    Abstract: In non-volatile memories, bit lines and word lines commonly to driving and decoding circuitry on a single end. Techniques are presented for determining the time constant associated with charging the far end of such lines from the near end, at which the circuitry is connected. While driving a discharged line from the near end, the number of clock cycles for the current to drop from a first level to a second level can be used to estimate the time constant for the far end. Alternately, the line can be initially charged up, after which the current is monitored at the near end. The differences in time constants for different word lines can be used to vary the time used when accessing a selected word line.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: August 16, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Sung-En Wang, Jonathan Huynh, Jongmin Park
  • Patent number: 9368224
    Abstract: To maintain stability of memory array operations, a supplemental current can supply a common source line of a memory array so that the combined current from the memory array and supplemental current is at least a minimum regulation current level. When enabled for sensing operations, a driver circuit maintains the common source line's voltage level. A current subtractor circuit determines the difference between a reference current and a current proportional to the current flowing from the array, where the reference current is proportional to the minimum regulation current. The difference current is then mirrored by a self-adjusting current loop and supplied to the common source line to maintain its current level.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: June 14, 2016
    Assignee: SanDisk Technologies, Inc.
    Inventors: Sung-En Wang, Jonathan Huynh, Steve Choi, Jongmin Park
  • Publication number: 20160078958
    Abstract: In non-volatile memories, bit lines and word lines commonly to driving and decoding circuitry on a single end. Techniques are presented for determining the time constant associated with charging the far end of such lines from the near end, at which the circuitry is connected. While driving a discharged line from the near end, the number of clock cycles for the current to drop from a first level to a second level can be used to estimate the time constant for the far end. Alternately, the line can be initially charged up, after which the current is monitored at the near end. The differences in time constants for different word lines can be used to vary the time used when accessing a selected word line.
    Type: Application
    Filed: September 15, 2014
    Publication date: March 17, 2016
    Inventors: Sung-En Wang, Jonathan Huynh, Jongmin Park
  • Patent number: 9177663
    Abstract: To maintain stability of memory array operations, a current source supplies a common source line of a memory. The magnitude of the regulation current from the source is dynamically determined based on the amount of current from the array itself through use of a feedback control signal provided by a current comparator circuit. The current comparison circuit can use either a digital or an analog implementation.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: November 3, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Jonathan H. Huynh, Sung-En Wang, Feng Pan
  • Patent number: D876876
    Type: Grant
    Filed: February 7, 2018
    Date of Patent: March 3, 2020
    Assignee: COCABA COOKWARE MANUFACTURE CO., LTD.
    Inventor: En Wang