Patents by Inventor Eok Su Kim

Eok Su Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128251
    Abstract: A display device includes a first conductive layer disposed on a substrate, a passivation layer disposed on the first conductive layer, a second conductive layer disposed on the passivation layer, a via layer disposed on the second conductive layer, a third conductive layer disposed on the via layer, the third conductive layer including a first electrode, a second electrode, a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other, and a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer and the passivation layer.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Kyung Jin JEON, So Young KOO, Eok Su KIM, Hyung Jun KIM, Yun Yong NAM, Jun Hyung LIM
  • Publication number: 20240121983
    Abstract: A thin film transistor includes a substrate; an active layer including a channel area, a first conductive area, and a second conductive area; a gate insulating layer on a portion of the active layer; a first through hole penetrating through a portion of the first conductive area; a second through hole penetrating through a portion of the second conductive area; a gate electrode overlapping the channel area of the active layer; a first electrode electrically connected to the first conductive area; and a second electrode electrically connected to the second conductive area. One side of the first electrode adjacent to the first through hole is parallel to the one side of the first through hole, the first electrode including protrusion parts at both ends thereof and a groove part concavely recessed from the gate electrode.
    Type: Application
    Filed: September 14, 2023
    Publication date: April 11, 2024
    Inventors: So Young KOO, Myoung Hwa KIM, Eok Su KIM, Hyung Jun Kim
  • Patent number: 11942488
    Abstract: A display device includes: a substrate; a first conductive layer on the substrate and comprising a first signal line; an insulating layer pattern on the first conductive layer; a semiconductor pattern on the insulating layer pattern; a gate insulating layer on the semiconductor pattern; and a second conductive layer comprising a gate electrode on the gate insulting layer and a first source/drain electrode and a second source/drain electrode, each on at least a part of the semiconductor pattern, wherein the insulating layer pattern and the semiconductor pattern have a same planar shape, the semiconductor pattern comprises a channel region overlapping the gate electrode, a first source/drain region on a first side of the channel region and a second source/drain region on a second side of the channel region, and the first source/drain electrode electrically connects the first source/drain region and the first signal line.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: March 26, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Joon Seok Park, Jun Hyung Lim
  • Patent number: 11942482
    Abstract: A display device according to an embodiment includes a light blocking layer disposed on a substrate; an oxygen supply layer disposed on and contacting the light blocking layer; a semiconductor layer disposed on the oxygen supply layer; and a light emitting diode electrically connected with the semiconductor layer. The semiconductor layer includes an oxide semiconductor, and the oxygen supply layer includes a metal oxide that includes at least one of indium, zinc, gallium, and tin.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyung Jun Kim, So Young Koo, Eok Su Kim, Yun Yong Nam, Jun Hyung Lim, Kyung Jin Jeon
  • Publication number: 20240063356
    Abstract: A display device includes: a first electrode and a second electrode spaced from the first electrode; a first insulating layer on the first electrode and the second electrode; a plurality of light emitting elements on the first insulating layer and on the first electrode and the second electrode; a first connection electrode on the first electrode and contacting the plurality of light emitting elements; and a second connection electrode on the second electrode and contacting the plurality of light emitting elements, wherein each of the first electrode and the second electrode includes a first metal layer and a second metal layer on the first metal layer and including a different material from the first metal layer, a thickness of the first metal layer is between 100 ? to 300 ?, and a thickness of each of the first electrode and the second electrode is 2600 ? or less.
    Type: Application
    Filed: June 27, 2023
    Publication date: February 22, 2024
    Inventors: Yun Yong NAM, So Young KOO, Eok Su KIM, Hyoung Do KIM, Hyung Jun KIM, Joon Seok PARK
  • Patent number: 11894355
    Abstract: A display device includes a first conductive layer disposed on a substrate, a passivation layer disposed on the first conductive layer, a second conductive layer disposed on the passivation layer, a via layer disposed on the second conductive layer, a third conductive layer disposed on the via layer, the third conductive layer including a first electrode, a second electrode, a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other, and a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer and the passivation layer.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: February 6, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Yun Yong Nam, Jun Hyung Lim
  • Publication number: 20240040870
    Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 1, 2024
    Inventors: Kyung Jin JEON, So Young KOO, Eok Su KIM, Hyung Jun KIM, Jun Hyung LIM
  • Publication number: 20240030235
    Abstract: A display device according to an embodiment of the present disclosure includes: a substrate; a first conductive layer on the substrate; a first insulating layer on the first conductive layer; an active pattern on the first insulating layer and including a semiconductor material; a second insulating layer on the active pattern; and a second conductive layer on the second insulating layer, wherein the first insulating layer has a first opening exposing the first conductive layer, the second insulating layer has a second opening exposing the first conductive layer, a breadth of the first opening is different than a breadth of the second opening, and a side surface of the first opening and a side surface of the second opening are formed to a top surface of the first conductive layer.
    Type: Application
    Filed: October 3, 2023
    Publication date: January 25, 2024
    Inventors: So Young KOO, Jay Bum KIM, Kyung Jin JEON, Eok Su KIM, Jun Hyung LIM
  • Publication number: 20230380228
    Abstract: A display device including a first substrate including a display area, and a non-display area, a second substrate on the first substrate, and a sealing member in a sealing area of the non-display area. The first substrate includes a first base portion, a first conductive layer including a first signal line and a lower light blocking layer, on the first base portion, a buffer layer on the first conductive layer, a semiconductor layer overlapping the lower light blocking layer, on the buffer layer, a gate insulating layer on the semiconductor layer, and a second conductive layer including second and third signal lines electrically connected to the first signal line, and a gate electrode overlapping the semiconductor layer, on the gate insulating layer. In plan view, the first signal line is between the second signal line and the third signal line. The first signal line overlaps the sealing member.
    Type: Application
    Filed: February 23, 2023
    Publication date: November 23, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Hyung Jun KIM, Eok Su KIM, Hyoung Do KIM, Yun Yong NAM, Joon Seok PARK, Jun Hyung LIM
  • Patent number: 11765947
    Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: September 19, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Jun Hyung Lim
  • Publication number: 20230282790
    Abstract: Provided is a display device including a voltage line, a passivation layer disposed on the voltage line and having an undercut shape, a first connecting electrode disposed inside the undercut shape, a second connecting electrode electrically connecting the voltage line and the first connecting line, and a common electrode electrically connected to the voltage line through at least one of the first connecting electrode and the second connecting electrode.
    Type: Application
    Filed: October 25, 2022
    Publication date: September 7, 2023
    Inventors: YUNYONG NAM, EOK SU KIM, HYUNGJUN KIM, JUN HYUNG LIM, KYUNGJIN JEON
  • Patent number: 11751439
    Abstract: A display device includes: a substrate; a first semiconductor layer disposed on the substrate, where the first semiconductor layer includes a channel region and a doped region; a first gate electrode disposed to overlap the channel region of the first semiconductor layer; an intermediate film disposed on the first semiconductor layer and the first gate electrode; and a first electrode disposed on the intermediate film, where an opening is defined through the intermediate film to overlap the doped region of the first semiconductor layer, the doped region of the first semiconductor layer and the first electrode contacts each other through the opening, and an area of a cross-section of the opening parallel to the substrate is in a range of about 49 ?m2 to about 81 ?m2.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: September 5, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyung Jun Kim, So Young Koo, Eok Su Kim, Yun Yong Nam, Jun Hyung Lim, Kyung Jin Jeon
  • Publication number: 20230253415
    Abstract: A display device includes: a substrate; a first conductive layer on the substrate and comprising a first signal line; an insulating layer pattern on the first conductive layer; a semiconductor pattern on the insulating layer pattern; a gate insulating layer on the semiconductor pattern; and a second conductive layer comprising a gate electrode on the gate insulting layer and a first source/drain electrode and a second source/drain electrode, each on at least a part of the semiconductor pattern, wherein the insulating layer pattern and the semiconductor pattern have a same planar shape, the semiconductor pattern comprises a channel region overlapping the gate electrode, a first source/drain region on a first side of the channel region and a second source/drain region on a second side of the channel region, and the first source/drain electrode electrically connects the first source/drain region and the first signal line.
    Type: Application
    Filed: March 30, 2023
    Publication date: August 10, 2023
    Inventors: Kyung Jin JEON, So Young KOO, Eok Su KIM, Hyung Jun KIM, Joon Seok PARK, Jun Hyung LIM
  • Publication number: 20230189585
    Abstract: The present disclosure relates to a display panel and a method for fabricating the same. According to an embodiment, a method for fabricating a display panel, comprises disposing a circuit array and connection lines on the support substrate, the circuit array disposed in the display area, the connection lines disposed in a non-display area; disposing a via layer on the support substrate; providing a sealing hole surrounding the display area by patterning the via layer; disposing a sealing member surrounding the display area on an encapsulation substrate. In the disposing of the circuit array and the connection lines comprises disposing an active layer overlapping a light shielding member and disposing an etch stopper corresponding to at least a portion of an overlapping area between the sealing hole and the first connecting line part, by patterning a semiconductor material layer on the buffer layer.
    Type: Application
    Filed: September 12, 2022
    Publication date: June 15, 2023
    Inventors: Yun Yong NAM, So Young KOO, Eok Su KIM, Hyung Jun KIM, Jun Hyung LIM, Kyung Jin JEON
  • Publication number: 20230127261
    Abstract: A display device includes a first conductive layer including a first voltage line and a second voltage line, a buffer layer, a semiconductor layer including a first active layer and a second active layer, a first gate insulating layer, a second conductive layer including a first gate electrode overlapping the first active layer and a second gate electrode overlapping the second active layer, a passivation layer, a via layer, a bank pattern layer including a first bank pattern and a second bank pattern partially spaced apart from each other, a third conductive layer including a first electrode and a second electrode spaced apart from each other, and light emitting elements. The passivation layer includes silicon nitride (SiNx), and a ratio of a number of silicon-hydrogen bonds (Si—H) to a number of nitrogen-hydrogen bonds (N—H) in the silicon nitride (SiNx) is in a range of about 1:0.6 to about 1:1.5.
    Type: Application
    Filed: July 8, 2022
    Publication date: April 27, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Hyung Jun KIM, So Young KOO, Eok Su KIM, Yun Yong NAM, Jun Hyung LIM, Kyung Jin JEON
  • Patent number: 11626426
    Abstract: A display device includes: a substrate; a first conductive layer on the substrate and comprising a first signal line; an insulating layer pattern on the first conductive layer; a semiconductor pattern on the insulating layer pattern; a gate insulating layer on the semiconductor pattern; and a second conductive layer comprising a gate electrode on the gate insulting layer and a first source/drain electrode and a second source/drain electrode, each on at least a part of the semiconductor pattern, wherein the insulating layer pattern and the semiconductor pattern have a same planar shape, the semiconductor pattern comprises a channel region overlapping the gate electrode, a first source/drain region on a first side of the channel region and a second source/drain region on a second side of the channel region, and the first source/drain electrode electrically connects the first source/drain region and the first signal line.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: April 11, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Joon Seok Park, Jun Hyung Lim
  • Patent number: 11600682
    Abstract: A display device and a method of driving a display device are provided. A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern, a buffer layer on the first conductive layer, a semiconductor layer including a semiconductor pattern on the buffer layer, a gate insulating layer on the semiconductor pattern, a second conductive layer including a gate electrode on the gate insulating layer, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including a first conductive pattern electrically coupling the lower light blocking pattern to the semiconductor pattern, wherein the first conductive pattern is coupled to the lower light blocking pattern through a first contact hole passing through the planarization layer and the buffer layer, and coupled to the semiconductor pattern through a second contact hole passing through the planarization layer.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: March 7, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Jun Hyung Lim
  • Patent number: 11594559
    Abstract: A display device may include a first gate electrode disposed on a substrate, a buffer layer disposed on the first gate electrode, a first active pattern on the buffer layer, the first active pattern overlapping the first gate electrode and including an oxide semiconductor, a second active pattern on the buffer layer, spaced apart from the first active pattern, and including an oxide semiconductor, the second active pattern including a channel region, and a source region and a drain region, a source pattern and a drain pattern respectively at ends of the first active pattern, a first insulation pattern disposed on the first active pattern, a second insulation pattern disposed on the channel region, a first oxygen supply pattern on the first insulation pattern, a second oxygen supply pattern on the second insulation pattern, and a second gate electrode on the second oxygen supply pattern.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: February 28, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joon Seok Park, So Young Koo, Eok Su Kim, Hyung Jun Kim, Sang Woo Sohn, Jun Hyung Lim, Kyung Jin Jeon
  • Patent number: 11574987
    Abstract: An electronic apparatus includes a first transistor including a first oxide semiconductor pattern, a second transistor including a second oxide semiconductor pattern, a blocking layer including a conductive material, a signal line including a first line and a second line which are disposed on different layers, and a bridge pattern electrically connected to each of the first transistor, the first line of the signal line, and the second line of the signal line, wherein the first line of the signal line and the blocking layer are disposed on a same layer, and the second line of the signal line and the first oxide semiconductor pattern are disposed on a same layer.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: February 7, 2023
    Assignee: SAMSUNG DISPLAY CO, , LTD.
    Inventors: Kyungjin Jeon, Soyoung Koo, Eok Su Kim, Hyungjun Kim, Yunyong Nam, Jun Hyung Lim
  • Patent number: 11521552
    Abstract: A display device, includes: a pixel connected to a scan line and a data line crossing the scan line, wherein the pixel includes a light emitting element, a driving transistor configured to control a driving current supplied to the light emitting element according to a data voltage received from the data line, and a first switching transistor configured to apply the data voltage of the data line to the driving transistor according to a scan signal applied to the scan line; wherein the driving transistor includes a first active layer including an oxide semiconductor and a first oxide layer on the first active layer and including an oxide semiconductor; and wherein the first switching transistor includes a second active layer on the first active layer and including the same oxide semiconductor as the first oxide layer.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: December 6, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joon Seok Park, So Young Koo, Myoung Hwa Kim, Eok Su Kim, Tae Sang Kim, Hyung Jun Kim, Yeon Keon Moon, Geun Chul Park, Jun Hyung Lim, Kyung Jin Jeon, Hye Lim Choi