Abstract: A display device according to an embodiment includes a light blocking layer disposed on a substrate; an oxygen supply layer disposed on and contacting the light blocking layer; a semiconductor layer disposed on the oxygen supply layer; and a light emitting diode electrically connected with the semiconductor layer. The semiconductor layer includes an oxide semiconductor, and the oxygen supply layer includes a metal oxide that includes at least one of indium, zinc, gallium, and tin.

Abstract: A display device and a method of manufacturing a display device are provided. The display device includes a first conductive layer on a substrate, a passivation layer disposed on the first conductive layer and exposing at least a part of the first conductive layer, a second conductive layer disposed on the passivation layer and covering an upper surface of the passivation layer, a via layer on the second conductive layer, a third conductive layer including a first electrode, a second electrode, and a connection pattern, and spaced apart from each other on the via layer, and a light emitting element having ends that are disposed on the first electrode and the second electrode, respectively. The connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer.

Abstract: A display device includes first banks on a substrate and spaced apart from each other, a first electrode and a second electrode on the first banks and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, and light emitting elements on the first insulating layer and each having ends on the first electrode and the second electrode. Each of the first banks includes a first pattern portion including concave portions and convex portions. The first pattern portions of the first banks are disposed on side surfaces of the first banks. The side surfaces are spaced apart and face each other. Each of the first electrode and the second electrode includes a second pattern portion on the first pattern portion and having a pattern shape corresponding to the first pattern portion on a surface thereof.

Abstract: A display device includes a first conductive layer disposed on a substrate, a passivation layer disposed on the first conductive layer, a second conductive layer disposed on the passivation layer, a via layer disposed on the second conductive layer, a third conductive layer disposed on the via layer, the third conductive layer including a first electrode, a second electrode, a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other, and a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer and the passivation layer.

Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.

Abstract: A display device includes: a substrate; a first semiconductor layer disposed on the substrate, where the first semiconductor layer includes a channel region and a doped region; a first gate electrode disposed to overlap the channel region of the first semiconductor layer; an intermediate film disposed on the first semiconductor layer and the first gate electrode; and a first electrode disposed on the intermediate film, where an opening is defined through the intermediate film to overlap the doped region of the first semiconductor layer, the doped region of the first semiconductor layer and the first electrode contacts each other through the opening, and an area of a cross-section of the opening parallel to the substrate is in a range of about 49 ?m2 to about 81 ?m2.

Abstract: An electronic apparatus includes a first transistor including a first oxide semiconductor pattern, a second transistor including a second oxide semiconductor pattern, a blocking layer including a conductive material, a signal line including a first line and a second line which are disposed on different layers, and a bridge pattern electrically connected to each of the first transistor, the first line of the signal line, and the second line of the signal line, wherein the first line of the signal line and the blocking layer are disposed on a same layer, and the second line of the signal line and the first oxide semiconductor pattern are disposed on a same layer.

Abstract: A display device may include a first gate electrode disposed on a substrate, a buffer layer disposed on the first gate electrode, a first active pattern on the buffer layer, the first active pattern overlapping the first gate electrode and including an oxide semiconductor, a second active pattern on the buffer layer, spaced apart from the first active pattern, and including an oxide semiconductor, the second active pattern including a channel region, and a source region and a drain region, a source pattern and a drain pattern respectively at ends of the first active pattern, a first insulation pattern disposed on the first active pattern, a second insulation pattern disposed on the channel region, a first oxygen supply pattern on the first insulation pattern, a second oxygen supply pattern on the second insulation pattern, and a second gate electrode on the second oxygen supply pattern.

Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.

Abstract: A display device and a method of driving a display device are provided. A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern, a buffer layer on the first conductive layer, a semiconductor layer including a semiconductor pattern on the buffer layer, a gate insulating layer on the semiconductor pattern, a second conductive layer including a gate electrode on the gate insulating layer, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including a first conductive pattern electrically coupling the lower light blocking pattern to the semiconductor pattern, wherein the first conductive pattern is coupled to the lower light blocking pattern through a first contact hole passing through the planarization layer and the buffer layer, and coupled to the semiconductor pattern through a second contact hole passing through the planarization layer.

Abstract: A display device includes: a substrate; a first conductive layer on the substrate and comprising a first signal line; an insulating layer pattern on the first conductive layer; a semiconductor pattern on the insulating layer pattern; a gate insulating layer on the semiconductor pattern; and a second conductive layer comprising a gate electrode on the gate insulting layer and a first source/drain electrode and a second source/drain electrode, each on at least a part of the semiconductor pattern, wherein the insulating layer pattern and the semiconductor pattern have a same planar shape, the semiconductor pattern comprises a channel region overlapping the gate electrode, a first source/drain region on a first side of the channel region and a second source/drain region on a second side of the channel region, and the first source/drain electrode electrically connects the first source/drain region and the first signal line.

Abstract: A display device according to an embodiment of the present disclosure includes: a substrate; a first conductive layer on the substrate; a first insulating layer on the first conductive layer; an active pattern on the first insulating layer and including a semiconductor material; a second insulating layer on the active pattern; and a second conductive layer on the second insulating layer, wherein the first insulating layer has a first opening exposing the first conductive layer, the second insulating layer has a second opening exposing the first conductive layer, a breadth of the first opening is different than a breadth of the second opening, and a side surface of the first opening and a side surface of the second opening are formed to a top surface of the first conductive layer.

Abstract: A display device according to some embodiments includes: a substrate; a first transistor and a second transistor disposed on the substrate and spaced apart from each other; a first electrode connected to one of the first transistor and the second transistor; a second electrode overlapping the first electrode; and a light emitting layer between the first electrode and the second electrode, wherein the first transistor may include: a first semiconductor layer on the substrate; a first gate electrode on the first semiconductor layer; and a first source electrode and a first drain electrode connected to the first semiconductor layer, and the second transistor may include: a second semiconductor layer on the substrate; a second gate electrode on the second semiconductor layer; and a second source electrode and a second drain electrode connected to the second semiconductor layer, and the first gate electrode and the second semiconductor layer may be on the same layer.

Abstract: According to some embodiments of the present disclosure, a display device includes an active pattern including a metal oxide, a gate electrode overlapping the active pattern, a first capacitor electrode spaced apart from the active pattern and including a conductive oxide, and a second capacitor electrode on the first capacitor electrode.

Abstract: A display device, includes: a pixel connected to a scan line and a data line crossing the scan line, wherein the pixel includes a light emitting element, a driving transistor configured to control a driving current supplied to the light emitting element according to a data voltage received from the data line, and a first switching transistor configured to apply the data voltage of the data line to the driving transistor according to a scan signal applied to the scan line; wherein the driving transistor includes a first active layer including an oxide semiconductor and a first oxide layer on the first active layer and including an oxide semiconductor; and wherein the first switching transistor includes a second active layer on the first active layer and including the same oxide semiconductor as the first oxide layer.

Abstract: A display panel includes a first display substrate including a display area and a non-display area which is at a periphery of the display area, a second display substrate facing the first display substrate, a display device in the display area between the first and second display substrates and including a first electrode, an optical layer including an optical layer material, and a second electrode, and a sealing member which is disposed in the non-display area and attaches the first and second display substrates to each other. The sealing member defines a sealing portion thereof which restricts movement of the display area optical layer material to outside the display area, and a receiving portion thereof in which the optical layer material is receivable.

Abstract: A transistor array panel according to an exemplary embodiment includes: a substrate; a first buffer layer positioned on the substrate; and a first transistor and a second transistor positioned on the substrate and separated from each other, wherein the first transistor includes a polycrystalline semiconductor positioned on the substrate, and a first gate electrode overlapping the polycrystalline semiconductor, the second transistor includes an oxide semiconductor positioned on the first buffer layer, and a second gate electrode overlapping the oxide semiconductor, the first buffer layer covers the first gate electrode, and the first buffer layer includes a silicon oxide.

Abstract: A thin film transistor array panel includes: a substrate; a semiconductor layer disposed on the substrate; a gate electrode disposed on the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer to not overlap the gate electrode, wherein a first edge of the gate electrode is aligned with a second edge of the semiconductor layer in a direction that is perpendicular to the substrate.

Abstract: A thin film transistor substrate includes a gate electrode, a channel layer overlapping the gate electrode, a source electrode overlapping the channel layer, a drain electrode overlapping the channel layer and the source electrode, and a spacer disposed between the source electrode and the drain electrode.

Abstract: A thin film transistor array panel includes: a substrate; a semiconductor layer disposed on the substrate; a gate electrode disposed on the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer to not overlap the gate electrode, wherein a first edge of the gate electrode is aligned with a second edge of the semiconductor layer in a direction that is perpendicular to the substrate.