Abstract: Embodiments disclosed herein include a semiconductor structure for reducing contact to contact shorting. The semiconductor structure may include a gate cut region with a liner and a dielectric core confined within a first lateral side of the liner and a second lateral side of the liner. The semiconductor structure may also include a first source/drain (S/D) contact overlapping the first lateral side and the dielectric core. The first S/D may include a line-end that contacts the second lateral side of the liner.

Abstract: A method of forming vertical transport field effect transistor (VTFET) devices is provided. The method includes forming a plurality of vertical fins on an upper insulating layer of a dual insulator layer semiconductor-on-insulator (SeOI) substrate, and forming two masking blocks on the plurality of vertical fins, wherein a portion of a protective layer and a fin template on each of the plurality of vertical fins is exposed between the two masking blocks. The method further includes removing a portion of the upper insulating layer between the two masking blocks to form a first cavity beneath the plurality of vertical fins, and forming a first bottom source/drain in the first cavity below the plurality of vertical fins. The method further includes replacing the two masking blocks with a masking layer patterned to have two mask openings above portions of the upper insulating layer adjacent to the first bottom source/drain.

Abstract: A semiconductor structure and a method of making the same includes a first recessed region in a semiconductor structure, the first recessed region defining a first opening with a first positive tapering profile, as at least part of the first positive tapering profile, widening the first opening in a direction towards a top source/drain region of the semiconductor structure at a first tapering angle, and a top source/drain contact within the first opening, the top source/drain contact surrounding a surface of the top source/drain region. The semiconductor structure further includes a protective liner located at an interface between a bottom portion of the top source/drain region, a top spacer adjacent to the top source/drain region and a dielectric material between two consecutive top source/drain regions, the protective liner protects the top source/drain regions during contact patterning.

Abstract: Interconnect structures including super vias are formed during back-end-of-line processing using sacrificial placeholders to protect the bottom portions of the super vias while upper portions of the super vias are formed. The sacrificial placeholders are removed and replaced by metal conductors that fill the bottom and upper portions of the super vias.

Abstract: A staple gun and a method of using the same. A stapling mechanism in the housing is activated to deliver a staple through an aperture in a housing wall and drive the staple into a surface around a stack of one or more electric cables. The gun includes a reciprocating cable guide for centering the gun on the stack of cables and closing a safety switch to permit the gun's trigger to be activated. A spacer extending outwardly from the housing wall rests on the upper surface of the cable stack. The spacer and a bumper that engages a hammer of the stapling mechanism provide for automatic depth adjustment when driving the staple into the surface. A reciprocating cable guard extending outwardly from the housing wall is positioned between the stack of cables and the staple to aid in preventing the staple from piercing the cable.

Abstract: X-ray transparent insulation can be sandwiched between an x-ray window and a ground plate. The x-ray transparent insulation can include aluminum nitride, boron nitride, or polyetherimide. The x-ray transparent insulation can include a curved side. The x-ray transparent insulation can be transparent to x-rays and resistant to x-ray damage, and can have high thermal conductivity. An x-ray window can have high thermal conductivity, high electrical conductivity, high melting point, low cost, and matched coefficient of thermal conductivity with the anode. The x-ray window can be made of tungsten. For consistent x-ray spot size and location, a focusing plate and a filament can be attached to a cathode with an open channel of the focusing plate aligned with a longitudinal dimension of the filament. Tabs of the focusing plate bordering the open channel can be bent to align with a location of the filament.

Abstract: A method for forming a stacked transistor includes forming a sacrificial cap over a first interconnect of a lower level transistor. The method further includes forming an upper level transistor above the sacrificial cap. The method further includes removing the sacrificial cap to form an opening such that the opening is delimited by the upper level transistor. The method further includes forming a second interconnect in the opening such that the second interconnect is in direct contact with the first interconnect.

Abstract: Systems and methods for reducing the amount of messages transmitted in large-scale distributed mesh networks are disclosed. Network components include transceivers and memory storing instructions which, when executed by a processing unit, reduce transmissions made by the transceiver within the network. The instructions executed by processing unit could (1) create an expiration parameter to limit the number of times a signal is retransmitted, (2) form groups of network components from which one or a few of the group network components are designated to respond on behalf of the group, (3) keep advertising transmissions dormant by default until called upon, (4) employ a time delay parameter for a time interval in which no transmission may be made, and (5) include message IDs in control signals that are transmitted.

Abstract: A blender system that includes a base that is select ively and operatively engaged with a container is shown and described herein. The base may include a near field communications chip that may communicate with a near field communications chip of a container. The base also includes a motor that is selectively and operatively engaged with a blade disposed within the container.

Abstract: A system including a valve. The valve includes a valve body having an interior volume and a bore along a first axis. A stem extends along a second axis and a flow control element couples to the stem. The stem selectively moves the flow control element through the interior volume between a closed position and an open position relative to the bore. A valve insert system retains a pressurized lubricant in the interior volume.

Abstract: A shield around an x-ray tube, a voltage multiplier, or both can improve the manufacturing process by allowing testing earlier in the process and by providing a holder for liquid potting material. The shield can also improve voltage standoff. A shielded x-ray tube can be electrically coupled to a shielded power supply.

Abstract: An electrical device includes a substrate, a dielectric layer supported by the substrate, and an electrically conductive vertical interconnect extending through the dielectric layer. The dielectric layer may be formed at low-temperature below the thermal degradation temperature of thermally-sensitive material in the device. The dielectric layer may be a low-stress layer that imparts no stress or less stress than a failure stress of fragile material in the device. The dielectric layer may be formed during a processing step to planarize the electrical device at that step. The vertical interconnect may be diffusion bondable with another opposing interconnect at a low-temperature below the thermal degradation temperature of thermally-sensitive material in the device. The vertical interconnect may have a coefficient of thermal expansion (CTE) that is greater than a CTE of the dielectric layer to facilitate 3D-integration.

Abstract: A semiconductor device comprising at least one first gate all around channel having a horizontal physical orientation, wherein the at least one first gate all around channel is comprised of a first material, wherein the at least one first gate all around channel has a sidewall surface with (100) crystal orientation. At least one second gate all around channel having a vertical physical orientation, wherein the second channel is located above the at least one first gate all around channel, wherein the at least one second gate all around channel is comprised of a second material, wherein the at least one second gate all around channel has a sidewall surface with (110) crystal orientation. A gate metal enclosing the at least one first gate all around channel and the at least one second gate all around channel.

Abstract: A pitch-yaw actuation system includes a pitch frame, a yaw frame, a pitch actuator, a yaw actuator, and a universal joint assembly. The pitch frame is pivotably coupled to a device frame via a pitch hinge. The yaw frame is pivotably coupled to the pitch frame via a yaw hinge. The pitch actuator pivots the pitch frame about a pitch axis. The yaw actuator pivots the yaw frame about a yaw axis oriented orthogonal to the pitch axis. The universal joint assembly couples the yaw actuator to the yaw frame, and includes a universal joint slidably coupled to a linear guide mechanism. The guide mechanism axis is oriented at an angle that allows the universal joint to move in a manner accommodating misalignment of the yaw actuator with the yaw frame during pivoting of at least one of the pitch frame and the yaw frame.

Abstract: A device actuation system for actuating a treatment device includes a first drive gear rotatably mountable to the treatment device, a coupler rail slidably mountable to the treatment device, a second drive gear rotatably mountable to the coupler rail, and a coupler gear rotatably mountable to the treatment device and engageable with the coupler rail. In addition, the device actuation system includes a drive rail locatable between the first drive gear and the second drive gear of the gear system. The coupler gear is rotatable to move the coupler rail in a manner maintaining the second drive gear in continuous engagement with the drive rail against the first drive gear. The first drive gear and the second drive gear are rotatable in a manner causing at least one of translation and rotation of the treatment device relative to the drive rail.

Abstract: Contact designs for semiconductor FET devices are provided. In one aspect, a contact structure includes: a metal line(s); a first ILD surrounding the metal line(s), wherein a top surface of the first ILD is recessed below a top surface of the metal line(s); a liner disposed on the first ILD and on portions of the metal line(s); a top contact(s) disposed over, and in direct contact with, the metal line(s), wherein an upper portion of the top contact(s) has a width W1 and a height H1, wherein a lower portion of the top contact(s) has a width W2 and a height H2, and wherein W1<W2 and H1>H2; and a second ILD disposed over the liner and surrounding the top contact(s). A semiconductor FET device and methods for fabrication thereof are also provided.

Abstract: An apparatus comprising a substrate, a first nanosheet device located on the substrate, and a second nanosheet device located on the substrate, wherein the second nanosheet device is adjacent to the first nanosheet device. At least one first gate located on the first nanosheet device, wherein the at least one first gate has a first width. At least one second gate located on the second nanosheet device, wherein the at least one second gate has a second width, wherein the first width and the second width are substantially the same. A diffusion break located between the first nanosheet device and the second nanosheet device, wherein the diffusion break prevents the first nanosheet device from contacting the second nanosheet device, wherein the diffusion break has a third width, wherein the third width is larger than the first width and the second width.

Abstract: Methods, and devices related to authentication of chips using physical unclonable function (PUF) are disclosed. The semiconductor chip includes a substrate. The semiconductor chip includes multiple devices formed on the substrate. Each device includes multiple fins. A gate is formed on the multiple fins with a gate cut (CT) design that results in random distribution of complete gate cut and incomplete gate cut for each of the multiple devices based on a natural process variation in semiconductor manufacturing for each device. A physical unclonable function (PUF) region is defined in accordance with the random distribution.

Abstract: A focal plane array includes a mosaic integrated circuit device having a plurality of discrete integrated circuit tiles mounted on a motherboard. The focal plane array includes an optically continuous detector array electrically connected to the mosaic integrated circuit device with an interposer disposed therebetween. The interposer is configured to adjust a pitch of the continuous detector array to match a pitch of each of the plurality of discrete integrated circuit tiles so that the optical gaps between each of the plurality of integrated circuit tiles on the motherboard are minimized and the detector array is optically continuous, having high yield over the large format focal plane array.

Abstract: Disclosed are acyclic nucleoside prodrugs with improved metabolic stability and oral bioavailability. In general, the prodrugs are derivatives of acyclic nucleoside phosphonates containing a lipid-like moiety that can increase oral absorption and subsequent stability in the liver and plasma. Preferably, the lipid-like moiety can resist enzyme-mediated ?-oxidation, such as ?-oxidation catalyzed by cytochrome P450 enzymes. Also disclosed are pharmaceutical formulations of the acyclic nucleoside prodrugs. The acyclic nucleoside prodrugs and pharmaceutical formulations thereof can be used to treat viral infections, such as HIV infections, and/or viral-associated cancer, such as HPV-associated cancers.