Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may fetch a first command from the host into a command queue, suspend execution of the first command when receiving a lock request for the first command from the host, and resume the execution of the first command when receiving an unlock request for the first command or after the first command is suspended for an amount of time corresponding to a suspend time value transmitted together with the lock request.

Abstract: A memory system may include: a nonvolatile memory device; and a controller suitable for generating first map information which maps physical addresses of the nonvolatile memory device to logical addresses received from a host, selecting some segments of the first map information as second map information, and outputting the second map information to the host, the controller may determine whether the second map information is updated, and may determine updated map segments as third map information, and the controller may output information to the host indicating the third map information corresponding to a command received from the host.

Abstract: A memory system includes a storage medium and a controller. The storage medium includes a plurality of physical regions. The controller maps logical regions which are configured by a host device, to the physical regions, and performs in response to a write request for a target logical region, a write operation on a physical region mapped to the target logical region. The controller updates in response to the write request, a write status corresponding to the target logical region within a write status table.

Abstract: A memory system may include a memory device suitable for storing data and a controller suitable for generating and managing map data comprising a logical address of an external device and a physical address of the memory device corresponding to the logical address. The controller uploads at least some of the map data to the external device and uploading a latest version of the uploaded map data to the external device again based on dirty information or access information. The dirty information indicates whether a physical address corresponding to a logical address included in the uploaded map data has been changed. The access information indicates whether an access request for the logical address included in the uploaded map data from the external device has been made.

Abstract: A memory system may include: a nonvolatile memory device; and a controller suitable for generating first map information which maps physical addresses of the nonvolatile memory device to logical addresses received from a host, selecting some segments of the first map information as second map information, and outputting the second map information to the host, the controller may determine whether the second map information is updated, and may determine updated map segments as third map information, and the controller may output information to the host indicating the third map information corresponding to a command received from the host.

Abstract: Disclosed is a memory system including: a memory device including a plurality of memory blocks; an address management component suitable for generating an address map table by sequentially mapping a logical address of write data to physical addresses of the memory blocks, in response to a write command; and a read/write control component suitable for writing the write data to a super memory block including pages of each of the memory blocks, based on the address map table, wherein the address management component maps a logical address of invalidation data which is designated by a host, to a physical address of a first memory block of the memory blocks in the address map table.

Abstract: A memory system includes a memory device comprising a plurality of pages, and a controller suitable for storing data, inputted in response to a write command received from a host, in corresponding pages among the plurality of pages, wherein the controller generates and manages a bitmap table indicating order information of the inputted data according to the type of the write command.

Abstract: A memory system may include: a nonvolatile memory device comprising a plurality of memory regions; and a controller in communication with the nonvolatile memory device to control operations of the nonvolatile memory device and configured to: receive a first write request including a first logical address and a second logical address; determine a duplicate physical address mapped to the second logical address; and selectively map the first logical address to the duplicate physical address based on a duplicate count corresponding to the duplicate physical address.

Abstract: A data processing system includes: a host suitable for checking battery state information and determining a battery grade based on the battery state information; and a memory system suitable for storing information indicating the battery grade provided from the host, determining a method of performing a background operation based on the battery grade, and performing the background operation based on the determined method.

Abstract: Embodiments of the present disclosure relate to a memory controller and operating method thereof. According to embodiments of the present disclosure, the memory controller may generate a fused linked list which includes information of a plurality of write commands received from a host and a plurality of synchronization commands requesting a synchronization operation, and control the synchronization operation for one or more of the plurality of write commands based on the fused linked list.

Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having improved zone recovery speed may include a memory device including a plurality of memory blocks, and a memory controller configured to, in response to the zone open request, allocate memory blocks to store data of a logical address group corresponding to an open-requested zone among the plurality of memory blocks, and control the memory device to store zone recovery information included in a zone open request, and wherein the zone recovery information indicates whether data to be stored in the open-requested zone is to be recovered in a next power cycle.

Abstract: A data processing system may include: a host including a command queue including a plurality of command storage areas, and configured to store summary information of a second command among a plurality of commands in a reserved storage area of a command storage area, among the plurality of command storage areas, in which a first command among the plurality of commands being a previous command to the second command is stored, when inserting the second command into the command queue; and a data storage device configured to fetch the first command from the command queue and store the fetched first command, according to a new command notification received from the host.

Abstract: Embodiments of the present disclosure relate to a system and an operating method thereof. According to embodiments of the present disclosure, a memory system may transmit a first type response indicating that first data has been cached in a cache to the host when receiving a first command requesting to write the first data from the host, and may transmit a second type response indicating success or failure of an operation of storing the first data in the memory device to the host after transmitting the first type response to the host. Further, the host may delete the first data from a write buffer after the operation of storing the first data in the memory device succeeds.

Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved physical address obtainment speed may include a nonvolatile memory device configured to store map data including a plurality of map segments including mapping information and, a volatile memory device including a first map cache area temporarily storing the map data configured by map entries each corresponding to one logical address, and a second map cache area temporarily storing the map data configured by map indexes each corresponding to a plurality of logical addresses.

Abstract: The present technology relates to an electronic device. More specifically, the present technology relates to a storage device and a computing system. A storage device according to an embodiment may include a memory device including a firmware block group configured to store main firmware data and sub firmware data, and a user block group configured to store write data, and a memory controller, in response to a booting request provided from a host, configured to count a number of previously generated power losses based on data stored in an open block in the user block group in a booted state based on the main firmware data, performs a rebooting operation using the sub firmware data when the number of power losses exceeds a reference number, and execute sub firmware to correct an error of data related to the power losses.

Abstract: A data storage apparatus includes a storage device; a controller to control data input and output operations of the storage device; and a swap memory provided in an outside of the controller, wherein the controller includes a thread manager to perform a preparation operation on a first thread included in a task in response to a request for processing the task, request the storage device to process the first thread on which the preparation operation has been performed, perform a preparation operation on at least one subsequent thread following the first thread while the storage device processes the first thread, and store context data of the first thread and the at least one subsequent thread in the swap memory, wherein the task includes the first thread and the at least one subsequent thread, and the preparation operation includes an address mapping operation.

Abstract: A data processing system in which, in a case where it is difficult for a host to perform garbage collection by itself due to a load induced in the host in a system configured by Zoned Namespaces, the host requests garbage collection to a memory system and thus the memory system performs the garbage collection, and an operating method thereof.

Abstract: A method for operating a controller that controls a memory device includes: replacing a bad block of a superblock with a replacement block to form a reproduced superblock; controlling the memory device to perform a program operation on the reproduced superblock according to an interleaving scheme; moving data stored in the replacement block to a pseudo-replacement block when the program operation on the reproduced superblock is completed; and releasing the replacement block from the reproduced superblock.

Abstract: The present technology relates to a storage device. According to the present technology, a memory controller controlling a memory device including a plurality of memory blocks may include an operation controller and a lifetime information controller. The operation controller may control the memory device to receive a write request from a host and perform a write operation on a selected memory block among the plurality of memory blocks. The lifetime information controller may generate lifetime information including a lifetime level of the selected memory block based on an erase and write count of the selected memory block.

Abstract: An operation method of a controller, comprising: selecting a target super block, on which garbage collection (GC) is to be performed, among a plurality of super blocks which are completely programmed, based on a first valid page count of each of the super blocks when a determination to perform GC is made; selecting a first target block among a plurality of memory blocks in the target super block based on a second valid-page decrease amount of each of the memory blocks; and performing a first copy operation on valid pages in the first target block.