Patents by Inventor Eugene J. O'Sullivan

Eugene J. O'Sullivan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11014127
    Abstract: A first material is filled during a semiconductor fabrication process in a space bound on at least one side by a fence formation created as a result of an etching operation. A solvent-removable material is deposited such that the solvent-removable material encapsulates at least that portion of the fence formation which is protruding from the structure such that a height of the fence formation exceeds a height of the structure. The portion of the fence formation which is protruding from the structure and a first portion of the solvent-removable material are removed by planarization. A second portion of the solvent-removable material is removed by dissolving in a solvent, the second portion remaining after removal by the planarization of the first portion of the solvent-removable material.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: May 25, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10984948
    Abstract: A method for forming an inductor device. The method comprises forming a trench within a central core region of a conductive coil formed within a dielectric material. The method further comprises forming a composite region within the trench. The composite region including a polymer matrix having a plurality of particles with magnetic properties dispersed therein with the central core region to reduce eddy current loss and increase energy storage.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: April 20, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chandrasekharan Kothandaraman, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10971576
    Abstract: An on-chip magnetic structure includes a magnetic material comprising cobalt in a range from about 80 to about 90 atomic % (at. %) based on the total number of atoms of the magnetic material, tungsten in a range from about 4 to about 9 at. % based on the total number of atoms of the magnetic material, phosphorous in a range from about 7 to about 15 at. % based on the total number of atoms of the magnetic material, and palladium substantially dispersed throughout the magnetic material.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: April 6, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, William J. Gallagher, Andrew J. Kellock, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang
  • Patent number: 10943732
    Abstract: A magnetic material stack comprises a first dielectric layer, a first magnetic material layer on the first dielectric layer, at least a second dielectric layer on the first magnetic material layer and at least a second magnetic material layer on the second dielectric layer. One or more surfaces of the layers are smoothed to remove at least a portion of surface roughness on the respective layers.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: March 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10944044
    Abstract: A memory structure is provided that avoids high resistance due to the galvanic effect. The high resistance is reduced and/or eliminated by providing a T-shaped bottom electrode structure of uniform construction (i.e., a single piece). The T-shaped bottom electrode structure includes a narrow base portion and a wider shelf portion. The shelf portion of the T-shaped bottom electrode structure has a planar topmost surface in which a MTJ pillar forms an interface with.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: March 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: Pouya Hashemi, Bruce B. Doris, Eugene J. O'Sullivan, Michael F. Lofaro
  • Publication number: 20210043827
    Abstract: A memory structure is provided that avoids high resistance due to the galvanic effect. The high resistance is reduced and/or eliminated by providing a T-shaped bottom electrode structure of uniform construction (i.e., a single piece). The T-shaped bottom electrode structure includes a narrow base portion and a wider shelf portion. The shelf portion of the T-shaped bottom electrode structure has a planar topmost surface in which a MTJ pillar forms an interface with.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 11, 2021
    Inventors: Pouya Hashemi, Bruce B. Doris, Eugene J. O'Sullivan, Michael F. Lofaro
  • Publication number: 20200403151
    Abstract: A spin-transfer torque magneto-resistive random access memory (STT-MRAM) device is provided. The STT-MRAM device includes a substrate, a dielectric layer and a magnetic tunnel junction (MTJ) stack. The substrate includes a conductor and a landing pad. The MTJ stack includes a reference layer element, a free layer assembly and a barrier layer element. The reference layer element is lined with redeposited metal and is disposed on the landing pad within the dielectric layer. The free layer assembly includes a free layer element, a hard mask layer element disposed on the free layer element, redeposited metal lining sidewalls of the free and hard mask layer elements and dielectric material lining the redeposited metal. The barrier layer element is interposed between and has a same width as the reference layer element and the free layer assembly.
    Type: Application
    Filed: June 18, 2019
    Publication date: December 24, 2020
    Inventors: Anthony J. Annunziata, Bruce B. Doris, Eugene J. O'Sullivan
  • Patent number: 10811177
    Abstract: A magnetic laminating structure and process for preventing substrate bowing include a first magnetic layer, at least one additional magnetic layer, and a dielectric spacer disposed between the first and at least one additional magnetic layers. The magnetic layers are characterized by defined tensile strength. To balance the tensile strength of the magnetic layer, the dielectric layer is selected to provide compressive strength so as to counteract the tendency of the wafer to bow as a consequence of the tensile strength imparted by the magnetic layer(s).
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: October 20, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bruce B. Doris, Hariklia Deligianni, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10784045
    Abstract: A technique relates to a method of forming a laminated multilayer magnetic structure. An adhesion layer is deposited on a substrate. A magnetic seed layer is deposited on top of the adhesion layer. Magnetic layers and non-magnetic spacer layers are alternatingly deposited such that an even number of the magnetic layers is deposited while an odd number of the non-magnetic spacer layers is deposited. The odd number is one less than the even number. Every two of the magnetic layers is separated by one of the non-magnetic spacer layers. The first of the magnetic layers is deposited on the magnetic seed layer, and the magnetic layers each have a thickness less than 500 nanometers.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: September 22, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, William J. Gallagher, Sathana Kitayaporn, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang, Joonah Yoon
  • Patent number: 10763038
    Abstract: A technique relates to a method of forming a laminated multilayer magnetic structure. An adhesion layer is deposited on a substrate. A magnetic seed layer is deposited on top of the adhesion layer. Magnetic layers and non-magnetic spacer layers are alternatingly deposited such that an even number of the magnetic layers is deposited while an odd number of the non-magnetic spacer layers is deposited. The odd number is one less than the even number. Every two of the magnetic layers is separated by one of the non-magnetic spacer layers. The first of the magnetic layers is deposited on the magnetic seed layer, and the magnetic layers each have a thickness less than 500 nanometers.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: September 1, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, William J. Gallagher, Sathana Kitayaporn, Eugene J. O'Sullivan, Lubomyr T. Romankiw, Naigang Wang, Joonah Yoon
  • Publication number: 20200266342
    Abstract: A semiconductor device and a method for fabricating the same. The semiconductor device includes a substrate and at least one trench line formed within the substrate. The semiconductor device further includes a self-aligned landing pad in contact with the at least one trench line, and a magnetic tunnel junction stack formed on and in contact with the self-aligned landing pad. The method includes forming a conductive layer on and in contact with at least one trench line formed within a substrate. Magnetic tunnel junction stack layers are deposited on and in contact with the conductive layer. The magnetic tunnel junction stack layers are etched to form a magnetic tunnel junction stack, where the etching stops on the conductive layer.
    Type: Application
    Filed: May 5, 2020
    Publication date: August 20, 2020
    Applicant: International Business Machines Corporation
    Inventors: Anthony J. ANNUNZIATA, Chandrasekara KOTHANDARAMAN, Nathan P. MARCHACK, Eugene J. O'SULLIVAN
  • Patent number: 10741327
    Abstract: An inductor device includes a conductive coil formed within a dielectric material and having a central core area within the coil. Particles are dispersed within the central core region to reduce eddy current loss and increase energy storage. The particles include magnetic properties.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: August 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Chandrasekharan Kothandaraman, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10700263
    Abstract: A semiconductor device and a method for fabricating the same. The semiconductor device includes a substrate. At least one trench line is formed within the substrate. A pad layer is formed in contact with the at least one trench line. A seed layer is formed on and in contact with the pad layer. The seed layer has a Root Mean Square surface roughness equal to or less than 3 Angstroms. A magnetic tunnel junction stack is formed on and in contact with the seed layer. The method includes forming a seed layer on and in contact with a semiconductor structure. The seed layer is annealed and then planarized. A magnetic tunnel junction stack is formed on and in contact with the seed layer after the seed layer has been planarized.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: June 30, 2020
    Assignee: International Business Machines Corporation
    Inventors: Anthony J. Annunziata, Chandrasekharan Kothandaraman, Janusz J. Nowak, Eugene J. O'Sullivan
  • Publication number: 20200168374
    Abstract: Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having multiple magnetic layer thicknesses. A first magnetic stack having one or more magnetic layers alternating with one or more insulating layers is formed in a first inner region of the laminated magnetic inductor. A second magnetic stack is formed opposite a major surface of the first magnetic stack in an outer region of the laminated magnetic inductor. A third magnetic stack is formed opposite a major surface of the second magnetic stack in a second inner region of the laminated magnetic inductor. The magnetic layers are formed such that a thickness of a magnetic layer in each of the first and third magnetic stacks is less than a thickness of a magnetic layer in the second magnetic stack.
    Type: Application
    Filed: January 28, 2020
    Publication date: May 28, 2020
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10639679
    Abstract: A first material is filled during a semiconductor fabrication process in a space bound on at least one side by a fence formation created as a result of an etching operation. A solvent-removable material is deposited such that the solvent-removable material encapsulates at least that portion of the fence formation which is protruding from the structure such that a height of the fence formation exceeds a height of the structure. The portion of the fence formation which is protruding from the structure and a first portion of the solvent-removable material are removed by planarization. A second portion of the solvent-removable material is removed by dissolving in a solvent, the second portion remaining after removal by the planarization of the first portion of the solvent-removable material.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: May 5, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10644232
    Abstract: A semiconductor device and a method for fabricating the same. The semiconductor device includes a substrate and at least one trench line formed within the substrate. The semiconductor device further includes a self-aligned landing pad in contact with the at least one trench line, and a magnetic tunnel junction stack formed on and in contact with the self-aligned landing pad. The method includes forming a conductive layer on and in contact with at least one trench line formed within a substrate. Magnetic tunnel junction stack layers are deposited on and in contact with the conductive layer. The magnetic tunnel junction stack layers are etched to form a magnetic tunnel junction stack, where the etching stops on the conductive layer.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: May 5, 2020
    Assignee: International Business Machines Corporation
    Inventors: Anthony J. Annunziata, Chandrasekharan Kothandaraman, Nathan P. Marchack, Eugene J. O'Sullivan
  • Patent number: 10644233
    Abstract: A method is presented for establishing a top contact to a magnetic tunnel junction (MTJ) device, the method including selectively etching, via a first etching process, an oxide layer to expose a top surface of a nitride layer of a dummy fill shape and selectively etching, via a second etching process, a top portion of the nitride layer of the dummy fill shape to expose a top surface thereof. The method further includes selectively etching, via the second etching process, the oxide layer to expose a top surface of a nitride layer of the MTJ device, and selectively etching, via the first etching process, a top portion of the nitride layer of the MTJ device to expose a top surface thereof such that a height of the MTJ device is approximately equal to a height of the dummy fill shape.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: May 5, 2020
    Assignee: International Business Machines Corporation
    Inventors: Michael F. Lofaro, Nathan P. Marchack, Janusz J. Nowak, Eugene J. O'Sullivan
  • Patent number: 10607759
    Abstract: Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having anisotropic magnetic layers. A first magnetic stack is formed having one or more magnetic layers alternating with one or more insulating layers. A trench is formed in the first magnetic stack oriented such that an axis of the trench is perpendicular to a hard axis of the magnetic inductor. The trench is filled with a dielectric material.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: March 31, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10597769
    Abstract: Embodiments are directed to a method of forming a magnetic stack arrangement of a laminated magnetic inductor having a high frequency peak quality factor (Q). A first magnetic stack is formed having one or more magnetic layers alternating with one or more insulating layers in a first inner region of a laminated magnetic inductor. A second magnetic stack is formed opposite a surface of the first magnetic stack in an outer region of the laminated magnetic inductor. A third magnetic stack is formed opposite a surface of the second magnetic stack in a second inner region of the laminated magnetic inductor. The insulating layers are formed such that a thickness of an insulating layer in the second magnetic stack is greater than a thickness of an insulating layer in the first magnetic stack.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: March 24, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10593449
    Abstract: Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having multiple magnetic layer thicknesses. A first magnetic stack having one or more magnetic layers alternating with one or more insulating layers is formed in a first inner region of the laminated magnetic inductor. A second magnetic stack is formed opposite a major surface of the first magnetic stack in an outer region of the laminated magnetic inductor. A third magnetic stack is formed opposite a major surface of the second magnetic stack in a second inner region of the laminated magnetic inductor. The magnetic layers are formed such that a thickness of a magnetic layer in each of the first and third magnetic stacks is less than a thickness of a magnetic layer in the second magnetic stack.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang