Patents by Inventor Eugene J. O'Sullivan

Eugene J. O'Sullivan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190206619
    Abstract: A method for fabricating a magnetic material stack on a substrate, comprises forming a first dielectric layer, forming a first magnetic material layer on the first dielectric layer, forming at least a second dielectric layer on the first magnetic material layer and forming at least a second magnetic material layer on the second dielectric layer. During one or more of the forming steps, a surface smoothing operation is performed to remove at least a portion of surface roughness on the layer being formed.
    Type: Application
    Filed: March 4, 2019
    Publication date: July 4, 2019
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20190207099
    Abstract: A semiconductor device and a method for fabricating the same. The semiconductor device includes a substrate and at least one trench line formed within the substrate. The semiconductor device further includes a self-aligned landing pad in contact with the at least one trench line, and a magnetic tunnel junction stack formed on and in contact with the self-aligned landing pad. The method includes forming a conductive layer on and in contact with at least one trench line formed within a substrate. Magnetic tunnel junction stack layers are deposited on and in contact with the conductive layer. The magnetic tunnel junction stack layers are etched to form a magnetic tunnel junction stack, where the etching stops on the conductive layer.
    Type: Application
    Filed: December 28, 2017
    Publication date: July 4, 2019
    Inventors: Anthony J. ANNUNZIATA, Chandrasekharan KOTHANDARAMAN, Nathan P. MARCHACK, Eugene J. O'SULLIVAN
  • Publication number: 20190198243
    Abstract: A magnetic material stack comprises a first dielectric layer, a first magnetic material layer on the first dielectric layer, at least a second dielectric layer on the first magnetic material layer and at least a second magnetic material layer on the second dielectric layer.
    Type: Application
    Filed: March 4, 2019
    Publication date: June 27, 2019
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20190189914
    Abstract: A method of forming a semiconductor structure includes forming a first spacer material over two or more mandrels disposed over a magnetoresistive random-access memory (MRAM) stack. The method also includes performing a first sidewall image transfer of the two or more mandrels to form a first set of fins of the first spacer material over the MRAM stack, and performing a second sidewall image transfer to form a plurality of pillars of the first spacer material over the MRAM stack. The pillars of the first spacer material form top electrodes for a plurality of MRAM cells patterned from the MRAM stack.
    Type: Application
    Filed: December 14, 2017
    Publication date: June 20, 2019
    Inventors: Hiroyuki Miyazoe, Nathan P. Marchack, HsinYu Tsai, Eugene J. O'Sullivan, Karthik Yogendra
  • Patent number: 10304603
    Abstract: A magnetic laminating structure and process for preventing substrate bowing include multiple film stack segments that include a first magnetic layer, at least one additional magnetic layer, and a dielectric spacer disposed between the first and at least one additional magnetic layers. A dielectric isolation layer is intermediate magnetic layers and on the sidewalls thereof. The magnetic layers are characterized by defined tensile strength and the multiple segments function to relive the stress as the magnetic laminating structure is formed, wherein the cumulative thickness of the magnetic layers is greater than 1 micron. Also described are methods for forming the magnetic laminating structure.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: May 28, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bruce B. Doris, Hariklia Deligianni, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20190157000
    Abstract: Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having multiple magnetic layer thicknesses. A first magnetic stack having one or more magnetic layers alternating with one or more insulating layers is formed in a first inner region of the laminated magnetic inductor. A second magnetic stack is formed opposite a major surface of the first magnetic stack in an outer region of the laminated magnetic inductor. A third magnetic stack is formed opposite a major surface of the second magnetic stack in a second inner region of the laminated magnetic inductor. The magnetic layers are formed such that a thickness of a magnetic layer in each of the first and third magnetic stacks is less than a thickness of a magnetic layer in the second magnetic stack.
    Type: Application
    Filed: December 31, 2018
    Publication date: May 23, 2019
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10283249
    Abstract: A method for fabricating a magnetic material stack on a substrate includes the following steps. A first dielectric layer is formed. A first magnetic material layer is formed on the first dielectric layer. At least a second dielectric layer is formed on the first magnetic material layer. At least a second magnetic material layer is formed on the second dielectric layer. During one or more of the forming steps, a surface smoothing operation is performed to remove at least a portion of surface roughness on the layer being formed. The magnetic material stack can be used to form a low magnetic loss yoke inductor.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: May 7, 2019
    Assignee: International Business Machines Corporation
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Patent number: 10256397
    Abstract: A method of making a magnetic random access memory device includes forming a magnetic tunnel junction (MTJ) on an electrode, the MTJ including a reference layer, a tunnel barrier layer, and a free layer; disposing a hard mask on the MTJ; etching sidewalls of the hard mask and MTJ to form a stack with a first width and redeposit metal along the MTJ sidewall; depositing a sacrificial dielectric layer on the hard mask, surface of the electrode, exposed sidewall of the hard mask and the MTJ, and on redeposited metal along the sidewall of the MTJ; removing a portion of the sacrificial dielectric layer from sidewalls of the hard mask and MTJ and redeposited metal from the MTJ sidewalls; and removing a portion of a sidewall of the MTJ and hard mask to provide a second width to the stack; wherein the second width is less than the first width.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 9, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Gen P. Lauer, Janusz J. Nowak, Eugene J. O'Sullivan
  • Patent number: 10243138
    Abstract: A method of making a magnetic random access memory device includes forming a magnetic tunnel junction (MTJ) on an electrode, the MTJ including a reference layer, a tunnel barrier layer, and a free layer; disposing a hard mask on the MTJ; etching sidewalls of the hard mask and MTJ to form a stack with a first width and redeposit metal along the MTJ sidewall; depositing a sacrificial dielectric layer on the hard mask, surface of the electrode, exposed sidewall of the hard mask and the MTJ, and on redeposited metal along the sidewall of the MTJ; removing a portion of the sacrificial dielectric layer from sidewalls of the hard mask and MTJ and redeposited metal from the MTJ sidewalls; and removing a portion of a sidewall of the MTJ and hard mask to provide a second width to the stack; wherein the second width is less than the first width.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: March 26, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Anthony J. Annunziata, Gen P. Lauer, Janusz J. Nowak, Eugene J. O'Sullivan
  • Patent number: 10236443
    Abstract: A method is presented for establishing a top contact to a magnetic tunnel junction (MTJ) device, the method including selectively etching, via a first etching process, an oxide layer to expose a top surface of a nitride layer of a dummy fill shape and selectively etching, via a second etching process, a top portion of the nitride layer of the dummy fill shape to expose a top surface thereof. The method further includes selectively etching, via the second etching process, the oxide layer to expose a top surface of a nitride layer of the MTJ device, and selectively etching, via the first etching process, a top portion of the nitride layer of the MTJ device to expose a top surface thereof such that a height of the MTJ device is approximately equal to a height of the dummy fill shape.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: March 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Michael F. Lofaro, Nathan P. Marchack, Janusz J. Nowak, Eugene J. O'Sullivan
  • Patent number: 10177213
    Abstract: A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: January 8, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20190006083
    Abstract: Embodiments of the invention are directed to a method of fabricating a yoke arrangement of an inductor. A non-limiting example method includes forming a dielectric layer across from a major surface of a substrate. The method further includes configuring the dielectric layer such that it imparts a predetermined dielectric layer compressive stress on the substrate. A magnetic stack is formed on an opposite side of the dielectric layer from the substrate, wherein the magnetic stack includes one or more magnetic layers alternating with one or more insulating layers. The method further includes configuring the magnetic stack such that it imparts a predetermined magnetic stack tensile stress on the dielectric layer, wherein a net effect of the predetermined dielectric layer compressive stress and the predetermined magnetic stack tensile stress on the substrate is insufficient to cause a portion of the major surface of the substrate to be substantially non-planar.
    Type: Application
    Filed: August 21, 2018
    Publication date: January 3, 2019
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20180336991
    Abstract: Embodiments of the invention are directed to a method of fabricating a yoke arrangement of an inductor. A non-limiting example method includes forming a dielectric layer across from a major surface of a substrate. The method further includes configuring the dielectric layer such that it imparts a predetermined dielectric layer compressive stress on the substrate. A magnetic stack is formed on an opposite side of the dielectric layer from the substrate, wherein the magnetic stack includes one or more magnetic layers alternating with one or more insulating layers. The method further includes configuring the magnetic stack such that it imparts a predetermined magnetic stack tensile stress on the dielectric layer, wherein a net effect of the predetermined dielectric layer compressive stress and the predetermined magnetic stack tensile stress on the substrate is insufficient to cause a portion of the major surface of the substrate to be substantially non-planar.
    Type: Application
    Filed: May 19, 2017
    Publication date: November 22, 2018
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20180323158
    Abstract: Provided is an inductor structure. In embodiments of the invention, the inductor structure includes a laminated first stack and a laminated second stack. The laminated first stack includes one or more layers of a magnetic material and one or more layers of a first insulating material having a thickness. The inductor structure also includes at least one layer of a second insulating material having a thickness. The thickness of the at least one layer of the second insulating material is different than the thickness of each of the layers of the first insulating material.
    Type: Application
    Filed: May 2, 2017
    Publication date: November 8, 2018
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20180308897
    Abstract: A semiconductor structure. The semiconductor structure includes two or more pillar structures disposed over a top surface of a substrate. The semiconductor structure further includes two or more contacts to the two or more pillar structures. The semiconductor structure further includes an insulator disposed between the two or more pillar structures and the two or more contacts. The two or more contacts are self-aligned to the two or more pillar structures.
    Type: Application
    Filed: June 28, 2018
    Publication date: October 25, 2018
    Inventors: Anthony J. Annunziata, Daniel C. Edelstein, Eugene J. O'Sullivan, Henry K. Utomo
  • Publication number: 20180308921
    Abstract: Provided is an inductor structure. In embodiments of the invention, the inductor structure includes a first laminated stack. The first laminated stack includes layers of an insulating material alternating with layers of a first magnetic material. The inductor structure includes a laminated second stack formed on the first laminated stack. The second laminated stack includes layers of the insulating material alternating with layers of a second magnetic material. The second magnetic material has a greater permeability than does the first magnetic material.
    Type: Application
    Filed: April 30, 2018
    Publication date: October 25, 2018
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20180308920
    Abstract: Provided is an inductor structure. In embodiments of the invention, the inductor structure includes a first laminated stack. The first laminated stack includes layers of an insulating material alternating with layers of a first magnetic material. The inductor structure includes a laminated second stack formed on the first laminated stack. The second laminated stack includes layers of the insulating material alternating with layers of a second magnetic material. The second magnetic material has a greater permeability than does the first magnetic material.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang
  • Publication number: 20180308898
    Abstract: A method of forming a semiconductor structure includes forming two or more pillar structures over a top surface of a substrate. The method also includes forming two or more contacts to the two or more pillar structures. The method further includes forming an insulator between the two or more pillar structures and the two or more contacts. The two or more contacts are self-aligned to the two or more pillar structures by forming the insulator via conformal deposition and etching the insulator selective to a spin-on material formed over the insulator between the two or more pillar structures.
    Type: Application
    Filed: June 28, 2018
    Publication date: October 25, 2018
    Inventors: Anthony J. Annunziata, Daniel C. Edelstein, Eugene J. O'Sullivan, Henry K. Utomo
  • Patent number: 10109675
    Abstract: A method of forming a semiconductor structure includes forming two or more pillar structures over a top surface of a substrate. The method also includes forming two or more contacts to the two or more pillar structures. The method further includes forming an insulator between the two or more pillar structures and the two or more contacts. The two or more contacts are self-aligned to the two or more pillar structures by forming the insulator via conformal deposition and etching the insulator selective to a spin-on material formed over the insulator between the two or more pillar structures.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: October 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Anthony J. Annunziata, Daniel C. Edelstein, Eugene J. O'Sullivan, Henry K. Utomo
  • Publication number: 20180294094
    Abstract: Embodiments are directed to a method of forming a magnetic stack arrangement of a laminated magnetic inductor having a high frequency peak quality factor (Q). A first magnetic stack is formed having one or more magnetic layers alternating with one or more insulating layers in a first inner region of a laminated magnetic inductor. A second magnetic stack is formed opposite a surface of the first magnetic stack in an outer region of the laminated magnetic inductor. A third magnetic stack is formed opposite a surface of the second magnetic stack in a second inner region of the laminated magnetic inductor. The insulating layers are formed such that a thickness of an insulating layer in the second magnetic stack is greater than a thickness of an insulating layer in the first magnetic stack.
    Type: Application
    Filed: April 5, 2017
    Publication date: October 11, 2018
    Inventors: Hariklia Deligianni, Bruce B. Doris, Eugene J. O'Sullivan, Naigang Wang