Patents by Inventor Eun KO

Eun KO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180236097
    Abstract: Provided is a conjugate including a c-Met targeting compound and a bioactive material and methods of use of the conjugate.
    Type: Application
    Filed: January 31, 2018
    Publication date: August 23, 2018
    Inventors: Su Young Chae, Sunghyun Kim, Eun Ko, Yun Ju Jeong, Jae Hyun Choi
  • Patent number: 10002850
    Abstract: A semiconductor chip may include a semiconductor substrate having a front surface and a rear surface which faces away from the front surface. The semiconductor chip may include a fixed metal layer formed over the front surface of the semiconductor substrate, and having first metal lines formed in the fixed metal layer. The semiconductor chip may include a configurable metal layer formed over the fixed metal layer to have one surface which faces the fixed metal layer and the other surface which faces away from the one surface, and having second metal lines formed in the configurable metal layer such that at least one end of the second metal lines disposed on the one surface are respectively connected with the first metal lines and other ends of the second metal lines facing away from the at least one end are disposed at predetermined positions on the other surface.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: June 19, 2018
    Assignee: SK hynix Inc.
    Inventors: Sang Eun Lee, Eun Ko, Yong Jae Park
  • Patent number: 9966359
    Abstract: A semiconductor package may be provided. The semiconductor package may include a substrate. The semiconductor package may include a first semiconductor chip flip-chip bonded to a first surface of the substrate. The semiconductor package may include second semiconductor chips respectively flip-chip bonded to portions of the first surface of the substrate adjacent to both ends of the first semiconductor chip. The semiconductor package may include a third semiconductor chip solder-jointed to the first surface of the substrate covering the first semiconductor chip and portions of the second semiconductor chips.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: May 8, 2018
    Assignee: SK hynix Inc.
    Inventors: Sang Eun Lee, Eun Ko, Yong Jae Park
  • Patent number: 9889206
    Abstract: Disclosed is a conjugate in which a c-Met targeting compound and a bioactive material are chemically conjugated with each other, and methods of use thereof.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: February 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Su Young Chae, Sunghyun Kim, Eun Ko, Yun Ju Jeong, Jae Hyun Choi
  • Publication number: 20170317056
    Abstract: The present disclosure provides a semiconductor chip including a semiconductor substrate having a front surface and a rear surface which faces away from the front surface. The semiconductor chip includes a fixed metal layer formed over the front surface of the semiconductor substrate, and having first metal lines formed in the fixed metal layer. The semiconductor chip includes a configurable metal layer formed over the fixed metal layer to have one surface which faces the fixed metal layer and the other surface which faces away from the one surface, and having second metal lines formed in the configurable metal layer such that at least one end of the second metal lines disposed on the one surface are respectively connected with the first metal lines and other ends of the second metal lines facing away from the at least one end are disposed at predetermined positions on the other surface.
    Type: Application
    Filed: July 28, 2016
    Publication date: November 2, 2017
    Inventors: Sang Eun LEE, Eun KO, Yong Jae PARK
  • Patent number: 9780071
    Abstract: A semiconductor package may include a first semiconductor chip having a plurality of first bonding pads arranged at a first pitch on a first active surface. The semiconductor package may include one or more reconfigurable package units each including a second semiconductor chip having a plurality of second bonding pads arranged at a second pitch on a second active surface; a semiconductor chip connector arranged spaced apart from the second semiconductor chip and having a plurality of through vias arranged at the first pitch; a molding layer surrounding side surfaces of the second semiconductor chip and the semiconductor chip connector; and redistribution lines formed over the second semiconductor chip, the semiconductor chip connector, and the molding layer.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: October 3, 2017
    Assignee: SK hynix Inc.
    Inventors: Sang Eun Lee, Eun Ko, Yong Jae Park
  • Patent number: 9711482
    Abstract: A semiconductor package may include first semiconductor chips disposed in a rotationally symmetrical structure. First bonding pads are arranged over the bottom surfaces of the first semiconductor chips. The semiconductor package may also include a first encapsulation member formed to surround at least side surfaces of the first semiconductor chips. The semiconductor package may also include via patterns formed in the first encapsulation member. The semiconductor package may also include second semiconductor chips stacked over top surfaces of the first semiconductor chips and the first encapsulation member including the via patterns in such a way as to form step shapes with the first semiconductor chips. Second bonding pads electrically connected to the via patterns are arranged over bottom surfaces of the second semiconductor chips.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: July 18, 2017
    Assignee: SK hynix Inc.
    Inventors: Sang Eun Lee, Eun Ko, Yong Jae Park
  • Patent number: 9607667
    Abstract: A memory device includes a plurality of channels that respectively include memory cell arrays and local input/output lines electrically coupled to the memory cell arrays and are independently operable, shared global input/output lines electrically coupled to the local input/output lines included in the plurality of channels and having a connection relation controlled through one or more path switch circuits arranged among the plurality of channels, and the path switch circuits that control the connection relation of the shared global input/output lines according to a path control signal.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: March 28, 2017
    Assignee: SK HYNIX INC.
    Inventors: Sang Eun Lee, Eun Ko
  • Publication number: 20170084575
    Abstract: A semiconductor package may be provided. The semiconductor package may include a substrate. The semiconductor package may include a first semiconductor chip flip-chip bonded to a first surface of the substrate. The semiconductor package may include second semiconductor chips respectively flip-chip bonded to portions of the first surface of the substrate adjacent to both ends of the first semiconductor chip. The semiconductor package may include a third semiconductor chip solder-jointed to the first surface of the substrate covering the first semiconductor chip and portions of the second semiconductor chips.
    Type: Application
    Filed: December 15, 2015
    Publication date: March 23, 2017
    Inventors: Sang Eun LEE, Eun KO, Yong Jae PARK
  • Publication number: 20170076762
    Abstract: A memory device includes a plurality of channels that respectively include memory cell arrays and local input/output lines electrically coupled to the memory cell arrays and are independently operable, shared global input/output lines electrically coupled to the local input/output lines included in the plurality of channels and having a connection relation controlled through one or more path switch circuits arranged among the plurality of channels, and the path switch circuits that control the connection relation of the shared global input/output lines according to a path control signal.
    Type: Application
    Filed: February 25, 2016
    Publication date: March 16, 2017
    Inventors: Sang Eun LEE, Eun KO
  • Publication number: 20170062384
    Abstract: A semiconductor package may include first semiconductor chips disposed in a rotationally symmetrical structure. First bonding pads are arranged over the bottom surfaces of the first semiconductor chips. The semiconductor package may also include a first encapsulation member formed to surround at least side surfaces of the first semiconductor chips. The semiconductor package may also include via patterns formed in the first encapsulation member. The semiconductor package may also include second semiconductor chips stacked over top surfaces of the first semiconductor chips and the first encapsulation member including the via patterns in such a way as to form step shapes with the first semiconductor chips. Second bonding pads electrically connected to the via patterns are arranged over bottom surfaces of the second semiconductor chips.
    Type: Application
    Filed: November 25, 2015
    Publication date: March 2, 2017
    Inventors: Sang Eun LEE, Eun KO, Yong Jae PARK
  • Publication number: 20170018527
    Abstract: A semiconductor package may include a first semiconductor chip having a plurality of first bonding pads arranged at a first pitch on a first active surface. The semiconductor package may include one or more reconfigurable package units each including a second semiconductor chip having a plurality of second bonding pads arranged at a second pitch on a second active surface; a semiconductor chip connector arranged spaced apart from the second semiconductor chip and having a plurality of through vias arranged at the first pitch; a molding layer surrounding side surfaces of the second semiconductor chip and the semiconductor chip connector; and redistribution lines formed over the second semiconductor chip, the semiconductor chip connector, and the molding layer.
    Type: Application
    Filed: October 16, 2015
    Publication date: January 19, 2017
    Inventors: Sang Eun LEE, Eun KO, Yong Jae PARK
  • Publication number: 20160256428
    Abstract: The present invention relates to a composition containing a monoacetyldiglyceride compound as an active ingredient, for inhibiting blood cancer or metastasis, and a use thereof. The monoacetyldiglyceride compound according to the present invention has excellent effects of inhibiting the expression of IL-4 and inhibiting the activity of STAT-6, and thereby is capable of overcoming side effects of currently used blood cancer or metastasis inhibiting agents. Also, the monoacetyldiglyceride compound is a non-toxic compound having superior therapeutic effects and thus can be useful as a composition for preventing, treating, or improving blood cancer and metastasis.
    Type: Application
    Filed: August 18, 2014
    Publication date: September 8, 2016
    Inventors: Jae Wha Kim, Sei Ryang Oh, Kyung Seop Ahn, Ho Bum Kang, Jae Min Shin, Young Eun Ko, Tae Suk Lee, Myung Hwan Kim, Jong Koo Kang, Yong-Hae Han, Ki-Young Sohn
  • Publication number: 20160110936
    Abstract: A method of making a tuning map for a vehicle device includes deriving performance parameters of the vehicle device in a new vehicle and setting a target tuning performance. A pre-tuning map is established by building an interpretation model of the new vehicle including an interpretation model and a control model of the vehicle device, and tuning parameters, which satisfy the target tuning performance, are set using the performance parameters through interpretation of the models. The pre-tuning map is applied to a control logic of the vehicle device for an actual vehicle which includes the vehicle device mounted therein, and the actual vehicle tuning is performed. Whether actual vehicle performance satisfy a preset target performance after tuning the actual vehicle is evaluated, and the tuning map is finalized when the target tuning performance is satisfied.
    Type: Application
    Filed: September 23, 2015
    Publication date: April 21, 2016
    Inventors: Jung Eun CHO, Min Jung KIM, Tae Soo CHI, Young Eun KO, Chan Jung KIM
  • Patent number: 9081833
    Abstract: Systems and methods for providing a tooltip based on search results within a social network are provided. A method includes receiving a search query within the social network. The method also includes determining a set of search results responsive to the search query. The set of search results is from within the social network. The set of search results includes search results of a first type and search results of a second type. The method also includes providing for display of plural ones of the search results of the first type. The method also includes determining whether a number of search result of the second type exceeds a threshold number. The method also includes, providing, in a case where the number of search results of the second type exceeds the threshold number, for display of a tooltip. The tooltip indicates the second type.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: July 14, 2015
    Assignee: Google Inc.
    Inventors: Alexander Ketner Unger, Yo Eun Ko
  • Patent number: 9048705
    Abstract: Provided is a wind power generating apparatus including a generating tower that has a wall surface in which a plurality of through-holes for inflow of wind are formed, wind inlet walls that protrude outwardly from the respective through-holes so as to guide the inflow of wind, a generating blade that rotates by means of the wind introduced into the generating tower, a generator that generates electricity in conjunction with the rotation of the generating blade, a wind inlet port formed through the respective through-holes formed in the wall surface of the generating tower, and a wind contact member, which is connected to an end of the generating blade, which has a triangular pyramid shape with an open front surface so as to extend the area pressurized by the wind introduced through the wind inlet port, and which has a flow channel dividing member arranged across the open front surface.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: June 2, 2015
    Inventor: Young-Eun Ko
  • Publication number: 20150071950
    Abstract: Disclosed is a conjugate in which a c-Met targeting compound and a bioactive material are chemically conjugated with each other, and methods of use thereof.
    Type: Application
    Filed: September 12, 2014
    Publication date: March 12, 2015
    Inventors: Su Young Chae, Sunghyun Kim, Eun Ko, Yun Ju Jeong, Jae Hyun Choi
  • Patent number: 8942956
    Abstract: A method and apparatus is provided for presenting a design of a fiber-optic network. In one aspect, a server receives from a client device a request for a diagram of the design. The server accesses a data-structure representing the design, generates a representation of a cable run, and transmits the representation to the client device for display. In another aspect, the server transmits to the client device an indication that the cable run is illegal and receives from the client device an indication of a user-specified cable run. Subsequently, the server modifies the data structure to replace the illegal cable run with the user-specified cable run.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: January 27, 2015
    Assignee: Google Inc.
    Inventors: Alexander Robert Perry, Yo Eun Ko, John Hendrickson, James Fintan Kelly, Michael Skinner
  • Publication number: 20140106394
    Abstract: Provided is a multiwell plate for an easy liquid removal, wherein the mutiwell plate includes a well with at least one pore in the sidewall defining the well, and a method of analyzing a target material using the multiwell plate.
    Type: Application
    Filed: October 16, 2013
    Publication date: April 17, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Eun KO, Moon-sook Lee
  • Publication number: 20140080211
    Abstract: Provided is a multiwell plate that includes first wells and second wells separated by a sidewall made of a porous material and a method of using the same.
    Type: Application
    Filed: September 17, 2013
    Publication date: March 20, 2014
    Inventors: Moon-sook LEE, Eun KO, Min-sang KIM