Abstract: An ESD protection device is described, which includes a P-body region, a P-type doped region, an N-type doped region and an N-sinker region. The P-body region is configured in a substrate. The P-type doped region is configured in the middle of the P-body region. The N-type doped region is configured in the P-body region and surrounds the P-type doped region. The N-sinker region is configured in the substrate and surrounds the P-body region.

Abstract: An ESD protection device is described, which includes a first P-type doped region, a second P-type doped region, a first N-type doped region, a second N-type doped region and an isolation structure. The first P-type doped region is configured in a substrate. The second P-type doped region is configured in the first P-type doped region. The first N-type doped region is configured in the first P-type doped region and surrounds the second P-type doped region. The second N-type doped region is configured in the substrate and surrounds the first P-type doped region. The isolation structure is disposed between the first P-type doped region and the second N-type doped region, wherein a spacing is deployed between an outward edge of the first N-type doped region and the isolation structure.

Abstract: A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on the substrate, reducing oxide formation on the capping layer, and then depositing a dielectric material. A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on a substrate, exposing the capping layer to a plasma, heating the substrate to more than about 100° C., and depositing a low dielectric constant material.

Abstract: The Complementary Metal-Oxide Semiconductor (CMOS) transistor of the present invention includes deep halo doped regions in the substrate. The fabrication of the deep halo doped regions is integrated into the process of making the lightly doped drains or the source/drain doped regions, and therefore no extra mask is required.

Abstract: The CMOS transistor of the present invention includes deep halo doped regions in the substrate, which can avoid the occurrence of latch-up. In addition, the fabrication of the deep halo doped regions is integrated into the process of making the lightly doped drains or the source/drain doped regions, and therefore no extra mask is required.

Abstract: An ESD protection device is described, which includes a first P-type doped region, a second P-type doped region, a first N-type doped region, a second N-type doped region and an isolation structure. The first P-type doped region is configured in a substrate. The second P-type doped region is configured in the first P-type doped region. The first N-type doped region is configured in the first P-type doped region and surrounds the second P-type doped region. The second N-type doped region is configured in the substrate and surrounds the first P-type doped region. The isolation structure is disposed between the first P-type doped region and the second N-type doped region, wherein a spacing is deployed between an outward edge of the first N-type doped region and the isolation structure.

Abstract: A method and apparatus for improving a thin film scribing procedure is presented. Embodiments of the invention include a method and apparatus for determining a scribe setting for removal of an absorber layer of a photovoltaic device that improves contact resistance between a back contact layer and a front contact layer of the device.

Abstract: The present disclosure relates to methods and related cleaning solutions (116) for cleaning a glass substrate (10, 112), such as for removing metal ion contaminates from a glass substrate (10, 112) having a transparent conductive oxide layer (12). One method includes: providing a glass substrate (10, 112) having a transparent conductive oxide (TCO) layer (12); and exposing the glass substrate (10, 112) to a cleaning solution (116) that includes 0.5% to 5% organic acid, wherein the organic acid used includes citric acid, acetic acid, or oxalic acid.

Abstract: Brightness values of image frames are collected and counted to form a brightness distribution. The brightness distribution of the image frames is compared with predetermined brightness distributions. Brightness values of all pixels of successive image frames are adjusted according to a result of the comparison, so as to improve image contrast.

Abstract: A method and apparatus for improving a thin film scribing procedure is presented. Embodiments of the invention include a method and apparatus for determining a scribe setting for removal of an absorber layer of a photovoltaic device that improves contact resistance between a back contact layer and a front contact layer of the device.

Abstract: The present invention generally relates to a system that can be used to form a photovoltaic device, or solar cell, using processing modules that are adapted to perform one or more steps in the solar cell formation process. The automated solar cell fab is generally an arrangement of automated processing modules and automation equipment that is used to form solar cell devices. The automated solar fab will thus generally comprise a substrate receiving module that is adapted to receive a substrate, one or more absorbing layer deposition cluster tools having at least one processing chamber that is adapted to deposit a silicon-containing layer on a surface of the substrate, one or more back contact deposition chambers, one or more material removal chambers, a solar cell encapsulation device, an autoclave module, an automated junction box attaching module, and one or more quality assurance modules that are adapted to test and qualify the completely formed solar cell device.

Abstract: Embodiments of the invention generally provide methods of filling contact level features formed in a semiconductor device by depositing a barrier layer over the contact feature and then filing the layer using an PVD, CVD, ALD, electrochemical plating process (ECP) and/or electroless deposition processes. In one embodiment, the barrier layer has a catalytically active surface that will allow the electroless deposition of a metal on the barrier layer. In one aspect, the electrolessly deposited metal is copper or a copper alloy. In one aspect, the contact level feature is filled with a copper alloy by use of an electroless deposition process. In another aspect, a copper alloy is used to from a thin conductive copper layer that is used to subsequently fill features with a copper containing material by use of an ECP, PVD, CVD, and/or ALD deposition process.

Abstract: The present invention generally relates to a sectioning module positioned within an automated solar cell device fabrication system. The solar cell device fabrication system is adapted to receive a single large substrate and form multiple silicon thin film solar cell devices from the single large substrate.

Abstract: The present invention generally relates to a system that can be used to form a photovoltaic device, or solar cell, using processing modules that are adapted to perform one or more steps in the solar cell formation process. The automated solar cell fab is generally an arrangement of automated processing modules and automation equipment that is used to form solar cell devices. The automated solar fab will thus generally comprise a substrate receiving module that is adapted to receive a substrate, one or more absorbing layer deposition cluster tools having at least one processing chamber that is adapted to deposit a silicon-containing layer on a surface of the substrate, one or more back contact deposition chambers, one or more material removal chambers, a solar cell encapsulation device, an autoclave module, an automated junction box attaching module, and one or more quality assurance modules that are adapted to test and qualify the completely formed solar cell device.

Abstract: A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on the substrate, reducing oxide formation on the capping layer, and then depositing a dielectric material. A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on a substrate, exposing the capping layer to a plasma, heating the substrate to more than about 100° C., and depositing a low dielectric constant material.

Abstract: Adenovirus types 11p and 4p show a higher binding affinity and infectivity than type 5 for endothelial and carcinoma cell lines. Adenovirus type 11p shows a stronger binding to cells for neural origin, such as glioblastoma, neuroblastoma and medulloblastoma. The fact that adenovirus type 11 has a comparatively low prevalence in society, together with its high affinity and infectivity, makes it very suitable for use in gene therapy.

Abstract: An NMOS device having protection against electrostatic discharge. The NMOS device includes a P-substrate, a P-epitaxial layer overlying the P-substrate, a P-well in the P-epitaxial layer, an N-well in the P-epitaxial layer and encompassing the P-well, an N-Buried Layer (NBL) underneath the P-well and bordering the N-well. The P-well is fully isolated by the N-well and the NBL. The NMOS device further includes a first isolation structure consisting of a gate-insulating layer connected with a field oxide layer, which is formed on the P-epitaxial layer. A gate overlies the first isolation structure. A second isolation structure laterally spaced apart from the first isolation structure is approximately situated on the N-well. An N+ source doping region, which functions as a source of the NMOS device, is disposed in the P-well. An N+ drain doping region, which functions as a drain of the NMOS device, is disposed in the N-well.

Abstract: The CMOS transistor of the present invention includes deep halo doped regions in the substrate, which can avoid the occurrence of latch-up. In addition, the fabrication of the deep halo doped regions is integrated into the process of making the lightly doped drains or the source/drain doped regions, and therefore no extra mask is required.

Abstract: A heat dissipating fan with a wire retaining device includes a housing having a first end wall and a second end wall respectively on two ends thereof. A peripheral wall is formed between the first and second end walls. At least one of the first and second end walls includes a slot extending from a side through the other side thereof. A restraining member includes a first end fixed to the peripheral wall and a second, free end not connected to the peripheral wall, forming a guide opening between the free end of the restraining member and the peripheral wall. A conductive wire is insertable through the guide opening into a space between the restraining member and the peripheral wall.

Abstract: The present invention provides a vehicular interior rearview mirror for rear passengers, comprising a mirror inserted in a flange of a mirror housing having a rear pivot for receiving a ball formed at one end of a support bar so that the mirror housing with the mirror is rotatable to a desired angle. A sleeve is fitted in a positioning tube of the support bar. An outside support tube of a headrest of a vehicular seat is snugly inserted through the sleeve fitted in the positioning tube. The support bar is then secured to the support tube by fasteners. Hereby, a rear passenger may turn the mirror housing together with the mirror relative to the ball in order to obtain an optimum viewing angle of the rearview mirror. Thus, the invention facilitates rear pessengers leaving an automobile in a right time without causing hazards by checking the images of rear objects (e.g., approaching cars) reflected by the rearview mirror when a destination is arrived.