Patents by Inventor Feng Chen

Feng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210289214
    Abstract: The present disclosure provides a reference image encoding method, including: encoding sequence, to obtain a reconstructed image of a first and second reference images; determining whether a local area in the second reference image is suitable for updating first reference image; determining whether the first reference image is updated; when the first reference image is not updated, and it is determined the second reference image is suitable for updating the first reference image, replacing a pixel value of a corresponding area or a related area in the first reference image with a pixel value of the local area in the second reference image; and compiling, into the bitstream.
    Type: Application
    Filed: March 30, 2021
    Publication date: September 16, 2021
    Inventors: Feng WU, Fangdong CHEN, Houqiang LI, Zhuoyi LV, Haitao YANG
  • Publication number: 20210288030
    Abstract: In an embodiment, a device includes: a bottom integrated circuit die having a first front side and a first back side; a top integrated circuit die having a second front side and a second back side, the second back side being bonded to the first front side, the top integrated circuit die being free from through substrate vias (TSVs); a dielectric layer surrounding the top integrated circuit die, the dielectric layer being disposed on the first front side, the dielectric layer and the bottom integrated circuit die being laterally coterminous; and a through via extending through the dielectric layer, the through via being electrically coupled to the bottom integrated circuit die, surfaces of the through via, the dielectric layer, and the top integrated circuit die being planar.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 16, 2021
    Inventors: Ming-Fa Chen, Tzuan-Horng Liu, Chao-Wen Shih, Sung-Feng Yeh, Nien-Fang Wu
  • Publication number: 20210288009
    Abstract: A method of forming an integrated circuit structure includes forming a patterned passivation layer over a metal pad, with a top surface of the metal pad revealed through a first opening in the patterned passivation layer, and applying a polymer layer over the patterned passivation layer. The polymer layer is substantially free from N-Methyl-2-pyrrolidone (NMP), and comprises aliphatic amide as a solvent. The method further includes performing a light-exposure process on the polymer layer, performing a development process on the polymer layer to form a second opening in the polymer layer, wherein the top surface of the metal pad is revealed to the second opening, baking the polymer, and forming a conductive region having a via portion extending into the second opening.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 16, 2021
    Inventors: Ming-Da Cheng, Yung-Ching Chao, Chun Kai Tzeng, Cheng Jen Lin, Chin Wei Kang, Yu-Feng Chen, Mirng-Ji Lii
  • Publication number: 20210286207
    Abstract: A display device includes a first display unit emitting a green light that has a first output spectrum corresponding to a highest gray level of the display device, and a second display unit emitting a blue light that has a second output spectrum corresponding to the highest gray level of the display device. An intensity integral of the first output spectrum within a range from 380 nm to 780 nm is defined as a first intensity integral. An intensity integral of the second output spectrum within a range from 511 nm to 597 nm is defined as a second intensity integral. A ratio of the second intensity integral to the first intensity integral is defined as a first ratio, and the first ratio is greater than 0% and less than or equal to 25.0%.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 16, 2021
    Inventors: Hsiao-Lang Lin, Jia-Yuan Chen, Jui-Jen Yueh, Kuan-Feng Lee, Tsung-Han Tsai
  • Patent number: 11118591
    Abstract: An intelligent fan with interface compatibility is provided. The intelligent fan includes a fan body having a fan and a motor, a driving circuit, a tachometer, an output connector including a first pin, a second pin, a third pin and a fourth pin connected to a fan connector of a motherboard, and a microcontroller connected to the driving circuit and the tachometer, and connected to the motherboard via the first, second, third and fourth pins. When the intelligent fan is powered on, the microcontroller sets the third and fourth pins as input pins for receiving an output signal of the fan connector of the motherboard, and the microcontroller performs an I2C signal analysis on the output signal. When the I2C signal analysis succeeds, the intelligent fan is set in an I2C mode, and when the I2C signal analysis fails, the intelligent fan is set in a PWM mode.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: September 14, 2021
    Assignee: PROLIFIC TECHNOLOGY INC.
    Inventors: Chia Chang Hsu, Chih Feng Huang, Ching Te Chen, Ren Yuan Yu
  • Patent number: 11118779
    Abstract: A luminaire includes a speaker positioned at a first depth within a luminaire housing and capable of generating an audio output from a speaker diaphragm. The luminaire also includes a light source that generates a light output. Further, the luminaire includes a light guide assembly positioned at a second depth within the luminaire housing different from the first depth. The light guide assembly includes an acoustically transparent area positioned along a sound path from the speaker diaphragm, and the light guide assembly extracts the light output from the light source and directs the light output away from the luminaire.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: September 14, 2021
    Assignee: ABL IP Holding LLC
    Inventors: Charles Jeffrey Spencer, Daniel Francis Posacki, Kyle Michael Bradd, Gregory Philip Frankiewicz, Feng Chen, John Glenn Serra, Darcie Renee Callison
  • Patent number: 11121257
    Abstract: The present disclosure provides a thin film transistor, a pixel structure, a display device, and a manufacturing method. The thin film transistor includes: a gate on the substrate; a gate insulating layer covering the gate and the substrate; a first support portion and a second support portion, which are provided on the gate insulating layer covering the substrate and located on both sides of the gate, wherein the first support portion is not connected to the second support portion; a semiconductor layer on the first support portion, the second support portion, and the gate insulating layer covering the gate; and a source and a drain respectively connected to the semiconductor layer. The first support portion and the second support portion are respectively configured to support the semiconductor layer.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: September 14, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhaohui Qiang, Feng Guan, Zhi Wang, Yupeng Gao, Yang Lyu, Chao Li, Jianhua Du, Lei Chen
  • Patent number: 11119988
    Abstract: An aspect of performing logical validation on loaded data in a database includes a rule engine configured to, in response to an addition or update of a new rule for logical validation, determine a delta rule that includes a delta part of the new rule with respect to existing rules. An aspect also includes an object container containing object instances that have been validated using the existing rules. The object instance contains only data related to the existing rules and extracted from the database. An aspect further includes a validation engine configured to, upon determining that the delta rule relates to extra data other than the data contained in the object instance, extract the extra data from a database and add it to corresponding object instances, and use at least a part of the new rule to perform logical validation on the relevant object instances in the object container.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: September 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Bai Chen Deng, An Chao Song, Feng Cheng Sun, Jing Sun, Lin Xu
  • Publication number: 20210278631
    Abstract: An optical imaging lens, including first to sixth lens elements sequentially arranged from an object side to an image side along an optical axis, is provided. Each lens element includes an object-side surface facing the object side and allowing imaging rays to pass through and an image-side surface facing the image side and allowing the imaging rays to pass through. The optical imaging lens satisfies: (T3+G34)/T4?1.900 and (HFOV×ImgH)/EFL?50.000°, where T3 and T4 are thicknesses of the third and fourth lens elements along the optical axis, G34 is an air gap from the third lens element to the fourth lens element along the optical axis, HFOV is a half field of view of the optical imaging lens, ImgH is an image height of the optical imaging lens, and EFL is an effective focal length of the optical imaging lens.
    Type: Application
    Filed: May 27, 2020
    Publication date: September 9, 2021
    Applicant: GENIUS ELECTRONIC OPTICAL (XIAMEN) CO., LTD.
    Inventors: Yongfeng Lai, Citian You, Feng Chen
  • Publication number: 20210280696
    Abstract: A semiconductor structure includes a first fin and a second fin protruding from a substrate, isolation features over the substrate to separate the first and the second fins, where a top surface of each of the first and the second fins is below a top surface of the isolation features, inner fin spacers disposed along inner sidewalls of the first and the second fins, where the inner fin spacers have a first height measured from a top surface of the isolation features, outer fin spacers disposed along outer sidewalls of the first and the second fins, where the outer fin spacers have a second height measured from the top surface of the isolation features that is less than the first height, and a source/drain (S/D) structure merging the first and the second fins, where the S/D structure includes an air gap having a top portion over the inner fin spacers.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 9, 2021
    Inventors: Chia-Ta Yu, Sheng-Chen Wang, Feng-Cheng Yang, Yen-Ming Chen, Sai-Hooi Yeong
  • Publication number: 20210276000
    Abstract: The present invention provides a preparation method of a photocatalytic composite material, and relates to the field of catalyst technologies. The preparation method provided in the present invention includes the following steps: (1) subjecting plant leaves to soaking pretreatment to obtain template biomass; (2) mixing a molybdenum source-sulfur source aqueous solution with the template biomass obtained in step (1) and conducting impregnation to obtain a composite material precursor; and (3) calcining the composite material precursor obtained in step (2) to obtain the photocatalytic composite material. The photocatalytic composite material in the present invention includes acicular molybdenum sulfide and biomass carbon, the acicular molybdenum sulfide is loaded to a surface of the flake carbon, the mass content of the biomass carbon is 70% to 90%, and the mass content of the molybdenum sulfide is 10% to 30%.
    Type: Application
    Filed: July 30, 2018
    Publication date: September 9, 2021
    Applicant: SUZHOU UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Zhigang CHEN, Feng CHEN, Junchao QIAN, Chengbao LIU, Chencheng WANG
  • Publication number: 20210275676
    Abstract: The present disclosure provides method of making a nanoparticle complex wherein the nanoparticle complex comprises a ligand and a metal cation. The disclosure also provides nanoparticle complexes, methods of treating a disease in a patient utilizing the nanoparticle complexes, methods of identifying a disease in a patient utilizing the nanoparticle complexes, and kits involving the nanoparticle complexes.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 9, 2021
    Inventors: FENG LI, WU CHEN, PENGYU CHEN
  • Publication number: 20210279571
    Abstract: An apparatus to facilitate optimization of a neural network (NN) is disclosed. The apparatus includes optimization logic to define a NN topology having one or more macro layers, adjust the one or more macro layers to adapt to input and output components of the NN and train the NN based on the one or more macro layers.
    Type: Application
    Filed: February 17, 2021
    Publication date: September 9, 2021
    Applicant: Intel Corporation
    Inventors: Narayan Srinivasa, Joydeep Ray, Nicolas C. Galoppo Von Borries, Ben J. Ashbaugh, Prasoonkumar Surti, Feng Chen, Barath Lakshmanan, Elmoustapha Ould-Ahmed-Vall, Liwei Ma, Linda L. Hurd, Abhishek R. Appu, John C. Weast, Sara S. Baghsorkhi, Justin E. Gottschlich, Chandrasekaran Sakthivel, Farshad Akhbari, Dukhwan Kim, Altug Koker, Nadathur Rajagopalan Satish
  • Publication number: 20210281991
    Abstract: There is provided an electronic device having Bluetooth communication function. The electronic device confirms whether a current packet received in a receive slot is a retransmitted packet according to a SEQN bit in the packet header so as to determine whether to continuously turn on an RF receiver in the receive slot or early turn off the RF receiver to save power.
    Type: Application
    Filed: May 21, 2021
    Publication date: September 9, 2021
    Inventors: YU-FENG CHEN, CHIH-WEI SUNG
  • Patent number: 11115104
    Abstract: This disclosure describes systems, methods, and devices related to signaling and use of multiple transmission chains. A device may determine bits indicative of eight or fewer spatial streams. The device may encode the bits by generating an indication of more than eight spatial streams. The device may determine one or more fields of a frame, the one or more fields including the encoded bits. The device may send the frame.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: September 7, 2021
    Assignee: Intel Corporation
    Inventors: Po-Kai Huang, Yaron Alpert, Laurent Cariou, Xiaogang Chen, Feng Jiang, Qinghua Li, Robert Stacey
  • Patent number: 11112908
    Abstract: The present disclosure provides a touch data processing method, a device and a storage medium.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: September 7, 2021
    Assignees: HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Cheng Chen, Yufei Hu, Yifei Zhan, Feng Yang, Youshan Hou
  • Patent number: 11114413
    Abstract: A package structure includes a plurality of stacked die units and an insulating encapsulant. The plurality of stacked die units is stacked on top of one another, where each of the plurality of stacked die units include a first semiconductor die, a first bonding chip. The first semiconductor die has a plurality of first bonding pads. The first bonding chip is stacked on the first semiconductor die and has a plurality of first bonding structure. The plurality of first bonding structures is bonded to the plurality of first bonding pads through hybrid bonding. The insulating encapsulant is encapsulating the plurality of stacked die units.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: September 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Sung-Feng Yeh, Tzuan-Horng Liu, Chao-Wen Shih
  • Patent number: 11114597
    Abstract: A display device is provided. The display device includes a substrate and a first metal line and a second metal line disposed on the substrate. The display device includes a first pad and a second pad disposed on the substrate and electrically connected to the first metal line and the second metal line respectively. The display device further includes an electronic device disposed on the first pad and the second pad. The electronic device includes a first connecting post and a second connecting post, wherein a distance between the first connecting post and the second connecting post is in a range from 1 um to 200 um. A portion of the first connecting post is embedded in the first pad and a portion of the second connecting post is embedded in the second pad.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: September 7, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Patent number: 11115650
    Abstract: A system and a method for monitoring a video communication device configured to monitor an activation state of a video capturing module are provided. A detection circuit is configured to detect an operation current input to the video capturing module. A control circuit is electrically connected to the detection circuit and determines whether the video capturing module is activated according to a magnitude of the operation current.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: September 7, 2021
    Assignee: Acer Incorporated
    Inventors: Ming-Feng Hsieh, Sheng-Yu Weng, Chun-Chih Kuo, Chih-Cheng Chen
  • Patent number: D930228
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: September 7, 2021
    Assignee: RADIANT OPTO-ELECTRONICS CORPORATION
    Inventors: Pai-Ho Hsu, Guo-Hao Huang, Kun-Feng Chen