Patents by Inventor Feng Chen

Feng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146176
    Abstract: A method of controlling phase shift pulse width modulation of a power converter, the method includes a step of obtaining sampling signals of an output voltage and current of the power converter. Then, a digital signal processor is used to calculate an output power of the power converter. Next, a comparator is used to compare the output power of the power converter with a reference power. When the output power is less than the reference power, the modulation control of the switch of the power converter enters into hard-switching mode, and when the output power is greater than the reference power, the modulation control of the switch of the power converter enters into soft-switching mode.
    Type: Application
    Filed: November 24, 2022
    Publication date: May 2, 2024
    Inventors: Chun-Chen Chen, Jian-Hsieng Lee, Feng-Yi Lin
  • Publication number: 20240147635
    Abstract: A case with screw thread in a sealed manner for communication equipment includes an upper cover and a bottom cover. The inner surface of the upper cover has an internal screw thread. The outer surface of the bottom cover has an external screw thread. When the external screw thread is fixed with the internal screw thread, the inner surface of the upper cover is in contact with the outer surface of the bottom cover in a sealed state, and the upper cover and the bottom cover form a receiving space. The case provides the following advantages: quickly and repeated assembly and disassembly; no need for any space for bolts so as to minimizes the size; without bolt, no need for washers or sealant; good sealing properties and good waterproof effect so as to prevent water from entering the case.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Inventors: Sheng Chung Chen, Ben Hong Chen, I Feng Ou
  • Patent number: 11973113
    Abstract: Provided is a semiconductor device including a substrate having a lower portion and an upper portion on the lower portion; an isolation region disposed on the lower portion of the substrate and surrounding the upper portion of the substrate in a closed path; a gate structure disposed on and across the upper portion of the substrate; source and/or drain (S/D) regions disposed in the upper portion of the substrate at opposite sides of the gate structure; and a channel region disposed below the gate structure and abutting between the S/D regions, wherein the channel region and the S/D regions have different conductivity types, and the channel region and the substrate have the same conductivity type.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Victor Chiang Liang, Chung-Hao Chu
  • Patent number: 11971624
    Abstract: A display device includes a first display unit emitting a green light having a first output spectrum corresponding to a highest gray level of the display device and a second display unit emitting a blue light having a second output spectrum corresponding to the highest gray level of the display device. The first output spectrum has a main wave with a first peak. The second output spectrum has a main wave with a second peak and a sub wave with a sub peak. The second peak corresponds to a main wavelength, the sub peak corresponds to a sub wavelength, and the main wavelength is less than the sub wavelength. An intensity of the second peak is greater than an intensity of the sub peak and an intensity of the first peak.
    Type: Grant
    Filed: July 6, 2023
    Date of Patent: April 30, 2024
    Assignee: InnoLux Corporation
    Inventors: Hsiao-Lang Lin, Jia-Yuan Chen, Jui-Jen Yueh, Kuan-Feng Lee, Tsung-Han Tsai
  • Patent number: 11972072
    Abstract: The present disclosure provides an electronic device including a first sensing circuit, a second sensing circuit and a power line. The first sensing circuit includes a first sensing unit and a first transistor, and a first end of the first sensing unit is coupled to a control end of the first transistor. The second sensing circuit includes a second sensing unit and a second transistor, and a first end of the second sensing unit is coupled to a control end of the second transistor. A first end of the first transistor and a first end of the second transistor are coupled to the power line.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: April 30, 2024
    Assignee: InnoLux Corporation
    Inventors: Shu-Fen Li, Chuan-Chi Chien, Hsiao-Feng Liao, Rui-An Yu, Chang-Chiang Cheng, Po-Yang Chen, I-An Yao
  • Publication number: 20240136413
    Abstract: A laterally diffused metal oxide semiconductor device and a preparation method thereof are disclosed. The semiconductor device includes: a substrate; a body region having a first conductivity type and formed in the substrate; a drift region, having a second conductivity type, formed in the substrate and adjacent to the body region; a field plate structure, formed on the drift region, a lower surface of an end of the field plate structure close to the body region being flush with the upper surface of the substrate, and the end of the field plate structure close to the body region also having an upwardly extending inclined surface; and a drain region, having a second conductivity type, formed in an upper layer of the drift region, and in contact with the end of the field plate structure away from the body region.
    Type: Application
    Filed: July 27, 2021
    Publication date: April 25, 2024
    Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: CHUNXU LI, FENG LIN, SHUXIAN CHEN, HONGFENG JIN, HUAJUN JIN, GANG HUANG, YU HUANG, BIN YANG
  • Publication number: 20240136484
    Abstract: An electronic device includes a substrate, a semiconductor unit and an insulating layer. The semiconductor unit is disposed on the substrate. The insulating layer is disposed on the semiconductor unit, and the insulating layer includes a first portion and a second portion connected to the first portion. In a top view, the first portion partially overlaps the semiconductor unit, the second portion does not overlap the semiconductor unit, and a part of an edge of the insulating layer is irregular.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: InnoLux Corporation
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Publication number: 20240136905
    Abstract: A button mechanism is provided, including a button element, a magnet connected to the button, a hollow tube, a first coil, and a second coil. The first and second coils are disposed on the tube. When the first coil generates a first magnetic field, the magnet is magnetically attracted by the first coil, and the button element is positioned in the first position. When the second coil generates a second magnetic field, the magnet is attracted by the second coil, and the button element is positioned in the second position.
    Type: Application
    Filed: January 13, 2023
    Publication date: April 25, 2024
    Inventors: Chun-Lung CHEN, Chih-Ching HSIEH, Chun-Feng YEH
  • Publication number: 20240137971
    Abstract: An extremely high throughput (EHT) station (STA) configured for trigger based (TB) transmission may decode an trigger frame (TF) received from an access point (AP). The TF may include an assignment of resources comprising one or more 20 MHz channels. The EHT STA may determine which of the one or more assigned channels are available for transmission and which of the allocated channels are unavailable when the EHT STA is assigned more than one 20 MHz channel. The EHT STA may encode a EHT TB PPDU in response to the trigger frame. The EHT TB PPDU may be encoded to include an EHT preamble followed by a data field. The EHT preamble may be encoded to indicate channel availability. The EHT STA may generate signalling to cause the EHT STA to transmit the encoded EHT TB PPDU only on the assigned channels that have been determined to be available.
    Type: Application
    Filed: August 29, 2023
    Publication date: April 25, 2024
    Inventors: Xiaogang Chen, Qinghua Li, Feng Jiang, Ziv Avital, Po-Kai Huang
  • Publication number: 20240137110
    Abstract: A method for reducing frequency interference, and a communication satellite system. The method includes configuring the communication satellite system, determining a first range of areas in which a spatial isolation angle between the LEO satellite and the GEO satellite does not satisfy a minimum spatial isolation angle within service areas of the movable spot beams, enabling the movable spot beams to not enter the areas, and when the movable spot beams of the transmitting and receiving user antennas of multiple adjacent LEO satellites provide services to a same area, calculating a spatial isolation angles between the movable spot beams of the transmitting and receiving user antennas of any two adjacent LEO satellites, and in response to the spatial isolation angle not satisfying the minimum spatial isolation angle, assigning different sub-frequencies to the movable spot beams that do not satisfy the minimum spatial isolation angle.
    Type: Application
    Filed: September 29, 2021
    Publication date: April 25, 2024
    Inventors: Fenglong Hou, Feng Li, Xiaoxiong Lin, Yu Qi, Shengwei Pei, Dong Chen, Jie Xing, Hua Huang, Xingang Li, Jincheng Tong, Hengchao Sun, Shaoran Liu, Zeyu Bao
  • Publication number: 20240132465
    Abstract: Described herein are MAT2A inhibitors and pharmaceutical compositions comprising said inhibitors. The subject compounds and compositions are useful for the treatment of a disease or disorder associated with MAT2A.
    Type: Application
    Filed: November 15, 2023
    Publication date: April 25, 2024
    Inventors: Chiachun CHEN, Xiao DING, Xiaosong LIU, Feng REN, Hailong WANG
  • Publication number: 20240132641
    Abstract: The present invention relates to an ultra-high molecular weight polyethylene and a process for preparing the same, said ultra-high molecular weight polyethylene has a viscosity-average molecular weight of 150-1000×104 g/mol, a metal element content of 0-50 ppm, a bulk density of 0.30-0.55 g/cm3, a true density of 0.900-0.940 g/cm3, a melting point of 140-152° C., and a crystallinity of 40-75%, and said polyethylene satisfies at least one of condition (1) and condition (2): Condition (1): tensile elasticity modulus is greater than 250 MPa, preferably greater than 280 MPa, more preferably greater than 300 MPa, Condition (2): Young's modulus is greater than 300 MPa, preferably greater than 350 MPa. The ultra-high molecular weight polyethylene has high mechanical properties, high melting point, low metal element content and ash content, and the preparation process is simple, flexible and adjustable, and the ultra-high molecular weight ethylene copolymer has a high tensile elasticity module.
    Type: Application
    Filed: January 26, 2022
    Publication date: April 25, 2024
    Inventors: Chuanfeng LI, Wenrui WANG, Kun JING, Yuejun XING, Huimin XIA, Minghua CHEN, Zhonglin YOU, Shaohui CHEN, Jianhong ZHAI, Feng GUO, Liu YANG
  • Publication number: 20240131819
    Abstract: A thermally conductive board includes a first metal layer, a second metal layer, and a thermally conductive layer. The material of the first metal layer includes copper, and the first metal layer has a first top surface and a first bottom surface opposite to the first top surface. A first metal coating layer covers the first bottom surface. The material of the second metal layer includes copper, and the second metal layer has a second top surface and a second bottom surface opposite to the second top surface. A second metal coating layer covers the second top surface and faces the first metal coating layer. The thermally conductive layer is an electrically insulator laminated between the first metal coating layer and the second metal coating layer.
    Type: Application
    Filed: May 3, 2023
    Publication date: April 25, 2024
    Inventors: KAI-WEI LO, WEN-FENG LEE, HSIANG-YUN YANG, KUO-HSUN CHEN
  • Publication number: 20240136344
    Abstract: A display device includes a substrate, at least one light emitting unit bound on the substrate, a transparency controllable unit disposed on the substrate, and an integrated circuit unit overlapped with the substrate. The integrated circuit unit includes a semiconducting structure and a conductive structure overlapped with the semiconducting structure. The integrated circuit unit is electrically connected to the at least one light emitting unit and the transparency controllable unit.
    Type: Application
    Filed: September 17, 2023
    Publication date: April 25, 2024
    Applicant: InnoLux Corporation
    Inventors: Jia-Yuan CHEN, Yu-Chia HUANG, Tsung-Han TSAI, Kuan-Feng LEE
  • Publication number: 20240138152
    Abstract: In accordance with embodiments, a memory array is formed with a multiple patterning process. In embodiments a first trench is formed within a multiple layer stack and a first conductive material is deposited into the first trench. After the depositing the first conductive material, a second trench is formed within the multiple layer stack, and a second conductive material is deposited into the second trench. The first conductive material and the second conductive material are etched.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Feng-Cheng Yang, Meng-Han Lin, Sheng-Chen Wang, Han-Jong Chia, Chung-Te Lin
  • Publication number: 20240137006
    Abstract: The disclosed technology generally relates to quartz crystal devices and more particularly to quartz crystal devices configured to vibrate in torsional mode. In one aspect, a quartz crystal device configured for temperature sensing comprises a fork-shaped quartz crystal comprising a pair of elongate tines laterally extending from a base region in a horizontal lengthwise direction of the fork-shaped quartz crystal, wherein each of the tines has formed on one or both of opposing sides thereof a pair of vertically recessed groove structures laterally elongated in the horizontal lengthwise direction, wherein the pair of groove structures are separated in a horizontal widthwise direction by a line structure.
    Type: Application
    Filed: May 17, 2023
    Publication date: April 25, 2024
    Inventors: Yue Fang, Jian Feng Chen
  • Patent number: 11968376
    Abstract: The present disclosure provides a reference image encoding method, including: encoding sequence, to obtain a reconstructed image of a first and second reference images; determining whether a local area in the second reference image is suitable for updating first reference image; determining whether the first reference image is updated; when the first reference image is not updated, and it is determined the second reference image is suitable for updating the first reference image, replacing a pixel value of a corresponding area or a related area in the first reference image with a pixel value of the local area in the second reference image; and compiling, into the bitstream.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: April 23, 2024
    Assignees: Huawei Technologies Co., Ltd., University of Science and Technology of China
    Inventors: Feng Wu, Fangdong Chen, Houqiang Li, Zhuoyi Lv, Haitao Yang
  • Patent number: 11966587
    Abstract: A method for optimizing a Polar-RNNA quantizer of MLC NAND flash based on deep learning comprises the following steps: Step S1: transforming an MLC flash detection task into a deep learning task, and obtaining three hard-decision read thresholds based on a neural network; Step S2: expanding six soft-decision read thresholds based on the three hard-decision read thresholds; Step S3: constructing an LLR mapping table, and obtaining new LLR information of MLC flash based on the LLR mapping table; Step S4: symmetrizing an MLC flash channel, and performing density evolution; and Step S5: optimizing the soft-decision read thresholds based on a genetic algorithm to obtain an optimal quantization interval. According to the invention, polar codes can be directly used for MLC flash channels without the arduous work of MLC flash channel modeling, so that the reliability of MLC flash is effectively improved.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 23, 2024
    Assignee: FUZHOU UNIVERSITY
    Inventors: Pingping Chen, Zhen Mei, Yi Fang, Xu Luo, Zhijian Lin, Feng Chen, Riqing Chen
  • Patent number: 11967553
    Abstract: The present disclosure provides a semiconductor package, including a first semiconductor structure, including an active region in a first substrate portion, wherein the active region includes at least one of a transistor, a diode, and a photodiode, a first bonding metallization over the first semiconductor structure, a first bonding dielectric over the first semiconductor structure, surrounding and directly contacting the first bonding metallization, a second semiconductor structure over a first portion of the first semiconductor structure, wherein the second semiconductor structure includes a conductive through silicon via, a second bonding dielectric at a back surface of the second semiconductor structure, a second bonding metallization surrounded by the second bonding dielectric and directly contacting the second bonding dielectric, and a conductive through via over a second portion of the first semiconductor structure different from the first portion.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Fa Chen, Sung-Feng Yeh, Chen-Hua Yu
  • Publication number: 20240126122
    Abstract: The present disclosure relates to an array substrate. At least one of a pixel electrode and a common electrode in the array substrate has an electrode structure. The electrode structure includes: first and second electrode portions, and a conductive connection portion. The first electrode portion includes a first connection bar and first electrode bars. The second electrode portion includes a second connection bar and second electrode bars. No common line is provided in each of the sub-pixel regions.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yifu CHEN, Yingying QU, Ting DONG, Jianhua HUANG, Lingdan BO, Feng QU