Patents by Inventor Feng Chiang

Feng Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180003570
    Abstract: An acoustic wave filter having thermal sensing acoustic wave resonator comprises a substrate, a plurality of series acoustic wave resonators formed on the substrate, at least one shunt acoustic wave resonator formed on the substrate and a thermal sensing acoustic wave resonator. The thermal sensing acoustic wave resonator is one of a series acoustic wave resonator and a shunt acoustic wave resonator. Thereby the thermal sensing acoustic wave resonator plays dual roles of thermal sensing and acoustic wave filtering.
    Type: Application
    Filed: June 27, 2017
    Publication date: January 4, 2018
    Inventors: Re Ching Lin, Shu Hsiao Tsai, Cheng Kuo Lin, Fan Hsiu Huang, Chih-Feng Chiang, Tung-Yao Chou
  • Publication number: 20180006556
    Abstract: A thermal sensor circuit comprises a conversion circuit which is one of a buck DC-DC converter circuit and a boost DC-DC converter circuit, wherein the conversion circuit comprises an inductor and an output terminal. A thermal sensor senses a thermal variation correlated to a capacitance variation of the thermal sensor. The capacitance variation induces an internal parasitic capacitance variation of the inductor which is connected in parallel to the thermal sensor and results a variation of an energy stored in the inductor. Hence a variation of a converted circuit signal outputting by the output terminal is caused, wherein the variation of the converted circuit signal is correlated to the thermal variation.
    Type: Application
    Filed: June 27, 2017
    Publication date: January 4, 2018
    Inventors: Re Ching Lin, Fan Hsiu Huang, Tung-Yao Chou, Cheng Kuo Lin, Shu Hsiao Tsai, Chih-Feng Chiang
  • Patent number: 9823212
    Abstract: The present invention relates a setting method for a conductive object of electrochemical test strip. In the embodiment, this manufacturing process is not complex, convenient, and has well precision, such that the cost of manufacturing an electrochemical test strip is reduced effectively, and the disadvantage of past manufacturing process is improved. The present invention is highly applied and convenient, so that wide application can be expected in the future.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: November 21, 2017
    Assignee: KUANG HONG PRECISION CO., LTD.
    Inventors: Cheng-Feng Chiang, Jung-Chuan Chiang, Wen-Te Chiang, Chien-Ying Chiang, Chien-Yi Chiang
  • Publication number: 20170315577
    Abstract: A control circuit comprising a driving circuit, which comprises a voltage adjusting circuit for generating a control voltage, and comprises a first transistor and a second transistor. The first transistor comprises: a first terminal; a second terminal; and a control terminal, for receiving a bias voltage generated from at least operating voltage of the control circuit. The second transistor comprises: a first terminal, coupled to a second terminal of the first transistor; a second terminal, for receiving a first predetermined voltage; and a control terminal, for receiving the control voltage. The control circuit further comprises: a candidate voltage selecting circuit, for outputting one of a plurality of candidate voltages; and a voltage selecting circuit, for outputting one of the candidate voltage output from the candidate voltage selecting circuit and a ground voltage as the bias voltage.
    Type: Application
    Filed: July 19, 2017
    Publication date: November 2, 2017
    Inventors: Che-Yuan Jao, Chen-Feng Chiang
  • Patent number: 9798345
    Abstract: A control circuit comprising a driving circuit, which comprises a voltage adjusting circuit for generating a control voltage, and comprises a first transistor and a second transistor. The first transistor comprises: a first terminal; a second terminal; and a control terminal, for receiving a bias voltage generated from at least operating voltage of the control circuit. The second transistor comprises: a first terminal, coupled to a second terminal of the first transistor; a second terminal, for receiving a first predetermined voltage; and a control terminal, for receiving the control voltage. The control circuit further comprises: a candidate voltage selecting circuit, for outputting one of a plurality of candidate voltages; and a voltage selecting circuit, for outputting one of the candidate voltage output from the candidate voltage selecting circuit and a ground voltage as the bias voltage.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: October 24, 2017
    Assignee: MEDIATEK INC.
    Inventors: Che-Yuan Jao, Chen-Feng Chiang
  • Patent number: 9800263
    Abstract: The present invention provides a signal processing system and associated method. The signal processing system includes converter(s) for conversion between digital and analog, each converter includes multiple serially coupled units forming multiple frequency interfaces respectively associating with different frequencies, and each converter is partitioned, at a selected frequency interface, to a first portion and a second portion respectively formed in the first chip and the second chip. The partitioning frequency interface is selected to reduce implement cost.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: October 24, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chien-Chung Yang, Chia-Feng Chiang, Chien-Ming Chen
  • Publication number: 20170294893
    Abstract: A resonance structure of bulk acoustic wave resonator comprises a bottom electrode, a dielectric layer and a top electrode, wherein the dielectric layer is formed on the bottom electrode; the top electrode is formed on the dielectric layer. A resonance area is defined by the overlapping area of the projection of the bottom electrode, the dielectric layer and the top electrode. The resonance area has a contour. The contour includes at least three curved edges and is formed by connecting the at least three curved edges. Each curved edge is concave to a geometric center of the contour.
    Type: Application
    Filed: August 4, 2016
    Publication date: October 12, 2017
    Inventors: Chia-Ta CHANG, Re Ching LIN, Yung-Chung CHIN, Chih-Feng CHIANG
  • Publication number: 20170292928
    Abstract: The present invention relates a setting method for a conducting element of an electrochemical test strip and electrochemical test strip thereof. An inspection body is formed by injection molding polymer plastic materials to coat with the plurality of conducting elements, and an external contact surface on an information outputting end of the conducting element is exposed from an inspection slot of the inspection body, so that the information outputting end of the conducting element is extended from the inspection body. Eventually, the information outputting end is bent to fix on a surface of the inspection body. The present invention is not complex and has more precision and convenience, and the manufacturing cost can be reduced efficiently, so that wide application can be expected in the near future.
    Type: Application
    Filed: May 24, 2016
    Publication date: October 12, 2017
    Inventors: Cheng-Feng CHIANG, Chien-Ying CHIANG, Chien-Yi CHIANG
  • Publication number: 20170272052
    Abstract: A protective cover for an acoustic wave device and a fabrication method thereof, for protecting an acoustic wave device having a resonant area on a surface of a substrate during a packaging operation so as to avoid molding compound flowing onto the resonant area of the acoustic wave device, wherein at least one electrical device is provided on the surface of the substrate and the at least one electrical device includes a temperature sensor. The acoustic wave device protection structure comprising: a metal covering layer, having a concave surface and a bottom rim, the bottom rim connected to the acoustic wave device and forming at least one opening between the bottom rim and the acoustic wave device, and the concave surface covering over the resonant area to form a cavity between the concave surface and the resonant area.
    Type: Application
    Filed: June 8, 2017
    Publication date: September 21, 2017
    Inventors: Cheng-Kuo Lin, Shu-Hsiao Tsai, Rong-Hao Syu, Yi-Ling Liu, Re-Ching Lin, Pei-Chun Liao, Chih-Feng Chiang
  • Patent number: 9746866
    Abstract: One embodiment of the present application discloses a control circuit comprising a driving circuit which comprises a voltage adjusting circuit, a first transistor and a second transistor. The first transistor comprises: a first terminal; a second terminal; and a control terminal, for receiving a bias voltage generated from at least operating voltage of the control circuit. The second transistor comprises: a first terminal, coupled to a second terminal of the first transistor; a second terminal, for receiving a first predetermined voltage; and a control terminal, for receiving the control voltage. A control system comprising the control circuit is also disclosed.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: August 29, 2017
    Assignee: MEDIATEK INC.
    Inventors: Che-Yuan Jao, Chen-Feng Chiang
  • Publication number: 20170203959
    Abstract: A chip stack having a protection structure for semiconductor device package comprises a first chip and a second chip stacked with each other. A first surface of the first chip and a second surface of the second chip are facing to each other. At least one metal pillar is formed on at least one of the first surface and the second surface and connected with the other. At least one protection ring is formed on at least one of the first surface and the second surface and having a first gap with the other. At least one electrical device is formed on at least one of the first surface and the second surface and is located inside at least one of the at least one protection ring, wherein the at least one electrical device includes a temperature sensor.
    Type: Application
    Filed: March 30, 2017
    Publication date: July 20, 2017
    Inventors: PEI-CHUN LIAO, PO-WEI TING, CHIH-FENG CHIANG, YU-KAI WU, YU-FAN CHANG, RE-CHING LIN, SHU-HSIAO TSAI, CHENG-KUO LIN
  • Publication number: 20170207151
    Abstract: A semiconductor package structure includes a conductive structure, at least two semiconductor elements and an encapsulant. The conductive structure has a first surface and a second surface opposite the first surface. The semiconductor elements are disposed on and electrically connected to the first surface of the conductive structure. The encapsulant covers the semiconductor elements and the first surface of the conductive structure. The encapsulant has a width ‘L’ and defines at least one notch portion. A minimum distance ‘d’ is between a bottom surface of the notch portion and the second surface of the conductive structure. The encapsulant has a Young's modulus ‘E’ and a rupture strength ‘Sr’, and L/(K×d)>E/Sr, wherein ‘K’ is a stress concentration factor with a value of greater than 1.2.
    Type: Application
    Filed: January 14, 2016
    Publication date: July 20, 2017
    Inventors: Wen-Long LU, Chi-Chang LEE, Wei-Min HSIAO, Yuan-Feng CHIANG
  • Publication number: 20170162518
    Abstract: A chip stack having a protection structure for semiconductor device package, which comprises a first chip and a second chip stacked with each other, wherein said first chip has a first surface, said second chip has a second surface, said first surface and said second surface are two surfaces facing to each other, wherein at least one metal pillar is formed on at least one of said first surface and said second surface and connected with the other, at least one protection ring is formed on at least one of said first surface and said second surface and having a first gap with the other, and at least one electrical device is formed on at least one of said first surface and said second surface, wherein said at least one electrical device is located inside at least one of said at least one protection ring.
    Type: Application
    Filed: May 5, 2016
    Publication date: June 8, 2017
    Inventors: PEI-CHUN LIAO, PO-WEI TING, CHIH-FENG CHIANG, YU-KAI WU, YU-FAN CHANG, RE-CHING LIN, SHU-HSIAO TSAI, CHENG-KUO LIN
  • Publication number: 20170083297
    Abstract: An online discussing method includes following steps: receiving and verifying a user information from an electronic device by a server, and transmitting an online discussing interface to the electronic device after verifying the user information; receiving a programming language selection signal inputted from the programming language selection interface; providing a programming language selection interface to the electronic device; selectively receiving a reply program received from the online discussing interface; wherein, when the server receives the reply program, the server determines interpreting or compiling the reply program according to the programming language selection signal; executing the reply program and outputting an execution result; and recording the reply program and the execution result, and displaying the reply program and the execution result on the online discussing interface.
    Type: Application
    Filed: October 23, 2015
    Publication date: March 23, 2017
    Inventors: Cheng-Chih CHIANG, Hsiao-Chien TSENG, Chieh-Feng CHIANG
  • Publication number: 20170077947
    Abstract: The present invention provides a signal processing system and associated method. The signal processing system includes converter(s) for conversion between digital and analog, each converter includes multiple serially coupled units forming multiple frequency interfaces respectively associating with different frequencies, and each converter is partitioned, at a selected frequency interface, to a first portion and a second portion respectively formed in the first chip and the second chip. The partitioning frequency interface is selected to reduce implement cost.
    Type: Application
    Filed: November 22, 2016
    Publication date: March 16, 2017
    Inventors: Chien-Chung Yang, Chia-Feng Chiang, Chien-Ming Chen
  • Patent number: 9557764
    Abstract: A clock tree circuit Including a first clock source, generating a first signal, and a first tree circuit. The first clock tree circuit includes a first driving stage for receiving the first signal, a second driving stage, connected to the first driving stage, a third driving stage, connected to the second driving stage, and a metal connection element, coupled between different nodes of the third driving stage and configured as a short-circuited element.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: January 31, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chen-Feng Chiang, Kai-Hsin Chen, Ming-Shi Liou, Chih-Tsung Yao
  • Patent number: 9535858
    Abstract: The present invention provides a signal processing system and associated method. The signal processing system includes converter(s) for conversion between digital and analog, each converter includes multiple serially coupled units forming multiple frequency interfaces respectively associating with different frequencies, and each converter is partitioned, at a selected frequency interface, to a first portion and a second portion respectively formed in the first chip and the second chip. The partitioning frequency interface is selected to reduce implement cost.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: January 3, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chien-Chung Yang, Chia-Feng Chiang, Chien-Ming Chen
  • Publication number: 20160377570
    Abstract: The present invention relates a setting method for a conductive object of electrochemical test strip. In the embodiment, this manufacturing process is not complex, convenient, and has well precision, such that the cost of manufacturing an electrochemical test strip is reduced effectively, the disadvantage of past manufacturing process is improved. The present invention is highly applied and convenient, so that wide application can be expected in the future.
    Type: Application
    Filed: June 29, 2015
    Publication date: December 29, 2016
    Inventors: Cheng-Feng CHIANG, Jung-Chuan CHIANG, Wen-Te CHIANG, Chien-Ying CHIANG, Chien-Yi CHIANG
  • Patent number: 9504185
    Abstract: A loop heat pipe structure includes a transport pipe, an evaporator, a first wick layer, a second wick layer, and a plurality of grooves. The transport pipe communicates with the evaporator. The evaporator has a bottom and internally defines a first chamber and a second chamber, and has a working fluid filled therein. The first wick layer is located on the bottom, and the second wick layer is located on and covers the first wick layer. The grooves can be selectively provided on the first wick layer or the bottom. The first and second wick layers are so designed that the situation of very high vapor pressure would not occur in the second chamber, enabling the loop heat pipe structure to have upgraded heat dissipation efficiency.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: November 22, 2016
    Assignee: Asia Vital Components (Shen Zhen) Co., Ltd.
    Inventors: Jun Xiang, Xiao-Xiang Zhou, Kuei-Feng Chiang
  • Patent number: 9450192
    Abstract: The present invention provides a carbazole derivative of formula (I) for an organic electroluminescent device: wherein Y represents a heteroatom selected from N, O, P, S, or a bicyclic or tricyclic heterocyclic ring; and Ar1 and Ar2 each independently represent an alkyl or aryl substituted or unsubstituted aromatic hydrocarbon, or an alkyl or aryl substituted or unsubstituted heterocyclic aromatic hydrocarbon.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: September 20, 2016
    Assignee: E-RAY OPTOELECTRONICS TECHNOLOGY
    Inventors: Banumathy Balaganesan, Kun-Feng Chiang, Huang-Ming Guo, Po-Wei Hsu