Patents by Inventor Feng-Chien Hsieh
Feng-Chien Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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METHODS FOR FORMING OPTICAL BLOCKING STRUCTURES FOR BLACK LEVEL CORRECTION PIXELS IN AN IMAGE SENSOR
Publication number: 20250126911Abstract: An image sensor can be provided by: forming an array of image pixels on a semiconductor substrate; forming black level correction (BLC) pixels adjacent to the array of image pixels on the semiconductor substrate; forming a patterned layer stack over the array of image pixels and over the BLC pixels, wherein the patterned layer stack includes N repetitions of a unit layer stack in which N instances of the unit layer stack are repeated along a vertical direction; forming an optically transparent layer over an entirety of the patterned layer stack, wherein the optically transparent layer has a planar top surface; forming an infrared blocking material layer over the optically transparent layer; and patterning the infrared blocking material layer. A remaining portion of the infrared blocking material layer covers the BLC pixels, and does not cover the array of image pixels.Type: ApplicationFiled: December 23, 2024Publication date: April 17, 2025Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE, Hsin-Chi CHEN -
Patent number: 12277795Abstract: An image sensing apparatus is disclosed. The image sensing apparatus includes a pixel array and micro lenses disposed above the pixel array. The pixel array includes sensing pixels configured to capture minutia points of a fingerprint and positioning pixels configured to provide positioning codes.Type: GrantFiled: March 22, 2023Date of Patent: April 15, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTDInventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Cheng-Ming Wu, Wei-Li Hu
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Patent number: 12243894Abstract: Some implementations described herein provide pixel sensor configurations and methods of forming the same. In some implementations, one or more transistors of a pixel sensor are included on a circuitry die (e.g., an application specific integrated circuit (ASIC) die or another type of circuitry die) of an image sensor device. The one or more transistors may include a source follower transistor, a row select transistor, and/or another transistor that is used to control the operation of the pixel sensor. Including the one or more transistors of the pixel sensor (and other pixel sensors of the image sensor device) on the circuitry die reduces the area occupied by transistors in the pixel sensor on the sensor die. This enables the area for photon collection in the pixel sensor to be increased.Type: GrantFiled: May 11, 2022Date of Patent: March 4, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Wei-Li Hu, Kuo-Cheng Lee, Cheng-Ming Wu
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Patent number: 12243898Abstract: The present disclosure describes an image sensor device and a method for forming the same. The image sensor device can include a semiconductor layer. The semiconductor layer can include a first surface and a second surface. The image sensor device can further include an interconnect structure formed over the first surface of the semiconductor layer, first and second radiation sensing regions formed in the second surface of the semiconductor layer, a metal stack formed over the second radiation sensing region, and a passivation layer formed through the metal stack and over a top surface of the first radiation sensing region. The metal stack can be between the passivation layer and an other top surface of the second radiation sensing region.Type: GrantFiled: March 19, 2021Date of Patent: March 4, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Feng-Chien Hsieh, Hsin-Chi Chen, Kuo-Cheng Lee, Yun-Wei Cheng
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Publication number: 20250063837Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.Type: ApplicationFiled: October 31, 2024Publication date: February 20, 2025Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE, Cheng-Ming WU
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Patent number: 12211869Abstract: An image sensor includes an array of image pixels and black level correction (BLC) pixels. Each BLC pixel includes a BLC pixel photodetector, a BLC pixel sensing circuit, and a BLC pixel optics assembly configured to block light that impinges onto the BLC pixel photodetector. Each BLC pixel optics assembly may include a first portion of a layer stack including a vertically alternating sequence of first material layers having a first refractive index and second material layers having a second refractive index. Additionally or alternatively, each BLC pixel optics assembly may include a first portion of a layer stack including at least two metal layers, each having a respective wavelength sub-range having a greater reflectivity than another metal layer. Alternatively or additionally, each BLC pixel optics assembly may include an infrared blocking material layer that provides a higher absorption coefficient than color filter materials within image pixel optics assemblies.Type: GrantFiled: July 25, 2023Date of Patent: January 28, 2025Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Hsin-Chi Chen
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Publication number: 20240421174Abstract: An image sensor device and methods of forming the same are described. In some embodiments, the device includes a substrate, a contact pad structure extending from a contact pad region to a black level correction region, a dielectric layer disposed over the substrate in the black level correction region, and a light blocking structure disposed on and through the dielectric layer in the black level correction region. A first portion of the contact pad structure disposed in the black level correction region is in contact with the light blocking structure, and the light blocking structure is in contact with the substrate.Type: ApplicationFiled: June 19, 2023Publication date: December 19, 2024Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Wei-Li Hu, Kuo-Cheng Lee, Cheng-Ming Wu
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Patent number: 12164034Abstract: A pixel array may include a group of time-of-flight (ToF) sensors. The pixel array may include an image sensor comprising a group of pixel sensors. The image sensor may be arranged among the group of ToF sensors such that the image sensor is adjacent to each ToF sensor in the group of ToF sensors.Type: GrantFiled: March 19, 2021Date of Patent: December 10, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Cheng-Ming Wu
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Patent number: 12166048Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.Type: GrantFiled: April 27, 2023Date of Patent: December 10, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Cheng-Ming Wu
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Publication number: 20240406596Abstract: In-pixel separation structures may divide photodiodes of a pixel array into multiple regions. As a result, a lens of an image sensor device may be focused by using combining signals associated with different portions of the photodiodes. As a result, the lens may be focused faster and with fewer pixels of the pixel array, which conserves power, processing resources, and raw materials.Type: ApplicationFiled: May 30, 2023Publication date: December 5, 2024Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Wei-Li HU, Kuo-Cheng LEE, Cheng-Ming WU
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Publication number: 20240405047Abstract: An optical blocking region formed with patterned metal reduces light reflection toward pixel sensors in a pixel sensor array. The optical blocking region may be formed of a metal nanoscale grid in order to reflect more light away from the pixel sensors. The optical blocking region may include a dielectric layer, supporting the patterned metal, with high absorption structures or shallow deep trench isolation structures in order to increase absorption and thus reduce light reflection toward the pixel sensors.Type: ApplicationFiled: May 30, 2023Publication date: December 5, 2024Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Wei-Li HU, Kuo-Cheng LEE, Cheng-Ming WU
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Publication number: 20240395638Abstract: A semiconductor structure comprises: a semiconductor substrate; one or more first implant layers disposed in the semiconductor substrate and forming a circuit portion and a first test portion, the circuit portion forming an at least partially formed semiconductor circuit; and one or more second implant layers disposed in the semiconductor substrate and further forming the circuit portion and a second test portion, wherein the first and second test portions are spaced apart. A first implantation profile of the one or more first implant layers of the first test portion is obtained during a testing procedure, and the first implantation profile is a representation of a second implantation profile of the one or more first implant layers of the circuit portion.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Inventors: Feng-Chien Hsieh, Kuo-Cheng Lee, Yun-Wei Cheng, Chun-Hao Lin, Ting-Hao Chang
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Patent number: 12154933Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.Type: GrantFiled: July 29, 2022Date of Patent: November 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Chien Hsieh, Kuo-Cheng Lee, Ying-Hao Chen, Yun-Wei Cheng
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Publication number: 20240387596Abstract: An image sensor device may include a pixel sensor array that includes a plurality of pixel sensors. A plurality of transistors may be electrically connected with a back end of line (BEOL) region of the image sensor device. The image sensor device may further include a bonding pad region in which a bonding pad is included. A dielectric plug may surround a portion of the bonding pad and may fully extend through a semiconductor device region to provide electrical, thermal, and/or optical isolation for the pixel sensors of the pixel sensor array. Additionally and/or alternatively, one or more capacitors in the BEOL region of the image sensor device. The one or more capacitors may enable a photocurrent generated by one or more of the pixel sensors to be directly transferred from the one or more source follower transistors to the one or more capacitors for storage.Type: ApplicationFiled: May 18, 2023Publication date: November 21, 2024Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Wei-Li HU, Kuo-Cheng LEE, Cheng-Ming WU
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Publication number: 20240386743Abstract: A method of fingerprint verification includes capturing a fingerprint image by an image sensing device. The image sensing device including a pixel array of a combination of sensing pixels configured to capture minutia points in the fingerprint image and positioning pixels configured to provide positioning codes. The method further includes calculating vectors of the minutia points with reference to the positioning codes, comparing the vectors to reference vectors generated from a reference fingerprint image, and determining a match between the fingerprint image and the reference fingerprint image based on the comparing of the vectors.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Cheng-Ming Wu, Wei-Li Hu
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Publication number: 20240387595Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.Type: ApplicationFiled: July 31, 2024Publication date: November 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Chien HSIEH, Kuo-Cheng Lee, Ying-Hao Chen, Yun-Wei Cheng
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Publication number: 20240379705Abstract: A semiconductor arrangement is provided. The semiconductor arrangement includes a first photodiode in a substrate. The semiconductor arrangement includes a lens array over the substrate. A first plurality of lenses of the lens array overlies the first photodiode. Radiation incident upon the first plurality of lenses is directed by the first plurality of lenses to the first photodiode.Type: ApplicationFiled: July 24, 2024Publication date: November 14, 2024Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE
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Patent number: 12142630Abstract: A pixel sensor may include a vertically arranged (or vertically stacked) photodiode region and floating diffusion region. The vertical arrangement permits the photodiode region to occupy a larger area of a pixel sensor of a given size relative to a horizontal arrangement, which increases the area in which the photodiode region can collect photons. This increases performance of the pixel sensor and permits the overall size of the pixel sensor to be reduced. Moreover, the transfer gate may surround at least a portion of the floating diffusion region and the photodiode region, which provides a larger gate switching area relative to a horizontal arrangement. The increased gate switching area may provide greater control over the transfer of the photocurrent and/or may reduce switching delay for the pixel sensor.Type: GrantFiled: March 3, 2021Date of Patent: November 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Cheng-Ming Wu
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Publication number: 20240332325Abstract: In some implementations, a pixel array may include a near infrared (NIR) cut filter layer for visible light pixel sensors of the pixel array. The NIR cut filter layer is included in the pixel array to absorb or reflect NIR light for the visible light pixel sensors to reduce the amount of NIR light absorbed by the visible light pixel sensors. This increases the accuracy of the color information provided by the visible light pixel sensors, which can be used to produce more accurate images. In some implementations, the visible light pixel sensors and/or NIR pixel sensors may include high absorption regions to adjust the orientation of the angle of refraction for the visible light pixel sensors and/or the NIR pixel sensors, which may increase the quantum efficiency of the visible light pixel sensors and/or the NIR pixel sensors.Type: ApplicationFiled: June 13, 2024Publication date: October 3, 2024Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE, Cheng-Ming WU
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Patent number: 12051704Abstract: In some implementations, a pixel array may include a near infrared (NIR) cut filter layer for visible light pixel sensors of the pixel array. The NIR cut filter layer is included in the pixel array to absorb or reflect NIR light for the visible light pixel sensors to reduce the amount of MR light absorbed by the visible light pixel sensors. This increases the accuracy of the color information provided by the visible light pixel sensors, which can be used to produce more accurate images. In some implementations, the visible light pixel sensors and/or MR pixel sensors may include high absorption regions to adjust the orientation of the angle of refraction for the visible light pixel sensors and/or the MR pixel sensors, which may increase the quantum efficiency of the visible light pixel sensors and/or the MR pixel sensors.Type: GrantFiled: August 30, 2021Date of Patent: July 30, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Kuo-Cheng Lee, Cheng-Ming Wu