Abstract: A pixel sensor may include a vertically arranged (or vertically stacked) photodiode region and floating diffusion region. The vertical arrangement permits the photodiode region to occupy a larger area of a pixel sensor of a given size relative to a horizontal arrangement, which increases the area in which the photodiode region can collect photons. This increases performance of the pixel sensor and permits the overall size of the pixel sensor to be reduced. Moreover, the transfer gate may surround at least a portion of the floating diffusion region and the photodiode region, which provides a larger gate switching area relative to a horizontal arrangement. The increased gate switching area may provide greater control over the transfer of the photocurrent and/or may reduce switching delay for the pixel sensor.

Abstract: An image sensor device is disclosed which includes a semiconductor layer having a first surface and a second surface, where the second surface is opposite to the first surface. The device includes a conductive structure disposed over the first surface, with a dielectric layer disposed between the conductive structure and the first surface. The device includes a first dielectric layer disposed over the second surface of the semiconductor substrate. The device includes a second dielectric layer disposed over the first dielectric layer. The device includes a color filter layer disposed over the second dielectric layer. In some embodiments, the thickness, refractive index, or both of the first dielectric layer and the thickness, refractive index, or both of the second dielectric layer may be collectively determined to cause incident radiation passing through the first dielectric layer and the second dielectric layer and to the plurality of pixels to have destructive interference.

Abstract: An image sensor includes an array of image pixels and black level correction (BLC) pixels. Each BLC pixel includes a BLC pixel photodetector, a BLC pixel sensing circuit, and a BLC pixel optics assembly configured to block light that impinges onto the BLC pixel photodetector. Each BLC pixel optics assembly may include a first portion of a layer stack including a vertically alternating sequence of first material layers having a first refractive index and second material layers having a second refractive index. Additionally or alternatively, each BLC pixel optics assembly may include a first portion of a layer stack including at least two metal layers, each having a respective wavelength sub-range having a greater reflectivity than another metal layer. Alternatively or additionally, each BLC pixel optics assembly may include an infrared blocking material layer that provides a higher absorption coefficient than color filter materials within image pixel optics assemblies.

Abstract: A semiconductor arrangement is provided. The semiconductor arrangement includes a first photodiode in a substrate. The semiconductor arrangement includes a lens array over the substrate. A first plurality of lenses of the lens array overlies the first photodiode. Radiation incident upon the first plurality of lenses is directed by the first plurality of lenses to the first photodiode.

Abstract: A subpixel including at least one second-conductivity-type pinned photodiode layer that forms a p-n junction with a substrate semiconductor layer, at least one floating diffusion region, and at least one transfer gate stack structure. The at least one transfer gate stack structure may at least partially laterally surround the at least one second-conductivity-type pinned photodiode layer with a total azimuthal extension angle in a range from 240 degrees to 360 degrees around a geometrical center of the second-conductivity-type pinned photodiode layer. The at least one transfer gate stack structure may include multiple edges that overlie different segments of a periphery of the at least one second-conductivity-type pinned photodiode layer, and the floating diffusion region includes a portion located between the first edge and the second edge. In addition, multiple transfer gate stack structures and multiple floating diffusion regions may be present in the subpixel.

Abstract: A pixel array includes octagon-shaped pixel sensors and square-shaped pixel sensors. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. Moreover, the pixel array may include a combination of red, green, and blue pixel sensors to obtain color information from incident light; yellow pixel sensors for blue and green color enhancement and correction for the pixel array; near infrared (NIR) pixel sensors to increase contour sharpness and low light performance for the pixel array; and/or white pixel sensors to increase light sensitivity and brightness for the pixel array. The capability to configure different sizes and types of pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.

Abstract: A pixel array may include air gap reflection structures under a photodiode of a pixel sensor to reflect photons that would otherwise partially refract or scatter through a bottom surface of a photodiode. The air gap reflection structures may reflect photons upward toward the photodiode so that the photons may be absorbed by the photodiode. This may increase the quantity of photons absorbed by the photodiode, which may increase the quantum efficiency of the pixel sensor and the pixel array.

Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.

Abstract: A photodetector circuit includes a photodetector and a sensing circuit located over a substrate semiconductor layer having a doping of a first conductivity type. The photodetector includes a second-conductivity-type pinned photodiode layer that forms a p-n junction with the substrate semiconductor layer, at least one floating diffusion region that is laterally spaced from a periphery of the second-conductivity-type pinned photodiode layer, and at least one transfer gate electrode. At least two different operations may be performed by applying at least two different pulse patterns to the at least one transfer gate electrode. The at least two different pulse patterns differ from one another or from each other by at least one of pulse duration, pulse magnitude, and delay time between a control signal applied to the sensing circuit and pulse initiation at a respective one of the at least one transfer gate electrode.

Abstract: A photodetector circuit includes a photodetector and a sensing circuit located over a substrate semiconductor layer having a doping of a first conductivity type. The photodetector includes a second-conductivity-type pinned photodiode layer that forms a p-n junction with the substrate semiconductor layer, at least one floating diffusion region that is laterally spaced from a periphery of the second-conductivity-type pinned photodiode layer, and at least one transfer gate electrode. At least two different operations may be performed by applying at least two different pulse patterns to the at least one transfer gate electrode. The at least two different pulse patterns differ from one another or from each other by at least one of pulse duration, pulse magnitude, and delay time between a control signal applied to the sensing circuit and pulse initiation at a respective one of the at least one transfer gate electrode.

Abstract: A semiconductor structure includes a photodetector, which includes a substrate semiconductor layer having a doping of a first conductivity type, a second-conductivity-type photodiode layer that forms a p-n junction with the substrate semiconductor layer, a floating diffusion region that is laterally spaced from the second-conductivity-type photodiode layer, and a transfer gate electrode including a lower transfer gate electrode portion that is formed within the substrate semiconductor layer and located between the second-conductivity-type photodiode layer and the floating diffusion region. The transfer gate electrode may laterally surround the p-n junction, and may provide enhanced electron transmission efficiency from the p-n junction to the floating diffusion region. An array of photodetectors may be used to provide an image sensor.

Abstract: A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips.

Abstract: An image sensor with stress adjusting layers and a method of fabrication the image sensor are disclosed. The image sensor includes a substrate with a front side surface and a back side surface opposite to the front side surface, an anti-reflective coating (ARC) layer disposed on the back side surface of the substrate, a dielectric layer disposed on the ARC layer, a metal layer disposed on the dielectric layer, and a stress adjusting layer disposed on the metal layer. The stress adjusting layer includes a silicon-rich oxide layer. The concentration profiles of silicon and oxygen atoms in the stress adjusting layer are non-overlapping and different from each other. The image sensor further includes oxide grid structure disposed on the stress adjusting layer.

Abstract: A method for fabricating an image sensor device is provided. The method includes forming a plurality of photosensitive pixels in a substrate; depositing a dielectric layer over the substrate; etching the dielectric layer, resulting in a first trench in the dielectric layer and laterally surrounding the photosensitive pixels; and forming a light blocking structure in the first trench, such that the light blocking structure laterally surrounds the photosensitive pixels.

Abstract: Among other things, one or more image sensors and techniques for forming such image sensors are provided. An image sensor comprises a photodiode array configured to detect light. A filler grid is formed over the photodiode array, such as over a dielectric grid. The filler grid comprises one or more filler structures, such as a first filler structure that provides a light propagation path to a first photodiode that is primarily through the first filler structure. In this way, signal strength decay of light along the light propagation path before detection by the first photodiode is mitigated. The image sensor comprises a reflective layer that channels light towards corresponding photodiodes. For example, a first reflective layer portion guides light towards the first photodiode and away from a second photodiode. In this way, crosstalk, otherwise resulting from detection of light by incorrect photodiodes, is mitigated.

Abstract: Among other things, one or more image sensors and techniques for forming such image sensors are provided. An image sensor comprises a photodiode array configured to detect light. A filler grid is formed over the photodiode array, such as over a dielectric grid. The filler grid comprises one or more filler structures, such as a first filler structure that provides a light propagation path to a first photodiode that is primarily through the first filler structure. In this way, signal strength decay of light along the light propagation path before detection by the first photodiode is mitigated. The image sensor comprises a reflective layer that channels light towards corresponding photodiodes. For example, a first reflective layer portion guides light towards the first photodiode and away from a second photodiode. In this way, crosstalk, otherwise resulting from detection of light by incorrect photodiodes, is mitigated.

Abstract: Among other things, one or more image sensors and techniques for forming such image sensors are provided. An image sensor comprises a photodiode array configured to detect light. A filler grid is formed over the photodiode array, such as over a dielectric grid. The filler grid comprises one or more filler structures, such as a first filler structure that provides a light propagation path to a first photodiode that is primarily through the first filler structure. In this way, signal strength decay of light along the light propagation path before detection by the first photodiode is mitigated. The image sensor comprises a reflective layer that channels light towards corresponding photodiodes. For example, a first reflective layer portion guides light towards the first photodiode and away from a second photodiode. In this way, crosstalk, otherwise resulting from detection of light by incorrect photodiodes, is mitigated.

Abstract: Among other things, one or more image sensors and techniques for forming such image sensors are provided. An image sensor comprises a photodiode array configured to detect light. A filler grid is formed over the photodiode array, such as over a dielectric grid. The filler grid comprises one or more filler structures, such as a first filler structure that provides a light propagation path to a first photodiode that is primarily through the first filler structure. In this way, signal strength decay of light along the light propagation path before detection by the first photodiode is mitigated. The image sensor comprises a reflective layer that channels light towards corresponding photodiodes. For example, a first reflective layer portion guides light towards the first photodiode and away from a second photodiode. In this way, crosstalk, otherwise resulting from detection of light by incorrect photodiodes, is mitigated.

Abstract: A method of manufacturing a stacked-layered thin film solar cell with a light-absorbing layer having a band gradient is provided. The stacked-layered thin film solar cell includes a substrate, a back electrode layer, a light-absorbing layer, a buffer layer, a window layer, and a top electrode layer stacked up sequentially. The light-absorbing layer has a band gradient structure and is essentially a group I-III-VI compound, wherein the group III elements at least include indium (In) and aluminum (Al). Moreover, the Al/In ratio in the upper half portion of the light-absorbing layer is greater than that in the lower half portion of the light-absorbing layer, wherein the upper half portion is proximate to a light incident surface.

Abstract: A stacked-layered thin film solar cell and a manufacturing method thereof are provided. The stacked-layered thin film solar cell includes a front electrode layer, a stacked-layered light-absorbing structure, and a back electrode layer. The stacked-layered light-absorbing structure has a p-i-n-type layered structure and consists essentially of I-III-VI compounds, wherein the group III elements at least include indium (In) and aluminum (Al). The p-type layer of the stacked-layered light-absorbing structure is near the front electrode layer while the n-type layer is near the back electrode layer. The Al/In concentration ratio in the p-type layer is higher than that in the n-type layer.