Patents by Inventor Feng Su

Feng Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180269160
    Abstract: A semiconductor device package has a die, a pattern of dielectric material formed on an active surface of the die, a plurality of metal contacts electrically connected to the die and surrounded by the pattern, a mold compound formed around the pattern, the die and the metal contacts, and a redistribution layer formed on a grinded surface of the mold compound and electrically connected to the metal contacts. The dielectric material has a young's modulus lower than a young's modulus of the mold compound, and the dielectric material has a coefficient of thermal expansion lower than a coefficient of thermal expansion of the mold compound.
    Type: Application
    Filed: March 16, 2017
    Publication date: September 20, 2018
    Inventors: Ting-Feng Su, Chia-Jen Chou
  • Publication number: 20180224684
    Abstract: Provided is a touch display device that includes a first substrate, an active component, a first insulating layer, a touch trace, a second insulating layer, a common electrode, a third insulating layer, a pixel electrode, a second substrate, and a display medium. The second insulating layer covers the first insulating layer and has a first opening that exposes the touch trace. The common electrode is disposed on the second insulating layer and fills in the first opening so as to be electrically connected to the touch trace. The pixel electrode has a plurality of slits. The second substrate has a spacer that extends towards the first substrate. The spacer is disposed above the first opening, and an orthographic projection of the spacer on the first substrate is within an orthographic projection of the first opening on the first substrate.
    Type: Application
    Filed: March 27, 2017
    Publication date: August 9, 2018
    Applicant: Chunghwa Picture Tubes, LTD.
    Inventor: Cheng-Feng Su
  • Patent number: 10007825
    Abstract: A positioning system for positioning a to-be-positioned device includes three or more reference objects each providing individual unique feature information associated with a two-dimensional coordinate. A positioning device includes an image capturing unit obtaining image data of three of the reference objects, and a processing unit obtaining, based on the image data, three pixel positions corresponding respectively to the three reference objects in the image data, obtaining the two-dimensional coordinate of the location of the three reference objects, and estimating a positioning coordinate of the to-be-positioned device using a triangulation positioning method based on the three pixel positions, a focal length used for obtaining the image data and the two-dimensional coordinates.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: June 26, 2018
    Assignee: AUTOMOTIVE RESEARCH & TESTING CENTER
    Inventors: Tian-Li Wang, Rong-Terng Juang, Chu-Yuan Hsu, Yi-Feng Su
  • Patent number: 9899287
    Abstract: A fan-out wafer level package structure includes a chip, a molding compound, at least one circuit layer, and at least one dielectric layer. The molding compound encapsulates the chip. The at least one circuit layer is disposed on a surface of the chip and a surface of the molding compound coplanar to the surface of the chip. The at least one circuit layer includes a plurality of traces. Each of the traces includes a first portion and a second portion. The first portion is located at an edge region of a projection of the chip onto the dielectric layer. A width of the first portion is larger than a width of the second portion. The at least one dielectric layer is disposed at a side of the at least one circuit layer.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: February 20, 2018
    Assignee: Powertech Technology Inc.
    Inventors: Ting-Feng Su, Chia-Jen Chou
  • Patent number: 9860754
    Abstract: The present invention provides a coexistence operation method for a wireless system, wherein the wireless system is capable of establishing a first wireless link and a plurality of second wireless link. The coexistence operation method comprises applying different time slots to the first wireless link and a first link of the second wireless links; and applying a different frequency band to a second link of the second wireless links when is the different time slots are applied to the first wireless link and the first link of the second wireless links.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: January 2, 2018
    Assignee: MEDIATEK INC.
    Inventors: I-Feng Su, Yu-Ju Lee
  • Publication number: 20170372981
    Abstract: A fan-out wafer level package structure includes a chip, a molding compound, at least one circuit layer, and at least one dielectric layer. The molding compound encapsulates the chip. The at least one circuit layer is disposed on a surface of the chip and a surface of the molding compound coplanar to the surface of the chip. The at least one circuit layer includes a plurality of traces. Each of the traces includes a first portion and a second portion. The first portion is located at an edge region of a projection of the chip onto the dielectric layer. A width of the first portion is larger than a width of the second portion. The at least one dielectric layer is disposed at a side of the at least one circuit layer.
    Type: Application
    Filed: March 27, 2017
    Publication date: December 28, 2017
    Applicant: Powertech Technology Inc.
    Inventors: Ting-Feng Su, Chia-Jen Chou
  • Patent number: 9817629
    Abstract: An audio synchronization method for Bluetooth speakers is disclosed. The Bluetooth speakers comprise a first Bluetooth speaker and a second Bluetooth speaker transmitting digital audio packets by Bluetooth communication. The method comprises steps of: fetching the sample counts of the first Bluetooth speaker and the second Bluetooth speaker at the first timing; and adjusting the sample rate of the second Bluetooth speaker according to the sample counts of the first Bluetooth speaker and the second Bluetooth speaker. By using the method of the present invention, the sample counts are checked periodically to keep the Bluetooth speakers audio synchronized.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: November 14, 2017
    Assignee: Airoha Technology Corp.
    Inventors: Kuen-Rong Hsieh, I-Feng Su, Jhang-Liang Lin, Sheng-Yo Chiu
  • Patent number: 9733947
    Abstract: A method of proactively event triggering in a computer system is disclosed. The computer system includes an application unit and an interface. The method includes the application unit sending a setting signal to change a voltage level of a pin of a control chip module; the pin generating a triggering event to the interface unit when the voltage level of the pin changes; and the interface accessing a controller according to the triggering event to allow the application unit to communicate with the controller proactively.
    Type: Grant
    Filed: May 27, 2013
    Date of Patent: August 15, 2017
    Assignee: Wistron Corporation
    Inventor: Chien-Feng Su
  • Patent number: 9711358
    Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: July 18, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Te Chen, En-Chiuan Liou, Chia-Hsun Tseng, Shin-Feng Su, Yu-Ting Hung, Meng-Lin Tsai
  • Patent number: 9653345
    Abstract: A method of fabricating a semiconductor structure for improving critical dimension control is provided in the present invention. The method includes the following steps. An inter metal dielectric (IMD) layer is formed on a semiconductor substrate, a patterned hard mask layer is formed on the IMD layer, and a first aperture is formed in the IMD layer. A first barrier layer is formed on the patterned hard mask layer and a surface of the first aperture, a first patterned resist is formed on the first barrier layer, and an etching process is performed to form a second aperture in the IMD layer by using the first patterned resist as a mask. The first patterned resist is kept from being poisoned because of the first barrier layer, and the critical dimension control of the semiconductor structure may be improved accordingly.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: May 16, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shang-Nan Chou, Che-Yi Lin, En-Chiuan Liou, Yu-Ting Hung, Shin-Feng Su, Chia-Hsun Tseng
  • Publication number: 20170117149
    Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.
    Type: Application
    Filed: January 5, 2017
    Publication date: April 27, 2017
    Inventors: Yu-Te Chen, En-Chiuan Liou, Chia-Hsun Tseng, Shin-Feng Su, Yu-Ting Hung, Meng-Lin Tsai
  • Patent number: 9583343
    Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: February 28, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Te Chen, En-Chiuan Liou, Chia-Hsun Tseng, Shin-Feng Su, Yu-Ting Hung, Meng-Lin Tsai
  • Patent number: 9568553
    Abstract: A method for deciding a scan clock domain allocation of an integrated circuit includes: utilizing a circuit netlist file and a timing constraints file of the integrated circuit to find out the amount of crossing paths between any two function clock domains of a plurality of function clock domains, and generate a clock domain report file; and grouping the plurality of function clock domains and allocating the plurality of function clock domains after being grouped into a plurality of scan clock domains according to the clock domain report file.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: February 14, 2017
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ming-Chung Wu, Shuo-Fen Kuo, Ying-Yen Chen, Jih-Nung Lee, Ching-Feng Su
  • Publication number: 20170025286
    Abstract: A method of adjusting channel widths of semiconductive devices includes providing a substrate divided into a first region and a second region, wherein the substrate comprises numerous fins. A first implantation process is performed on the fins within the first region. Then, a second implantation process is performed on the fins within the second region, wherein the first implantation process and the second implantation process are different from each other in at least one of the conditions comprising dopant species, dopant dosage or implantation energy. After that, part of the fins within the first region and the second region are removed simultaneously to form a plurality of first recesses within the first region and a plurality of second recesses within the second region. Finally, a first epitaxial layer and a second epitaxial layer are formed to fill up each first recess and each second recess, respectively.
    Type: Application
    Filed: July 26, 2015
    Publication date: January 26, 2017
    Inventors: Yu-Te Chen, Chia-Hsun Tseng, En-Chiuan Liou, Chiung-Lin Hsu, Meng-Lin Tsai, Jan-Fu Yang, Yu-Ting Hung, Shin-Feng Su
  • Patent number: 9548216
    Abstract: A method of adjusting channel widths of semiconductive devices includes providing a substrate divided into a first region and a second region, wherein the substrate comprises numerous fins. A first implantation process is performed on the fins within the first region. Then, a second implantation process is performed on the fins within the second region, wherein the first implantation process and the second implantation process are different from each other in at least one of the conditions comprising dopant species, dopant dosage or implantation energy. After that, part of the fins within the first region and the second region are removed simultaneously to form a plurality of first recesses within the first region and a plurality of second recesses within the second region. Finally, a first epitaxial layer and a second epitaxial layer are formed to fill up each first recess and each second recess, respectively.
    Type: Grant
    Filed: July 26, 2015
    Date of Patent: January 17, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Te Chen, Chia-Hsun Tseng, En-Chiuan Liou, Chiung-Lin Hsu, Meng-Lin Tsai, Jan-Fu Yang, Yu-Ting Hung, Shin-Feng Su
  • Publication number: 20160343567
    Abstract: A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.
    Type: Application
    Filed: June 29, 2015
    Publication date: November 24, 2016
    Inventors: Yu-Te Chen, En-Chiuan Liou, Chia-Hsun Tseng, Shin-Feng Su, Yu-Ting Hung, Meng-Lin Tsai
  • Patent number: 9482391
    Abstract: An omnidirectional LED bulb has a base, a light-transmitting shell, a heat-dissipating pillar and an LED module. The light-transmitting shell is mounted on the base and has a lateral surface and a top surface. The heat-dissipating pillar is mounted on the base and has multiple mounting surfaces facing toward the lateral surface and the top surface of the light-transmitting shell. The LED module is mounted on the mounting surfaces of the heat-dissipating pillar. The LED module emits light through the lateral surface and the top surface of the light-transmitting shell to form an omnidirectional illumination.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: November 1, 2016
    Inventor: Chin-Feng Su
  • Patent number: 9408149
    Abstract: A method and a communication device for managing communication traffic for multiple communication technologies are provide. The method, performed by a communication device to manage communications with a first and a second network having a first and a second communication technology, respectively, includes: determining, by a second communication module, whether a first transmission of the first communication technology is in progress before proceeding with a second transmission having the second communication technology; when the first transmission is in progress, initiating, by a second communication module, an unavailable period of the first communication technology; initiating, by a second communication module, notification of the unavailability of the first communication technology to the first network; and proceeding, by the second communication module, with the second transmission.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: August 2, 2016
    Assignee: MEDIATEK INC.
    Inventors: Yu-Ju Lee, I-Feng Su, Hao-Sheng Hsu, Pao-Chen Wu
  • Publication number: 20160189383
    Abstract: A positioning system for positioning a to-be-positioned device includes three or more reference objects each providing individual unique feature information associated with a two-dimensional coordinate. A positioning device includes an image capturing unit obtaining image data of three of the reference objects, and a processing unit obtaining, based on the image data, three pixel positions corresponding respectively to the three reference objects in the image data, obtaining the two-dimensional coordinate of the location of the three reference objects, and estimating a positioning coordinate of the to-be-positioned device using a triangulation positioning method based on the three pixel positions, a focal length used for obtaining the image data and the two-dimensional coordinates.
    Type: Application
    Filed: December 29, 2014
    Publication date: June 30, 2016
    Inventors: Tian-Li Wang, Rong-Terng Juang, Chu-Yuan Hsu, Yi-Feng Su
  • Patent number: 9317106
    Abstract: An automatic correction device of a vehicle display system and method thereof, comprising following steps: firstly, transform an image of road in front into projection information, to calculate a coordinate model, then detect facial features of a driver, to calculate a face rotation angle and a facial features 3-D position of said driver, to estimate a position field of view for said driver looking to front. Then, said position field of view is substituted into an image overlap projection transformation formula, to generate an overlap error correction parameter. Subsequently, utilize said overlap error correction parameter to correct and update said coordinate model. Finally, utilize a display unit to project said corrected coordinate model to front of said driver, so that projection position of said coordinate model overlaps said position field of view of said driver.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: April 19, 2016
    Assignee: AUTOMOTIVE RESEARCH & TEST CENTER
    Inventors: Yi-Feng Su, Jia-Xiu Liu, Yu-Sung Chen