Patents by Inventor Feng Yi

Feng Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230022898
    Abstract: In some implementations, a server device can generate configuration data for an application based on user engagement segments associated with a user of the application. For example, a server device can receive information identifying user engagement segments associated with a particular user. When the server device receives a request for configuration data for the application that identifies the particular user, the server device can obtain the engagement segment identifiers associated with the particular user. The server device can use the engagement segment identifiers to obtain segment configuration data for each engagement segment identifier, combine the segment configuration data into a combined configuration, and send the combined configuration to the application on the user device. The application can then determine what content to present and how to present the content on the user device based on the combined configuration data.
    Type: Application
    Filed: September 29, 2022
    Publication date: January 26, 2023
    Applicant: Apple Inc.
    Inventors: Balaji Ramachandran, Jean S. Metz, Collin D. Ruffenach, Christopher S. Schepman, Guillermo Ortiz, Feng Yi, Casey M. Dougherty, Martin J. Murret
  • Patent number: 11545547
    Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure, a first dielectric layer, a second dielectric layer, a first plug and two metal lines. The substrate has a shallow trench isolation and an active area, and the gate structure is disposed on the substrate to cover a boundary between the active area and the shallow trench isolation. The first dielectric layer is disposed on the substrate, to cover the gate structure, and the first plug is disposed in the first dielectric layer to directly in contact with a conductive layer of the gate structure and the active area. The second dielectric layer is disposed on the first dielectric layer, with the first plug and the gate being entirely covered by the first dielectric layer and the second dielectric layer. The two metal lines are disposed in the second dielectric layer.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: January 3, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Fu-Che Lee, Yi-Ching Chang, Kai-Lou Huang, Ying-Chih Lin, Gang-Yi Lin
  • Patent number: 11496592
    Abstract: In some implementations, a server device can generate configuration data for an application based on user engagement segments associated with a user of the application. For example, a server device can receive information identifying user engagement segments associated with a particular user. When the server device receives a request for configuration data for the application that identifies the particular user, the server device can obtain the engagement segment identifiers associated with the particular user. The server device can use the engagement segment identifiers to obtain segment configuration data for each engagement segment identifier, combine the segment configuration data into a combined configuration, and send the combined configuration to the application on the user device. The application can then determine what content to present and how to present the content on the user device based on the combined configuration data.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: November 8, 2022
    Assignee: Apple Inc.
    Inventors: Balaji Ramachandran, Jean S. Metz, Collin D. Ruffenach, Christopher S. Schepman, Guillermo Ortiz, Feng Yi, Casey M. Dougherty, Martin J. Murret
  • Patent number: 11440694
    Abstract: A test tube preparation device uses a labeling device to include a linking module to link a positioning unit, and the positioning unit can be used to place a tube body and finely adjust a position of the tube body relative to the label generating module of the surface treating device to complete the label generation, label conveyance, tube labeling and tube delivery, and provide a preparation device for effectively integrating the label and applying to the tube body before and after the labeling of the tube body, so as to improve the quality of the generation of the tube body and the label. Further, the present invention further provides a test tube preparation method.
    Type: Grant
    Filed: December 8, 2019
    Date of Patent: September 13, 2022
    Inventors: Chien-Hua Chen, Feng-Yi Tai
  • Patent number: 11367725
    Abstract: A method for fabricating a buried word line (BWL) of a dynamic random access memory (DRAM) includes the steps of: forming a first doped region in a substrate; removing part of the first doped region to form a trench in the substrate; forming a gate structure in the trench; and forming a barrier structure between the gate structure and the first doped region.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: June 21, 2022
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Chun-Hsien Lin, Fu-Che Lee
  • Publication number: 20220128150
    Abstract: A sealing device for a gas-liquid two-phase fluid medium under variable working conditions includes a rotating shaft and a housing, and a chamber formed by the housing is configured to accommodate the gas-liquid two-phase fluid medium. The sealing device further includes a labyrinth sealing mechanism and a fluid dynamic-pressure mechanical sealing mechanism with double end faces, where the labyrinth sealing mechanism and the fluid dynamic-pressure mechanical sealing mechanism with double end faces conduct mutual synergetic effect. Sealing buffer chambers are arranged between the labyrinth sealing mechanism and the fluid dynamic-pressure mechanical sealing mechanism; the fluid dynamic-pressure mechanical sealing mechanism is provided with stationary rings and movable rings, where the stationary rings and the movable rings oppositely abut against with each other.
    Type: Application
    Filed: September 28, 2021
    Publication date: April 28, 2022
    Applicant: CHANGSHU INSTITUTE OF TECHNOLOGY
    Inventors: Changping LIANG, Qiaoping YUE, Junjun LIU, Feng YI, Lin WANG
  • Publication number: 20220122845
    Abstract: A semiconductor device includes a substrate and a material disposed on the substrate. The material layer includes plural first patterns arranged parallel and separately in an array within a first region of the substrate, and plural second patterns parallel and separately disposed at two opposite sides of the first patterns, and plural third patterns parallel and separately disposed at another two opposite sides of the first patterns, wherein each of the third patterns has a relative greater dimension than that of each of the first patterns.
    Type: Application
    Filed: December 26, 2021
    Publication date: April 21, 2022
    Applicants: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Yu-Cheng Tung, Fu-Che Lee
  • Patent number: 11289489
    Abstract: A capacitor structure including a semiconductor substrate; a dielectric layer on the semiconductor substrate; a storage node pad in the dielectric layer; a lower electrode including a bottle-shaped bottom portion recessed into the dielectric layer and being in direct contact with the storage node pad; and a lattice layer supporting a topmost part of the lower electrode, wherein the lattice layer is not directly contacting the dielectric layer, but is directly contacting the topmost part of the lower electrode. The bottle-shaped bottom portion extends to a sidewall of the storage node pad. The bottle-shaped bottom portion has a width that is wider than other portion of the lower electrode.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: March 29, 2022
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Fu-Che Lee, Yi-Wang Zhan, Chieh-Te Chen
  • Publication number: 20220040671
    Abstract: The present invention relates to a superabsorbent polymer and a method for producing the same. The superabsorbent polymer includes a core layer polymerized with monomers having carboxylic group, a first shell layer formed from a surface crosslinking agent, and a second shell layer formed from zingiberaceae extracts. By a surface modification on the first shell layer performed from a specific amount of the zingiberaceae extracts, the superabsorbent polymer produced according to the method for producing the same has a good antimicrobial property and deodorizing effects, and retains an original absorbent property.
    Type: Application
    Filed: August 10, 2021
    Publication date: February 10, 2022
    Inventors: Zhong-Yi CHEN, Cheng-Lin LEE, Feng-Yi CHEN, Yu-Yen CHUANG
  • Patent number: 11244948
    Abstract: A semiconductor device and method of forming the same, the semiconductor device includes a substrate, a first plug, a conductive pad and a capacitor structure. The first plug is disposed on the substrate, and the conductive pad is disposed on the first plug, with the conductive pad including a recessed shoulder portion at a top corner thereof. The capacitor structure is disposed on the conductive pad, to directly in connection with thereto.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: February 8, 2022
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Fu-Che Lee, Yi-Ching Chang, Kai-Lou Huang
  • Patent number: 11244829
    Abstract: A semiconductor device and a method of forming the same, the semiconductor includes a substrate and a material disposed on the substrate. The material layer includes plural first patterns arranged parallel and separately in an array within a first region of the substrate, and plural second patterns parallel and separately disposed at two opposite sides of the first patterns, and plural third patterns parallel and separately disposed at another two opposite sides of the first patterns, wherein each of the third patterns has a relative greater dimension than that of each of the first patterns.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: February 8, 2022
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Yu-Cheng Tung, Fu-Che Lee
  • Patent number: 11232171
    Abstract: In some implementations, a user device can generate configuration data for an application on the user device using multilevel configuration data. For example, an application on the user device can obtain application level configuration data from a server device. The application level configuration data can be generated based on user engagement segments associated with the user of the user device, for example. The application can obtain publisher level configuration data generated by a content publisher. In response to requesting a content item, the application can receive content level configuration data. The application can combine the application level configuration data, the publisher level configuration data, and/or the content level configuration data to generate dynamic configuration data. The dynamic configuration data can be used by the application to determine, among other things, what content to present to the user of the application on the user device.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: January 25, 2022
    Assignee: Apple Inc.
    Inventors: Collin D. Ruffenach, Casey M. Dougherty, Balaji Ramachandran, Christopher S. Schepman, Feng Yi, Guillermo Ortiz, Jean S. Metz, Martin J. Murrett
  • Publication number: 20210398902
    Abstract: A semiconductor memory device and a manufacturing method thereof are provided in the present invention. An under-cut structure is formed at an edge of a bit line contact opening in the process of forming the bit line contact opening for avoiding short problems caused by alignment shifting, and the process window of the process of forming the bit line contact opening may be improved accordingly.
    Type: Application
    Filed: September 6, 2021
    Publication date: December 23, 2021
    Applicants: United Microelectronics Corp., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Shih-Fang Tzou, Fu-Che Lee, Chien-Cheng Tsai, Feng-Ming Huang
  • Patent number: 11191789
    Abstract: Cells derived from postpartum tissue and methods for their isolation and induction to differentiate to cells of a chondrogenic or osteogenic phenotype are provided by the invention. The invention further provides cultures and compositions of the postpartum-derived cells and products related thereto. The postpartum-derived cells of the invention and products related thereto have a plethora of uses, including but not limited to research, diagnostic, and therapeutic applications, for example, in the treatment of bone and cartilage conditions.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: December 7, 2021
    Assignee: Depuy Synthes Products, Inc.
    Inventors: Anthony J. Kihm, Agnieszka Seyda, Sridevi Dhanaraj, Ziwei Wang, Alexander M. Harmon, Ian Ross Harris, Darin J. Messina, Sanjay Mistry, Anna Gosiewska, Chin-Feng Yi
  • Publication number: 20210327706
    Abstract: A method of manufacturing a semiconductor device includes the following steps. A first patterned photoresist layer is formed on a substrate. A second patterned photoresist layer is formed on the substrate after the first patterned photoresist layer is formed, wherein the first patterned photoresist layer and the second patterned photoresist layer are arranged alternatively. A liner is formed to cover sidewalls of the first patterned photoresist layer and the second patterned photoresist layer. The present invention also provides a semiconductor device, including a plurality of pillars being disposed on a layer, wherein the layer includes first recesses and second recesses, wherein the depths of the first recesses are less than the depths of the second recesses.
    Type: Application
    Filed: June 27, 2021
    Publication date: October 21, 2021
    Applicants: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Fu-Che Lee, Yu-Cheng Tung
  • Patent number: 11139243
    Abstract: A semiconductor memory device and a manufacturing method thereof are provided in the present invention. An under-cut structure is formed at an edge of a bit line contact opening in the process of forming the bit line contact opening for avoiding short problems caused by alignment shifting, and the process window of the process of forming the bit line contact opening may be improved accordingly.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: October 5, 2021
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Shih-Fang Tzou, Fu-Che Lee, Chien-Cheng Tsai, Feng-Ming Huang
  • Patent number: 11107879
    Abstract: A capacitor structure includes a substrate having thereon a storage node contact, a cylinder-shaped bottom electrode disposed on the storage node contact, a supporting structure horizontally supporting a sidewall of the cylinder-shaped bottom electrode, a capacitor dielectric layer conformally covering the cylinder-shaped bottom electrode and the supporting structure, and a top electrode covering the capacitor dielectric layer. The supporting structure has a top surface that is higher than that of the cylinder-shaped bottom electrode. The top surface of the supporting structure has a V-shaped sectional profile.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: August 31, 2021
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Kai-Lou Huang, Fu-Che Lee, Feng-Yi Chang, Chieh-Te Chen, Meng-Chia Tsai
  • Publication number: 20210265095
    Abstract: The present invention provides an electromagnetic apparatus with heat sink structure, comprising: metal housing, the metal housing further comprises the upper housing and the lower housing to fix the components of the electromagnetic apparatus and store the energy of the electromagnetic apparatus during operation; the electrical coil is mounted on the coil shelf and is provided with numbers of primary windings and secondary windings; the heat conductive tube is arranged in the gap of the windings for conducting the heat generated by the electrical coil to the outside of the electromagnetic apparatus. Furthermore, the conducting wire is electrically coupled to the electrical coil and transmits the input voltage and output voltage during the operation of electromagnetic apparatus.
    Type: Application
    Filed: April 29, 2020
    Publication date: August 26, 2021
    Inventors: Chun-Chen Chen, Jian-Hsieng Lee, Feng-Yi Lin, Pang-Chuan Chen
  • Publication number: 20210265462
    Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a gate structure, a first dielectric layer, a second dielectric layer, a first plug and two metal lines. The substrate has a shallow trench isolation and an active area, and the gate structure is disposed on the substrate to cover a boundary between the active area and the shallow trench isolation. The first dielectric layer is disposed on the substrate, to cover the gate structure, and the first plug is disposed in the first dielectric layer to directly in contact with a conductive layer of the gate structure and the active area. The second dielectric layer is disposed on the first dielectric layer, with the first plug and the gate being entirely covered by the first dielectric layer and the second dielectric layer. The two metal lines are disposed in the second dielectric layer.
    Type: Application
    Filed: May 12, 2021
    Publication date: August 26, 2021
    Inventors: Feng-Yi Chang, Fu-Che Lee, Yi-Ching Chang, Kai-Lou Huang, Ying-Chih Lin, Gang-Yi Lin
  • Patent number: D951178
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: May 10, 2022
    Assignee: PULSETECH PRODUCTS CORPORATION
    Inventors: Conor Miller, Austin Fox, Pete Smith, Feng-Yi Lin