Patents by Inventor Fernando Santos

Fernando Santos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10017368
    Abstract: A cap gripper is described herein with a groove for receiving a projecting portion of a cap. A positively biased member may create a narrowing in the groove to secure the projecting portion of the cap within the groove. The positively biased member may be positively biased by a spring-loaded screw that is inserted into a screw hole of the cap gripper. When the cap is inserted into the cap gripper, the positively biased member may be partially depressed within the screw hole to allow the projecting portion of the cap to be inserted into the groove. Likewise, when the cap is removed from the cap gripper, the positively biased member may be partially depressed within the screw hole to allow the projecting portion of the cap to be removed from the groove.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: July 10, 2018
    Assignee: THE WINE GROUP, INC.
    Inventors: Earl Mckuin, Fernando Santos
  • Patent number: 9986646
    Abstract: An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: May 29, 2018
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Audel A. Sanchez, Fernando A. Santos, Jerry L. White
  • Patent number: 9841252
    Abstract: A method for aiding repeated firing of a semiautomatic firearm having a trigger and a bolt includes means for detecting that the bolt has translated rearwardly at least a first predetermined distance due to firing the firearm, means for calculating a particular time when the bolt will be in a chambered position, responsive to detecting that the bolt has translated rearwardly at least the first predetermined distance and, means for applying a forward biasing force to translate the trigger from a fired to an un-fired position, at the particular time the bolt is in the chambered position, and subsequently removing said forward biasing force.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: December 12, 2017
    Inventor: Luiz Fernando Santos Reis
  • Patent number: 9800208
    Abstract: An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: October 24, 2017
    Assignee: NXP USA, INC.
    Inventors: Mahesh K. Shah, Jerry L. White, Li Li, Hussain H. Ladhani, Audel A. Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos
  • Publication number: 20170005621
    Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.
    Type: Application
    Filed: September 16, 2016
    Publication date: January 5, 2017
    Inventors: Margaret A. Szymanowski, Sarmad K. Musa, Fernando A. Santos, Mahesh K. Shah
  • Publication number: 20160377364
    Abstract: A method for aiding repeated firing of a semiautomatic firearm having a trigger and a bolt includes means for detecting that the bolt has translated rearwardly at least a first predetermined distance due to firing the firearm, means for calculating a particular time when the bolt will be in a chambered position, responsive to detecting that the bolt has translated rearwardly at least the first predetermined distance and, means for applying a forward biasing force to translate the trigger from a fired to an un-fired position, at the particular time the bolt is in the chambered position, and subsequently removing said forward biasing force.
    Type: Application
    Filed: May 27, 2016
    Publication date: December 29, 2016
    Inventor: Luiz Fernando Santos Reis
  • Patent number: 9466588
    Abstract: A packaged semiconductor device may include a leadframe and a die carrier mounted to the leadframe. The die carrier is formed from an electrically and thermally conductive material. A die is mounted to a surface of the die carrier with die attach material having a melting point in excess of 240° C. A method may include providing the die carrier, melting the die attach material at a temperature in excess of 240° C. to attach the die to the surface of the die carrier to form a sub-assembly, attaching the sub-assembly to a leadframe, electrically interconnecting the die and the leadframe, and enclosing at least portions of the die and the leadframe to form a packaged device.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: October 11, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Fernando A. Santos, Audel A. Sanchez, Lakshminarayan Viswanathan
  • Patent number: 9450547
    Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: September 20, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Margaret A. Szymanowski, Sarmad K. Musa, Fernando A. Santos, Mahesh K. Shah
  • Publication number: 20160164471
    Abstract: An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.
    Type: Application
    Filed: February 16, 2016
    Publication date: June 9, 2016
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Mahesh K. SHAH, Jerry L. WHITE, Li LI, Hussain H. LADHANI, Audel A. SANCHEZ, Lakshminarayan VISWANATHAN, Fernando A. SANTOS
  • Publication number: 20160163623
    Abstract: A packaged semiconductor device may include a termination surface having terminations configured as leadless interconnects to be surface mounted to a printed circuit board. A first flange has a first surface and a second surface. The first surface provides a first one of the terminations, and the second surface is opposite to the first surface. A second flange also has a first surface and a second surface, with the first surface providing a second one of the terminations, and the second surface is opposite to the first surface. A die is mounted to the second surface of the first flange with a material having a melting point in excess of 240° C. An electrical interconnect extends between the die and the second surface of the second flange opposite the termination surface, such that the electrical interconnect, first flange and second flange are substantially housed within a body.
    Type: Application
    Filed: February 11, 2016
    Publication date: June 9, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Lakshminarayan Viswanathan, Lakshmi N. Ramanathan, Audel A. Sanchez, Fernando A. Santos
  • Publication number: 20160145086
    Abstract: A cap gripper is described herein with a groove for receiving a projecting portion of a cap. A positively biased member may create a narrowing in the groove to secure the projecting portion of the cap within the groove. The positively biased member may be positively biased by a spring-loaded screw that is inserted into a screw hole of the cap gripper. When the cap is inserted into the cap gripper, the positively biased member may be partially depressed within the screw hole to allow the projecting portion of the cap to be inserted into the groove. Likewise, when the cap is removed from the cap gripper, the positively biased member may be partially depressed within the screw hole to allow the projecting portion of the cap to be removed from the groove.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 26, 2016
    Inventors: Earl Mckuin, Fernando Santos
  • Publication number: 20160150632
    Abstract: An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 26, 2016
    Inventors: LAKSHMINARAYAN VISWANATHAN, AUDEL A. SANCHEZ, FERNANDO A. SANTOS, JERRY L. WHITE
  • Patent number: 9337774
    Abstract: An embodiment of a packaged radio frequency (RF) device includes a device substrate with a voltage reference plane, a first input lead coupled to the device substrate, a first output lead coupled to the device substrate, a first transistor die coupled to a top surface of the device substrate with a solder bond, a second die coupled to the top surface of the device substrate with a conductive epoxy that electrically couples at least one component of the second die to the voltage reference plane, and non-conductive molding compound over the top surface of the device substrate and encompassing the first transistor die, the second die, a portion of the first input lead, and a portion of the first output lead.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: May 10, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Margaret A. Szymanowski, L. M. Mahalingam, Sarmad K. Musa, Fernando A. Santos, Jerry L. White
  • Patent number: 9300254
    Abstract: An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: March 29, 2016
    Assignee: FREESCALE SEMICONDUCTOR INC.
    Inventors: Mahesh K. Shah, Jerry L. White, Li Li, Hussain H. Ladhani, Audel A. Sanchez, Lakshminarayan Viswanathan, Fernando A. Santos
  • Publication number: 20160087586
    Abstract: An embodiment of a packaged radio frequency (RF) device includes a device substrate with a voltage reference plane, a first input lead coupled to the device substrate, a first output lead coupled to the device substrate, a first transistor die coupled to a top surface of the device substrate with a solder bond, a second die coupled to the top surface of the device substrate with a conductive epoxy that electrically couples at least one component of the second die to the voltage reference plane, and non-conductive molding compound over the top surface of the device substrate and encompassing the first transistor die, the second die, a portion of the first input lead, and a portion of the first output lead.
    Type: Application
    Filed: September 19, 2014
    Publication date: March 24, 2016
    Inventors: MARGARET A. SZYMANOWSKI, L.M. MAHALINGAM, SARMAD K. MUSA, FERNANDO A. SANTOS, JERRY L. WHITE
  • Patent number: 9263375
    Abstract: A packaged semiconductor device may include a termination surface having terminations configured as leadless interconnects to be surface mounted to a printed circuit board. A first flange has a first surface and a second surface. The first surface provides a first one of the terminations, and the second surface is opposite to the first surface. A second flange also has a first surface and a second surface, with the first surface providing a second one of the terminations, and the second surface is opposite to the first surface. A die is mounted to the second surface of the first flange with a material having a melting point in excess of 240° C. An electrical interconnect extends between the die and the second surface of the second flange opposite the termination surface, such that the electrical interconnect, first flange and second flange are substantially housed within a body.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: February 16, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Lakshminarayan Viswanathan, Lakshmi N. Ramanathan, Audel A. Sanchez, Fernando A. Santos
  • Patent number: 9236363
    Abstract: A semiconductor device includes a substrate, first and second bond pad structures supported by the substrate and spaced from one another by a gap, and a wire bond foot jumper extending across the gap and bonded to the first and second bond pad structures.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: January 12, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jeffrey K. Jones, Basim H. Noori, Mohd Salimin Sahludin, Fernando A. Santos
  • Publication number: 20150381117
    Abstract: An embodiment of a radio-frequency (RF) device includes at least one transistor, a package, and a surface-mountable capacitor. The package contains the at least one transistor and includes at least one termination. The surface-mountable capacitor is coupled in a shunt configuration between the at least one transistor and a power supply terminal of the device to decouple the at least one transistor from a power supply.
    Type: Application
    Filed: June 26, 2014
    Publication date: December 31, 2015
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Mahesh K. SHAH, Jerry L. WHITE, Li LI, Hussain H. LADHANI, Audel A. SANCHEZ, Lakshminarayan VISWANATHAN, Fernando A. SANTOS
  • Patent number: 9159588
    Abstract: A method for a packaged leadless semiconductor device including a heat sink flange to which semiconductor dies are coupled using a high temperature die attach process. The semiconductor device further includes a frame structure pre-formed with bent terminal pads. The frame structure is combined with the flange so that a lower surface of the flange and a lower section of each terminal pad are in coplanar alignment, and so that an upper section of each terminal pad overlies the flange. Interconnects interconnect the die with the upper section of the terminal pad. An encapsulant encases the frame structure, flange, die, and interconnects with the lower section of each terminal pad and the lower surface of the flange remaining exposed from the encapsulant.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: October 13, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Audel A. Sanchez, Fernando A. Santos, Lakshminarayan Viswanathan
  • Publication number: 20150262961
    Abstract: A semiconductor device includes a substrate, first and second bond pad structures supported by the substrate and spaced from one another by a gap, and a wire bond foot jumper extending across the gap and bonded to the first and second bond pad structures.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 17, 2015
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Jeffrey K. Jones, Basim H. Noori, Mohd Salimin Sahludin, Fernando A. Santos