Abstract: A process for manufacturing a semiconductor wafer including SOI-insulation wells includes forming, in a die region of a semiconductor body, buried cavities and semiconductor structural elements, which traverse the buried cavities and are distributed in the die region. The process moreover includes the step of oxidizing selectively first adjacent semiconductor structural elements, arranged inside a closed region, and preventing oxidation of second semiconductor structural elements outside the closed region, so as to form a die buried dielectric layer selectively inside the closed region.

Abstract: A process for manufacturing a suspended structure of semiconductor material envisages the steps of: providing a monolithic body of semiconductor material having a front face; forming a buried cavity within the monolithic body, extending at a distance from the front face and delimiting, with the front face, a surface region of the monolithic body, said surface region having a first thickness; carrying out a thickening thermal treatment such as to cause a migration of semiconductor material of the monolithic body towards the surface region and thus form a suspended structure above the buried cavity, the suspended structure having a second thickness greater than the first thickness. The thickening thermal treatment is an annealing treatment.

Abstract: A method for the formation of buried cavities within a semiconductor body envisages the steps of: providing a wafer having a bulk region made of semiconductor material; digging, in the bulk region, trenches delimiting between them walls of semiconductor material; forming a closing layer for closing the trenches in the presence of a deoxidizing atmosphere so as to englobe the deoxidizing atmosphere within the trenches; and carrying out a thermal treatment such as to cause migration of the semiconductor material of the walls and to form a buried cavity. Furthermore, before the thermal treatment is carried out, a barrier layer that is substantially impermeable to hydrogen is formed on the closing layer on top of the trenches.

Abstract: In a process for manufacturing a SOI wafer, the following steps are envisaged: forming, in a monolithic body of semiconductor material having a front face, a buried cavity, which extends at a distance from the front face and delimits, with the front face, a surface region of the monolithic body, the surface region being surrounded by a bulk region and forming a flexible membrane suspended above the buried cavity; forming, through the monolithic body, at least one access passage, which reaches the buried cavity; and filling the buried cavity uniformly with an insulating region. The surface region is continuous and formed by a single portion of semiconductor material, and the buried cavity is contained and completely insulated within the monolithic body; the step of forming at least one access passage is performed after the step of forming a buried cavity.

Abstract: An integrated differential pressure sensor includes, in a monolithic body of semiconductor material, a first face and a second face, a cavity extending at a distance from the first face and delimited therewith by a flexible membrane formed in part by epitaxial material from the monolithic body and in part by annealed epitaxial material from the monolithic body, an access passage in fluid communication with the cavity, and in the flexible membrane at least one transduction element configured so as to convert a deformation of the flexible membrane into electrical signals. The cavity is formed in a position set at a distance from the second face and is delimited at the second face with a portion of the monolithic body.

Abstract: A method for the formation of buried cavities within a semiconductor body envisages the steps of: providing a wafer having a bulk region made of semiconductor material; digging, in the bulk region, trenches delimiting between them walls of semiconductor material; forming a closing layer for closing the trenches in the presence of a deoxidizing atmosphere so as to englobe the deoxidizing atmosphere within the trenches; and carrying out a thermal treatment such as to cause migration of the semiconductor material of the walls and to form a buried cavity. Furthermore, before the thermal treatment is carried out, a barrier layer that is substantially impermeable to hydrogen is formed on the closing layer on top of the trenches.

Abstract: A process for manufacturing an integrated differential pressure sensor includes forming, in a monolithic body of semiconductor material having a first face and a second face, a cavity extending at a distance from the first face and delimiting therewith a flexible membrane, forming an access passage in fluid communication with the cavity, and forming, in the flexible membrane, at least one transduction element configured so as to convert a deformation of the flexible membrane into electrical signals. The cavity is formed in a position set at a distance from the second face and delimits, together with the second face, a portion of the monolithic body. In order to form the access passage, the monolithic body is etched so as to form an access trench extending through it.

Abstract: An electronic microbalance made in a semiconductor body accommodating an oscillating circuit adjacent to a diaphragm. A stack formed by a first electrode, a second electrode, and a piezoelectric region arranged between the first and the second electrode extends above the diaphragm. Any substance that deposits on the stack causes a change in the mass of the microbalance and thus in the resonance frequency of a resonator formed by the microbalance and by the oscillating circuit and can thus be detected electronically. A chemical sensor is obtained by forming a sensitive layer of a material suitable for binding to target chemicals on the stack. The sensitivity of the microbalance can be increased by making the first electrode of molybdenum so as to increase the piezoelectric characteristics of the piezoelectric region.

Abstract: A hybridization detecting device, wherein a probe cell has a body of semiconductor material forming a diaphragm, a first electrode on the diaphragm, a piezoelectric region on the first electrode, a second electrode on the piezoelectric region and a detection layer on the second electrode. The body accommodates a buried cavity downwardly delimiting the diaphragm.

Abstract: The microreactor has a body of semiconductor material; a large area buried channel extending in the body and having walls; a coating layer of insulating material coating the walls of the channel; a diaphragm extending on top of the body and upwardly closing the channel. The diaphragm is formed by a semiconductor layer completely encircling mask portions of insulating material.

Abstract: A process for manufacturing an integrated membrane made of semiconductor material includes the step of forming, in a monolithic body of semiconductor material having a front face, a buried cavity, extending at a distance from the front face and delimiting with the front face a surface region of the monolithic body, the surface region forming a membrane that is suspended above the buried cavity. The process further envisages the step of forming an insulation structure in a surface portion of the monolithic body to electrically insulate the membrane from the monolithic body; and the further and distinct step of setting the insulation structure at a distance from the membrane so that it will be positioned outside the membrane at a non-zero distance of separation.

Abstract: The microreactor is formed by a sandwich including a first body, an intermediate sealing layer and a second body. A buried channel extends in the first body and communicates with the surface of the first body through a first and a second apertures. A first and a second reservoirs are formed in the second body and are at least partially aligned with the first and second apertures. The sealing layer separates the first aperture from the first reservoir and the second aperture from the second reservoir, thereby avoiding contamination of liquids contained in the buried channel from the outside and from any adjacent buried channels. The sealing layer is perforated during use of the device, but a resilient plug can be used to reseal the device.

Abstract: To manufacture a layer of semiconductor material, a first wafer of semiconductor material is subjected to implantation to form a defect layer at a distance from a first face; the first wafer is bonded to a second wafer, by putting an insulating layer present on the second wafer in contact with the first face of the first wafer. Then, hydrogen atoms are introduced into the first wafer through a second face at an energy such as to avoid defects to be generated in the first wafer and at a temperature lower than 600° C. Thereby, the first wafer splits into a usable layer, bonded to the second wafer, and a remaining layer disposed between the defect layer and the second face of the first wafer. Prior to bonding, the first wafer is subjected to processing steps for obtaining integrated components.

Abstract: Method for manufacturing a semiconductor pressure sensor, wherein, in a silicon substrate, trenches are dug and delimit walls; a closing layer is epitaxially grown, that closes the trenches at the top and forms a suspended membrane; a heat treatment is performed so as to cause migration of the silicon of the walls and to form a closed cavity underneath the suspended membrane; and structures are formed for transducing the deflection of the suspended membrane into electrical signals.

Abstract: A process manufactures a wafer using semiconductor processing techniques. A bonding layer is formed on a top surface of a first wafer; a deep trench is dug in a substrate of semiconductor material belonging to a second wafer. A top layer of semiconductor material is formed on top of the substrate so as to close the deep trench at the top and form at least one buried cavity. The top layer of the second wafer is bonded to the first wafer through the bonding layer. The two wafers are subjected to a thermal treatment that causes bonding of at least one portion of the top layer to the first wafer and widening of the buried cavity. In this way, the portion of the top layer bonded to the first wafer is separated from the rest of the second wafer, to form a composite wafer.

Abstract: A process for manufacturing a semiconductor wafer including SOI-insulation wells includes forming, in a die region of a semiconductor body, buried cavities and semiconductor structural elements, which traverse the buried cavities and are distributed in the die region. The process moreover includes the step of oxidizing selectively first adjacent semiconductor structural elements, arranged inside a closed region, and preventing oxidation of second semiconductor structural elements outside the closed region, so as to form a die buried dielectric layer selectively inside the closed region.

Abstract: A manufacturing process of a semiconductor piezoresistive accelerometer includes the steps of: providing a wafer of semiconductor material; providing a membrane in the wafer over a cavity; rigidly coupling an inertial mass to the membrane; and providing, in the wafer, piezoresistive transduction elements, that are sensitive to strains of the membrane and generate corresponding electrical signals. The step of coupling is carried out by forming the inertial mass on top of a surface of the membrane opposite to the cavity. The accelerometer is advantageously used in a device for monitoring the pressure of a tire of a vehicle.

Abstract: The microreactor has a body of semiconductor material; a large area buried channel extending in the body and having walls; a coating layer of insulating material coating the walls of the channel; a diaphragm extending on top of the body and upwardly closing the channel. The diaphragm is formed by a semiconductor layer completely encircling mask portions of insulating material.

Abstract: A process that includes the steps of forming, in a wafer of monocrystalline silicon, first trenches extending between portions of the wafer; etching the substrate to remove the silicon around the first trenches and forming cavities in the substrate; covering the walls of the cavities with an epitaxial growth inhibiting layer; growing a monocrystalline epitaxial layer on top of the substrate and the cavities so as to obtain a monocrystalline wafer embedding buried cavities completely surrounded by silicon; forming second trenches extending in the epitaxial layer as far as the cavities; removing the epitaxial growth inhibiting layer; oxidizing the cavities, forming at least one continuous region of buried oxide; depositing a polysilicon layer on the entire surface of the wafer and inside the second trenches; removing the polysilicon layer on the surface and leaving filling regions inside the second trenches; and oxidizing, on the top, portions of said filling regions so as to form field oxide regions.

Abstract: A method including: forming doped regions on a monocrystalline substrate; growing an epitaxial layer; forming trenches in the epitaxial layer extending to the doped regions; anodizing the doped regions in an electro-galvanic cell to form porous silicon regions; oxidizing the porous silicon regions; removing the oxidized porous silicon regions to form a buried air gap; thermally oxidizing the substrate to grow an oxide region from the walls of the buried air gap and the trenches, until the buried air gap and the trenches themselves are filled.