Patents by Inventor François Roy

François Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180014375
    Abstract: A lighting system and method for generating an output light beam representative of a target natural light are provided. The lighting system includes a plurality of solid-state light emitters each emitting a light sub-beam having an individual spectrum. The individual spectra of the solid-state light emitters collectively cover a visible portion of the natural light spectral profile and exclude infrared and ultraviolet components. The lighting system further includes a combining assembly combining the light sub-beams into the output light beam. A control module controls an intensity of the light sub-beam from each of the solid-state light emitters such that the resulting combined spectral profile of the output light beam is representative of a natural light spectral profile of the target natural light over its visible portion.
    Type: Application
    Filed: September 2, 2016
    Publication date: January 11, 2018
    Inventors: Gabriel Dupras, Francois Roy-Moisan
  • Publication number: 20180006072
    Abstract: A photosensor is formed within a semiconductor substrate layer having a front side and a back side. An isolation structure delimits an active region of the semiconductor substrate layer which includes a charge collecting region. The front side of semiconductor substrate layer includes a charge transfer circuit. A reflecting mirror is mounted at the back side of the semiconductor substrate layer. The reflecting mirror includes a pupil opening configured to admit light into the active region at the back side. An underside reflective surface of the reflecting mirror is configured to reflect light received from the active region back into the active region.
    Type: Application
    Filed: June 30, 2016
    Publication date: January 4, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Francois Roy, Bastien Mamdy
  • Publication number: 20180006075
    Abstract: A pixel includes a semiconductor layer with a charge accumulation layer extending in the semiconductor layer. A transistor has a read region penetrating into said semiconductor layer down to a first depth. An insulating wall penetrates into the semiconductor layer from an upper surface and containing an insulated conductor connected to a node of application of a potential. The insulating wall includes at least a portion provided with a deep insulating plug penetrating into the insulated conductor down to a second depth greater than the first depth. A continuous portion of the insulating wall laterally delimits, at least partially, a charge accumulation area and includes a wall portion with the deep insulating plug at least partially laterally delimiting the read region of the transistor.
    Type: Application
    Filed: September 13, 2017
    Publication date: January 4, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Francois Roy
  • Publication number: 20170353673
    Abstract: Each pixel of a global shutter back-side illuminated image sensor includes a photosensitive area. On a front surface, a first transistor includes a vertical ring-shaped electrode penetrating into the photosensitive area and laterally delimiting a memory area. The memory area penetrates into the photosensitive area less deeply than the insulated vertical ring-shaped electrode. A read area is formed in an intermediate area which is formed in the memory area. The memory area, the intermediate area and read area define a second transistor having an insulated horizontal electrode forming a gate of the second transistor. The memory area may be formed by a first and second memory areas and an output signal is generated indicative of a difference between charge stored in the first memory area and charge stored in the second memory area after a charge transfer to the first memory area.
    Type: Application
    Filed: November 22, 2016
    Publication date: December 7, 2017
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Francois Roy
  • Patent number: 9825076
    Abstract: A back-side illuminated pixel including a semiconductor substrate of a first conductivity type coated, on the front side of the pixel, with a three-layer assembly successively including a first layer of the second conductivity type, an insulating layer, and a second semiconductor layer. The three-layer assembly is interrupted in a central portion of the pixel by a transfer region of the first conductivity type laterally delimited by an insulated conductive wall extending from the front surface, Transistors are formed in the second semiconductor layer.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: November 21, 2017
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: François Roy, Helene Wehbe-Alause, Olivier Noblanc
  • Patent number: 9825080
    Abstract: A structure of insulation between photodiodes formed in a doped semiconductor layer of a first conductivity type extending on a doped semiconductor substrate of the second conductivity type, the insulating structure including a trench crossing the semiconductor layer, the trench walls being coated with an insulating layer, the trench being filled with a conductive material and being surrounded with a P-doped area, more heavily doped than the semiconductor layer.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: November 21, 2017
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Nayera Ahmed, François Roy
  • Patent number: 9819103
    Abstract: The present relates to a washable interconnection patch, a connection assembly, and an intelligent washable garment equipped therewith. The patch receives and interconnects wires to a cable. The patch comprises two matching pieces interlocking together so as to define there between two opposite apertures. One of the apertures is adapted to receive and hold the wires, and the other aperture is adapted to receive and hold the cable. One of the two matching pieces defines on an interior face a channel to interconnect the wires to the cables. The connection assembly comprises a male connector and a female connector. The male connector defines a series of independent connection points along a length thereof. The female connector is adapted to receive the male connector, and defines along a length of an inner surface thereof a series of contact points. When the male connector is inserted within the female connector, the connection points and the contact points are aligned and in contact together.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: November 14, 2017
    Assignee: CARRE TECHNOLOGIES INC.
    Inventors: Pierre-Alexandre Fournier, Jean-Francois Roy, Charles Robillard, Stephan Gagnon
  • Patent number: 9793312
    Abstract: A pixel includes a semiconductor layer with a charge accumulation layer extending in the semiconductor layer. A transistor has a read region penetrating into said semiconductor layer down to a first depth. An insulating wall penetrates into the semiconductor layer from an upper surface and containing an insulated conductor connected to a node of application of a potential. The insulating wall includes at least a portion provided with a deep insulating plug penetrating into the insulated conductor down to a second depth greater than the first depth. A continuous portion of the insulating wall laterally delimits, at least partially, a charge accumulation area and includes a wall portion with the deep insulating plug at least partially laterally delimiting the read region of the transistor.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: October 17, 2017
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventor: Francois Roy
  • Publication number: 20170278892
    Abstract: A pixel includes a semiconductor layer with a charge accumulation layer extending in the semiconductor layer. A transistor has a read region penetrating into said semiconductor layer down to a first depth. An insulating wall penetrates into the semiconductor layer from an upper surface and containing an insulated conductor connected to a node of application of a potential. The insulating wall includes at least a portion provided with a deep insulating plug penetrating into the insulated conductor down to a second depth greater than the first depth. A continuous portion of the insulating wall laterally delimits, at least partially, a charge accumulation area and includes a wall portion with the deep insulating plug at least partially laterally delimiting the read region of the transistor.
    Type: Application
    Filed: August 5, 2016
    Publication date: September 28, 2017
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventor: Francois Roy
  • Publication number: 20170221946
    Abstract: An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area. First and second insulated vertical electrodes electrically connected to each other are positioned opposite each other and delimit the storage area. The first electrode extends between the storage area and the photosensitive area. The second electrode includes a bent extension opposite a first end of the first electrode, with the storage area emerging onto the photosensitive area on the side of the first end. The control circuit operates to apply a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block charge transfer.
    Type: Application
    Filed: April 17, 2017
    Publication date: August 3, 2017
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Francois Roy, Philippe Are
  • Patent number: 9711550
    Abstract: A method of manufacturing a pinned photodiode, including: forming a region of photon conversion into electric charges of a first conductivity type on a substrate of the second conductivity type; coating said region with a layer of a heavily-doped insulator of the second conductivity type; and annealing to ensure a dopant diffusion from the heavily-doped insulator layer.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: July 18, 2017
    Assignees: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: Laurent Favennec, Didier Dutartre, Francois Roy
  • Publication number: 20170192090
    Abstract: A time-of-flight detection pixel includes a photosensitive area including a first doped layer and a charge collection area extending in the first doped layer. At least two charge storage areas extend from the charge collection area, each including a first well more heavily doped than the charge collection area and separated from the charge collection area by a first portion of the first doped layer which is coated with a gate. Each charge storage area is laterally delimited by two insulated conductive electrodes, extending parallel to each other and facing each other. A second heavily doped layer of opposite conductivity coats the pixel except for at each portion of the first doped layer coated with the gate.
    Type: Application
    Filed: December 22, 2016
    Publication date: July 6, 2017
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Francois Roy, Marie Guillon, Yvon Cazaux, Boris Rodrigues, Alexis Rochas
  • Publication number: 20170194368
    Abstract: A pixel is formed on a semiconductor substrate that includes a photosensitive area having a first doped layer and a charge collection area of a first conductivity type extending through at least part of the first doped layer. At least two charge storage areas, each including a well of the first conductivity type, are separated from the charge collection area at least by a first portion of the first layer. The first portion is covered by a first gate. Each charge storage area is laterally delimited by two insulated conductive electrodes. A second doped layer of the second conductivity type covers the charge collection area and the charge storage areas.
    Type: Application
    Filed: December 28, 2016
    Publication date: July 6, 2017
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Francois Roy, Boris Rodrigues, Marie Guillon, Yvon Cazaux, Benoit Giffard
  • Publication number: 20170186789
    Abstract: A back-side illuminated pixel including a semiconductor substrate of a first conductivity type coated, on the front side of the pixel, with a three-layer assembly successively including a first layer of the second conductivity type, an insulating layer, and a second semiconductor layer. The three-layer assembly is interrupted in a central portion of the pixel by a transfer region of the first conductivity type laterally delimited by an insulated conductive wall extending from the front surface, Transistors are formed in the second semiconductor layer.
    Type: Application
    Filed: April 11, 2016
    Publication date: June 29, 2017
    Inventors: François Roy, Helene Wehbe-Alause, Olivier Noblanc
  • Patent number: 9681077
    Abstract: A device for transferring charges photogenerated in a portion of a semiconductor layer delimited by at least two parallel trenches, each trench including, lengthwise, at least a first and a second conductive regions insulated from each other and from the semiconductor layer, including the repeating of a first step of biasing of the first conductive regions to a first voltage to form a volume accumulation of holes in the area of this portion located between the first regions, while the second conductive regions are biased to a second voltage greater than the first voltage, and of a second step of biasing of the first regions to the second voltage and of the second regions to the first voltage.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: June 13, 2017
    Assignees: STMicroelectronics SA, STMicroelectronics (Grenoble 2) SAS
    Inventors: Cedric Tubert, Francois Roy, Pascal Mellot
  • Patent number: 9673247
    Abstract: An image sensor includes a control circuit and pixels. Each pixel includes: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area. First and second insulated vertical electrodes electrically connected to each other are positioned opposite each other and delimit the storage area. The first electrode extends between the storage area and the photosensitive area. The second electrode includes a bent extension opposite a first end of the first electrode, with the storage area emerging onto the photosensitive area on the side of the first end. The control circuit operates to apply a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block said transfer.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: June 6, 2017
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Francois Roy, Philippe Are
  • Publication number: 20170134683
    Abstract: A global shutter image sensor of a back-illuminated type includes a semiconductor substrate and pixels. Each pixel includes a photosensitive area, a storage area, a readout area and areas for transferring charges between these different areas. The image sensor includes, for each pixel, a protector extending at least partly into the substrate from the back of the substrate to ensure that the storage area is protected against back illumination.
    Type: Application
    Filed: March 22, 2016
    Publication date: May 11, 2017
    Inventors: François GUYADER, François ROY
  • Publication number: 20170125474
    Abstract: An image sensor including a control circuit and a plurality of pixels, each pixel including: a photosensitive area, a substantially rectangular storage area adjacent to the photosensitive area, and a read area; first and second insulated vertical electrodes electrically connected to each other, opposite each other, and delimiting the storage area, the first electrode extending between the storage area and the photosensitive area, the second electrode including a bent extension opposite a first end of the first electrode, the storage area emerging onto the photosensitive area on the side of the first end, the control circuit being capable of applying a first voltage to the first and second electrodes to perform a charge transfer, and a second voltage to block said transfer.
    Type: Application
    Filed: April 22, 2016
    Publication date: May 4, 2017
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Francois Roy, Philippe Are
  • Patent number: D796943
    Type: Grant
    Filed: March 26, 2016
    Date of Patent: September 12, 2017
    Inventor: Francois Roy
  • Patent number: D798697
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: October 3, 2017
    Inventor: Francois Roy