Abstract: Native Group IV semiconductor thin films formed from coating substrates using formulations of Group IV nanoparticles are described. Such native Group IV semiconductor thin films leverage the vast historical knowledge of Group IV semiconductor materials and at the same time exploit the advantages of Group IV semiconductor nanoparticles for producing novel thin films which may be readily integrated into a number of devices.

Abstract: The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.

Abstract: The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.

Abstract: Nanowire dispersion compositions (and uses thereof) are disclosed comprising a plurality of inorganic nanowires suspended in an aqueous or non-aqueous solution comprising at least one low molecular weight and/or low HLB (Hydrophile-Lipophile Balance) value dispersant. Methods of further improving the dispersability of a plurality of inorganic nanowires in an aqueous or non-aqueous solution comprise, for example, oxidizing the surface of the nanowires prior to dispersing the nanowires in the aqueous or non-aqueous solution.

Abstract: A light-producing device integrated with a power monitoring system include a light-producing device from which light is emitted in wavelengths that can range from approximately 700 nm to approximately 3 microns. A semi-transparent sensor is located such that at least a portion of the light emitted passes through the semi-transparent sensor and at least a portion of light is absorbed by the semi-transparent sensor. The semi-transparent sensor is configured to be semi-transparent at wavelengths that can range from 700 nm to 3 microns. The semi-transparent sensor may also be used with an external light source, for example with fiber-optic cables.

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.

Abstract: The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.

Abstract: A hybrid structure or device is provided wherein carried on a single substrate is at least one micro-spring interconnect having an elastic material that is initially fixed to a surface of the substrate, an anchor portion which is fixed to the substrate surface and a free portion. The spring contact is self-assembling in that as the free portion is released it moves out of the plane of the substrate. Also integrated on the substrate is a sensor having an active layer and contacts. The substrate and sensor may be formed of materials which are somewhat partially transparent to light at certain infrared wavelengths. The integrated sensor/spring contact configuration may be used in an imaging system to sense output from a light source which is used for image formation. The light source may be a laser array, LED array or other appropriate light source. The sensor is appropriately sized to sense all or some part of light from the light source.

Abstract: A method is disclosed for making shaped optical moems components with stressed thin films. In particular, stressed thin films are used to make mirror structures.

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.

Abstract: A hybrid structure or device is provided wherein carried on a single substrate is at least one micro-spring interconnect having an elastic material that is initially fixed to a surface of the substrate, an anchor portion which is fixed to the substrate surface and a free portion. The spring contact is self-assembling in that as the free portion is released it moves out of the plane of the substrate. Also integrated on the substrate is a sensor having an active layer and contacts. The substrate and sensor may be formed of materials which are somewhat partially transparent to light at certain infrared wavelengths. The integrated sensor/spring contact configuration may be used in an imaging system to sense output from a light source which is used for image formation. The light source may be a laser array, LED array or other appropriate light source. The sensor is appropriately sized to sense all or some part of light from the light source.

Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.

Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.

Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.

Abstract: A light-producing device integrated with a power monitoring system include a light-producing device from which light is emitted in wavelengths that can range from approximately 700 nm to approximately 3 microns. A semi-transparent sensor is located such that at least a portion of the light emitted passes through the semi-transparent sensor and at least a portion of light is absorbed by the semi-transparent sensor. The semi-transparent sensor is configured to be semi-transparent at wavelengths that can range from 700 nm to 3 microns. The semi-transparent sensor may also be used with an external light source, for example with fiber-optic cables.