Abstract: The invention relates to a metallization for an IGBT or a diode. In the case of this metallization, a copper layer (10, 12) having a layer thickness of approximately 50 ?m is applied to the front side and/or rear side of a semiconductor body (1) directly or if need be via a diffusion barrier layer (13, 14). The layer (8, 12) has a specific heat capacity that is at least a factor of 2 higher than the specific heat capacity of the semiconductor body (1). It simultaneously serves for producing a field stop layer (5) by proton implantation through the layer (12) from the rear side and for masking a proton or helium implantation for the purpose of charge carrier lifetime reduction from the front side of the chip (1).

Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.

Abstract: According to one embodiment, a semiconductor device comprises a body of a first conductivity type having a source region and a channel, the body being in contact with a top contact layer. The device also comprises a gate arranged adjacent the channel and a drift zone of a second conductivity type arranged between the body and a bottom contact layer. An integrated diode is formed partially by a first zone of the first conductivity type within the body and being in contact with the top contact layer and a second zone of the second conductivity type being in contact with the bottom contact layer. A reduced charge carrier concentration region is formed in the drift zone having a continuously increasing charge carrier lifetime in the vertical direction so that the charge carrier lifetime is lowest near the body and highest near the bottom contact layer.

Abstract: A semiconductor device and production method is disclosed. In one embodiment, the semiconductor device includes a first electrode and a second electrode, located on surfaces of a semiconductor body, and an insulated gate electrode. The semiconductor body has a contact groove for the first electrode in an intermediate oxide layer. Highly doped zones of a first conduction type are located in edge regions of the source connection zone. Below the highly doped zones of the first conduction type, there are highly doped zones of a body zone with a complementary conduction type. In a central region of the source connection zone, the body zone has a net charge carrier concentration with a complementary conduction type which is lower than the charge carrier concentration in the edge regions of the source connection zone.

Abstract: A semiconductor device has a heavily doped substrate and an upper layer with doped silicon of a first conductivity type disposed on the substrate, the upper layer having an upper surface and including an active region that comprises a well region of a second, opposite conductivity type. An edge termination zone has a junction termination extension (JTE) region of the second conductivity type, the region having portions extending away from the well region and a number of field limiting rings of the second conductivity type disposed at the upper surface in the junction termination extension region.

Abstract: According to one embodiment, a power semiconductor device comprises a semiconductor substrate. A transistor gate structure is arranged in a trench formed in the semiconductor substrate. A body region of a first conductivity type is arranged adjacent the transistor gate structure and a first highly-doped region of a second conductivity type is arranged in an upper portion of the body region. A drift zone of the second conductivity type is arranged below the body region and a second highly-doped region of the second conductivity type is arranged below the drift zone. An end-of-range irradiation region is arranged adjacent the transistor gate structure and has a plurality of vacancies. In some embodiments, at least some of the vacancies are occupied by metals.

Abstract: A semiconductor component and method of making a semiconductor component is disclosed. In one embodiment, the semiconductor component includes a drift region of a first conductivity type, a body region of a second conductivity type, and a trench extending into the body region. A semiconductor region of the first conductivity type is in contact with the drift region and the body region and is arranged at a distance from the trench.

Abstract: A method for fabricating a semiconductor body is presented. The semiconductor body includes a p-conducting zone, an n-conducting zone and a pn junction in a depth T1 in the semiconductor body between the p-conducting zone and the n-conducting zone. The method includes providing the semiconductor body, producing the p-doped zone by the diffusion of an impurity that forms an acceptor in a first direction into the semiconductor body, and producing the n-conducting zone by the implantation of protons in the first direction into the semiconductor body into a depth T2>T1 and the subsequent heat treatment of the semiconductor body in order to form hydrogen-induced donors.

Abstract: An integrated circuit and method, producing semiconductor zones with a steep doping profile is disclosed. In one embodiment, dopants are implanted in a region corresponding to the semiconductor zone to be formed and which has at least one topology process. During the subsequent laser irradiation for activating the dopants in the semiconductor zone, regions which are laterally directly adjacent to the semiconductor zone are protected against melting on account of the topology process.

Abstract: According to one embodiment, a semiconductor device comprises a body of a first conductivity type having a source region and a channel, the body being in contact with a top contact layer. The device also comprises a gate arranged adjacent the channel and a drift zone of a second conductivity type arranged between the body and a bottom contact layer. An integrated diode is formed partially by a first zone of the first conductivity type within the body and being in contact with the top contact layer and a second zone of the second conductivity type being in contact with the bottom contact layer. A reduced charge carrier concentration region is formed in the drift zone having a continuously increasing charge carrier lifetime in the vertical direction so that the charge carrier lifetime is lowest near the body and highest near the bottom contact layer.

Abstract: A semiconductor device has a heavily doped substrate and an upper layer with doped silicon of a first conductivity type disposed on the substrate, the upper layer having an upper surface and including an active region that comprises a well region of a second, opposite conductivity type. An edge termination zone has a junction termination extension (JTE) region of the second conductivity type, the region having portions extending away from the well region and a number of field limiting rings of the second conductivity type disposed at the upper surface in the junction termination extension region.

Abstract: A semiconductor device in one embodiment has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.

Abstract: A reverse conducting insulated gate bipolar transistor (IGBT) includes a semiconductor substrate having a front side and a back side and a first conductivity region between the front and back sides. The first conductivity region includes a reduced lifetime zone, a first lifetime zone between the reduced lifetime zone and the front side, and an intermediate lifetime zone between the reduced lifetime zone and the back side. Charge carriers in the first lifetime zone have a first carrier lifetime, charge carriers in the reduced lifetime zone have a reduced carrier lifetime shorter than the first carrier lifetime, and charge carriers in the intermediate lifetime zone have an intermediate carrier lifetime shorter than the first carrier lifetime and longer than the reduced carrier lifetime.

Abstract: A The semiconductor device has a heavily doped substrate and an upper layer with doped silicon of a first conductivity type disposed on the substrate, the upper layer having an upper surface and including an active region that comprises a well region of a second, opposite conductivity type. An edge termination zone has a junction termination extension (JTE) region of the second conductivity type, the region having portions extending away from the well region and a number of field limiting rings of the second conductivity type disposed at the upper surface in the junction termination extension region.

Abstract: A semiconductor device according to the invention has a first connection region, a second connection region and a semiconductor volume arranged between the first and second connection regions. Provision is made, within the semiconductor volume, in the vicinity of the second connection region, of a field stop zone for spatially delimiting a space charge zone that can be formed in the semiconductor volume, and of an anode region adjoining the first connection region. The dopant concentration profile within the semiconductor volume is configured such that the integral of the ionized dopant charge over the semiconductor volume, proceeding from an interface of the anode region which faces the second connection region, in the direction of the second connection region, reaches a quantity of charge corresponding to the breakdown charge of the semiconductor device only near the interface of the field stop zone which faces the second connection region.

Abstract: A semiconductor device and production method is disclosed. In one embodiment, the semiconductor device includes a first electrode and a second electrode, located on surfaces of a semiconductor body, and an insulated gate electrode. The semiconductor body has a contact groove for the first electrode in an intermediate oxide layer. Highly doped zones of a first conduction type are located in edge regions of the source connection zone. Below the highly doped zones of the first conduction type, there are highly doped zones of a body zone with a complementary conduction type. In a central region of the source connection zone, the body zone has a net charge carrier concentration with a complementary conduction type which is lower than the charge carrier concentration in the edge regions of the source connection zone.

Abstract: A semiconductor diode (30) has an anode (32), a cathode (33) and a semiconductor volume (31) provided between the anode (32) and the cathode (33). An electron mobility and/or hole mobility within a zone (34) of the semiconductor volume (31) that is situated in front of the cathode (33) is reduced relative to the rest of the semiconductor volume (31).

Abstract: A semiconductor component is disclosed. One embodiment provides a semiconductor body having a cell region with at least one zone of a first conduction type and at least one zone of a second conduction type in a rear side. A drift zone of the first conduction type in the cell region is provided. The drift zone contains at least one region through which charge carriers flow in an operating mode of the semiconductor component in one polarity and charge carriers do not flow in an operating mode of the semiconductor component in an opposite polarity.

Abstract: An integrated circuit and method, producing semiconductor zones with a steep doping profile is disclosed. In one embodiment, dopants are implanted in a region corresponding to the semiconductor zone to be formed and which has at least one topology process. During the subsequent laser irradiation for activating the dopants in the semiconductor zone, regions which are laterally directly adjacent to the semiconductor zone are protected against melting on account of the topology process.

Abstract: A The semiconductor device has a heavily doped substrate and an upper layer with doped silicon of a first conductivity type disposed on the substrate, the upper layer having an upper surface and including an active region that comprises a well region of a second, opposite conductivity type. An edge termination zone has a junction termination extension (JTE) region of the second conductivity type, the region having portions extending away from the well region and a number of field limiting rings of the second conductivity type disposed at the upper surface in the junction termination extension region.