Abstract: An EUV mask having elevated sections and trenches lying in between is disclosed. In one embodiment, the mask includes at least a substrate layer having a very low coefficient of thermal expansion, a multilayer, and a capping layer. The elevated sections of the EUV mask are arranged on a continuous conductive layer.

Abstract: The present invention relates to a method for determining an optimal absorber stack geometry of a lithographic reflection mask comprising a reflection layer and a patterned absorber stack provided on the reflection layer, the absorber stack having a buffer layer and an absorber layer. The method is based on simulating aerial images for different absorber stack geometries in order to determine process windows corresponding to the absorber stack geometries. The optimal absorber stack geometry is identified by the maximum process window size. The invention further relates to a method for fabricating a lithographic reflection mask and to a lithographic reflection mask.

Abstract: The present invention relates to a method for determining an optimal absorber stack geometry of a lithographic reflection mask comprising a reflection layer and a patterned absorber stack provided on the reflection layer, the absorber stack having a buffer layer and an absorber layer. The method is based on simulating aerial images for different absorber stack geometries in order to determine process windows corresponding to the absorber stack geometries. The optimal absorber stack geometry is identified by the maximum process window size. The invention further relates to a method for fabricating a lithographic reflection mask and to a lithographic reflection mask.

Abstract: During the lithographic exposure of layers to be patterned on semiconductor products, use is made of masks whose mask pattern is imaged on a reduced scale, with the aid of an imaging optical arrangement, onto the layer to be patterned. After the patterning of the mask layer, a membrane is placed onto the mask with a membrane holder in order to keep dust or other contaminants in the air away from the plane of the mask layer during the exposure. When the mask and the membrane holder are mounted, manufacturing-dictated height deviations thereof lead to subsequent distortion of the mask structure of the mask layer, which is transferred to the semiconductor product by means of the lithography. Here, the height tolerances of the mask and of the membrane holder are measured and a corrected mask pattern is calculated, the mask structures of which are offset in the lateral direction such that the mask distortions resulting from the mounting of the membrane holder are compensated for.

Abstract: A method for fabricating a photomask for an integrated circuit. The method includes, for example, providing a substrate with at least one trench, providing a prepatterned surface at the bottom of the trench, and providing a multilayer coating over the substrate. As a result, the multilayer coating forms a reflection region on the surface of the substrate outside the trench and a non-reflection region in the trench. The invention additionally provides a corresponding photomask.

Abstract: A reflective optical mirror for semiconductor fabrication includes a capping layer above a reflective multilayer sequence. A doping is provided for the capping layer and an artificial oxide layer is grown on the capping layer with the aid of hydrogen peroxide, in particular in the presence of a catalyst. The artificially grown oxide layer is more homogeneous than a naturally grown oxide and thereby improves optical properties of the mirror during a lithographic exposure of semiconductor products.

Abstract: The present invention relates to a method for determining an optimal absorber stack geometry of a lithographic reflection mask comprising a reflection layer and a patterned absorber stack provided on the reflection layer, the absorber stack having a buffer layer and an absorber layer. The method is based on simulating aerial images for different absorber stack geometries in order to determine process windows corresponding to the absorber stack geometries. The optimal absorber stack geometry is identified by the maximum process window size. The invention further relates to a method for fabricating a lithographic reflection mask and to a lithographic reflection mask.

Abstract: A reflection mask that includes a structure (20) for lithographically transferring a layout onto a target substrate, in particular for use in EUV lithography, and a reflective multilayer structure (11). At least one flare reduction layer (13?, 17) is at least partly arranged on a bright field of the multilayer structure (11).

Abstract: A focused light beam is directed onto a surface patch of a mask and decomposed into partial beams by diffraction at a structure formed on the surface of the mask. Detectors are set such that the intensity of at least two orders of diffraction can be measured. The measured intensities are compared with one another. By way of example, a quotient can be ascertained. The operations are repeated for adjacent surface patches. If the absolute values of the measured intensities fluctuate with a constant quotient, then a variation of the reflection or transmission over the surface of the mask is inferred. If the quotient varies as well, then line width fluctuations within the structure on the mask are inferred.

Abstract: A reflective optical mirror for semiconductor fabrication includes a capping layer above a reflective multilayer sequence. A doping is provided for the capping layer and an artificial oxide layer is grown on the capping layer with the aid of hydrogen peroxide, in particular in the presence of a catalyst. The artificially grown oxide layer is more homogeneous than a naturally grown oxide and thereby improves optical properties of the mirror during a lithographic exposure of semiconductor products.

Abstract: In a EUV reflection mask, the distance from the surface of the mask to an idealized plane is locally measured at a first position. The measured value indicates the mechanical stress caused by the alternating layer sequence of a EUV reflection layer. A local value for a radiation dose of an ion beam, which is used to dope the back surface, is calculated for a counter stress that will be produced on the back surface of the substrate. The lattice structure of the substrate is locally influenced by the doping at the position on the back surface corresponding to the first position on the front surface, and the desired counter stress is thereby generated to compensate for bending caused by the stress. It is advantageously possible to compensate for particular local features in the stress distribution on the substrate, in particular, bending and unevenness of relatively high orders.

Abstract: In order to increase the rigidity of a membrane mask that can be used for ion projection lithography, a second wafer made of the material of the membrane layer is provided in addition to a first wafer. The second wafer is patterned in the same way as the first wafer to form a second carrying ring and is fitted on the membrane layer in a mirror-inverted manner with respect to the first wafer so that the membrane area is arranged between the first and second carrying rings in a centered manner in the direction perpendicular to the membrane plane.

Abstract: A method for fabricating a photomask for an integrated circuit. The method includes, for example, providing a substrate with at least one trench, providing a prepatterned surface at the bottom of the trench, and providing a multilayer coating over the substrate. As a result, the multilayer coating forms a reflection region on the surface of the substrate outside the trench and a non-reflection region in the trench. The invention additionally provides a corresponding photomask.

Abstract: A method for producing a perforated mask for particle radiation includes calculating values of an elasticity of adjacent cells of a mask with respect to longitudinal and shear stresses in a main plane of the mask on a model of the desired pattern of mask openings. For the respective individual cells, length and direction of all the edge sections of the openings and cross-sectional areas of the openings are determined. Therefrom, statistical parameters are derived, which are used as a variable in preselected empirical functions to determine the elasticity values of the cells analytically. By linking the elasticity values determined with deformation forces to be expected, the vector field of a distortion of the mask to be expected is calculated by FE calculation. For cutting the mask openings into a blank, a pattern is selected that represents the desired pattern with a distortion being the inverse of the previously calculated distortion.

Abstract: A reflection mask for projecting a structure onto a semiconductor wafer contains a carrier material, a layer stack for reflecting obliquely incident light and formed of an alternating sequence of reflective layers disposed on a front side of the carrier material, and a light-absorbing layer. In the light-absorbing layer at least one opening is formed as the structure to be projected and which is disposed on the alternating layer stack. An electrically conductive layer is buried within the carrier material near a surface of a rear side of the carrier material. The buried electrically conductive layer is produced by ion implantation preferably in a whole-area manner on the rear side of the mask. The depth and the depth extent of the layer are controlled by the ion energy and also the dose.

Abstract: During the lithographic exposure of layers to be patterned on semiconductor products, use is made of masks whose mask pattern is imaged on a reduced scale, with the aid of an imaging optical arrangement, onto the layer to be patterned. After the patterning of the mask layer, a membrane is placed onto the mask with a membrane holder in order to keep dust or other contaminants in the air away from the plane of the mask layer during the exposure. When the mask and the membrane holder are mounted, manufacturing-dictated height deviations thereof lead to subsequent distortion of the mask structure of the mask layer, which is transferred to the semiconductor product by means of the lithography. Here, the height tolerances of the mask and of the membrane holder are measured and a corrected mask pattern is calculated, the mask structures of which are offset in the lateral direction such that the mask distortions resulting from the mounting of the membrane holder are compensated for.

Abstract: A protective device for plate-shaped objects, such as lithographic masks, includes at least one holding element with a planar edge and a protective element for protecting at least one surface of a plate-shaped object. A polymer cushion, which is disposed on the planar edge, can be brought into contact with a peripheral region of the surface of the plate-shaped object. The polymer cushion is formed of a polymer whose viscosity and/or adhesiveness is greater when tensile forces are exerted on the protective device orthogonally in relation to the peripheral region of the plate-shaped object than when shearing forces are exerted on the protective device parallel to the peripheral region. A method of using such a protected plate-shaped object is also provided.

Abstract: In a EUV reflection mask, the distance from the surface of the mask to an idealized plane is locally measured at a first position. The measured value indicates the mechanical stress caused by the alternating layer sequence of a EUV reflection layer. A local value for a radiation dose of an ion beam, which is used to dope the back surface, is calculated for a counter stress that will be produced on the back surface of the substrate. The lattice structure of the substrate is locally influenced by the doping at the position on the back surface corresponding to the first position on the front surface, and the desired counter stress is thereby generated to compensate for bending caused by the stress. It is advantageously possible to compensate for particular local features in the stress distribution on the substrate, in particular, bending and unevenness of relatively high orders.

Abstract: The present invention, generally speaking, provides an efficient method of sending a long message from a first compute node to a second compute node across an interconnection network. In the first compute node, a message header field is set to a predetermined value and the message is sent. In the second compute node, the message header is received and processed, and a memory location is read in accordance with the contents of a base address register and an index register. Using Direct Memory Access, the message is then stored in memory at a storage address determined in accordance with the contents of the memory location. Preferably, the storage address is aligned on a memory page boundary.

Abstract: A method for producing a perforated mask for particle radiation includes calculating values of an elasticity of adjacent cells of a mask with respect to longitudinal and shear stresses in a main plane of the mask on a model of the desired pattern of mask openings. For the respective individual cells, length and direction of all the edge sections of the openings and cross-sectional areas of the openings are determined. Therefrom, statistical parameters are derived, which are used as a variable in preselected empirical functions to determine the elasticity values of the cells analytically. By linking the elasticity values determined with deformation forces to be expected, the vector field of a distortion of the mask to be expected is calculated by FE calculation. For cutting the mask openings into a blank, a pattern is selected that represents the desired pattern with a distortion being the inverse of the previously calculated distortion.