Patents by Inventor Frank W. Mont
Frank W. Mont has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9799555Abstract: Interconnects for a chip and methods of forming such interconnects. An opening is formed in a dielectric layer and a contact is formed in the opening. A metal cap is formed on a top surface of the contact. The contact is comprised of cobalt, and the metal cap covers the top surface of the contact.Type: GrantFiled: June 7, 2016Date of Patent: October 24, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: Xunyuan Zhang, Frank W. Mont
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Patent number: 9732427Abstract: The invention is directed to a composite polymer/nanoporous film system and methods of fabrication of tunable nanoporous coatings on flexible polymer substrates. The porosity of the nanoporous film can be tuned during fabrication to a desired value by adjusting the deposition conditions. Experiments show that SiO2 coatings with tunable porosity fabricated by oblique-angle electron beam deposition can be deposited on polymer substrates. These conformable coatings have many applications, including in the field of optics where the ability to fabricate tunable refractive index coatings on a variety of materials and shapes is of great importance.Type: GrantFiled: August 25, 2011Date of Patent: August 15, 2017Assignee: RENSSELAER POLYTECHNIC INSTITUTEInventors: David J. Poxson, Frank W. Mont, E. Fred Schubert, Richard W. Siegel
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Publication number: 20170133268Abstract: Chamferless via structures and methods of manufacture are provided. The method includes: forming at least one self-aligned via within at least dielectric material; plugging the at least one self-aligned via with material; forming a protective sacrificial mask over the material which plugs the at least one self-aligned via, after a recessing process; forming at least one trench within the dielectric material, with the protective sacrificial mask protecting the material during the trench formation; removing the protective sacrificial mask and the material within the at least one self-aligned via to form a wiring via; and filling the wiring via and the at least one trench with conductive material.Type: ApplicationFiled: January 23, 2017Publication date: May 11, 2017Applicant: GLOBALFOUNDRIES INC.Inventors: Mark L. LENHARDT, Frank W. MONT, Brown C. PEETHALA, Shariq SIDDIQUI, Jessica P. STRISS, Douglas M. TRICKETT
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Patent number: 9613862Abstract: Chamferless via structures and methods of manufacture are provided. The method includes: forming at least one self-aligned via within at least dielectric material; plugging the at least one self-aligned via with material; forming a protective sacrificial mask over the material which plugs the at least one self-aligned via, after a recessing process; forming at least one trench within the dielectric material, with the protective sacrificial mask protecting the material during the trench formation; removing the protective sacrificial mask and the material within the at least one self-aligned via to form a wiring via; and filling the wiring via and the at least one trench with conductive material.Type: GrantFiled: September 2, 2015Date of Patent: April 4, 2017Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, GLOBALFOUNDRIES INC.Inventors: Mark L. Lenhardt, Frank W. Mont, Brown C. Peethala, Shariq Siddiqui, Jessica P. Striss, Douglas M. Trickett
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Publication number: 20170084760Abstract: An anti-reflection coating has an average total reflectance of less than 10%, for example less than 5.9% such as from 4.9% to 5.9%, over a spectrum of wavelengths of 400-1100 nm and a range of angles of incidence of 0-90 degrees with respect to a surface normal of the anti-reflection coating. An anti-reflection coating has a total reflectance of less than 10%, for example less than 6% such as less than 4%, over an entire spectrum of wavelengths of 400-1600 nm and an entire range of angles of incidence of 0-70 degrees with respect to a surface normal of the anti-reflection coating.Type: ApplicationFiled: July 22, 2016Publication date: March 23, 2017Applicant: Rensselaer Polytechnic InstituteInventors: Sameer Chhajed, Jong Kyu Kim, Shawn-Yu Lin, Mei-Ling Kuo, Frank W. Mont, David J. Poxson, E. Fred Schubert, Martin F. Schubert
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Publication number: 20170062275Abstract: Chamferless via structures and methods of manufacture are provided. The method includes: forming at least one self-aligned via within at least dielectric material; plugging the at least one self-aligned via with material; forming a protective sacrificial mask over the material which plugs the at least one self-aligned via, after a recessing process; forming at least one trench within the dielectric material, with the protective sacrificial mask protecting the material during the trench formation; removing the protective sacrificial mask and the material within the at least one self-aligned via to form a wiring via; and filling the wiring via and the at least one trench with conductive material.Type: ApplicationFiled: September 2, 2015Publication date: March 2, 2017Inventors: Mark L. LENHARDT, Frank W. MONT, Brown C. PEETHALA, Shariq SIDDIQUI, Jessica P. STRISS, Douglas M. TRICKETT
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Publication number: 20170062331Abstract: Chamferless via structures and methods of manufacture are provided. The method includes: forming at least one self-aligned via within at least dielectric material; plugging the at least one self-aligned via with material; forming a protective sacrificial mask over the material which plugs the at least one self-aligned via, after a recessing process; forming at least one trench within the dielectric material, with the protective sacrificial mask protecting the material during the trench formation; removing the protective sacrificial mask and the material within the at least one self-aligned via to form a wiring via; and filling the wiring via and the at least one trench with conductive material.Type: ApplicationFiled: October 25, 2016Publication date: March 2, 2017Inventors: Mark L. LENHARDT, Frank W. MONT, Brown C. PEETHALA, Shariq SIDDIQUI, Jessica P. STRISS, Douglas M. TRICKETT
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Patent number: 9373543Abstract: A method includes forming a stack of materials including a first dielectric layer having a conductive feature positioned therein, and a second dielectric layer positioned above the first dielectric layer. An etch mask including a plurality of spaced apart mask elements is formed above the second dielectric layer. The mask elements define at least a first via opening exposing the second dielectric layer. A patterning layer is formed above the etch mask. A second via opening is formed in the patterning layer to expose the first via opening in the etch mask. The second dielectric layer is etched through the second via opening to define a third via opening in the second dielectric layer exposing the conductive feature. The patterning layer and the etch mask are removed. A conductive via contacting the conductive feature is formed in the third via opening.Type: GrantFiled: October 6, 2015Date of Patent: June 21, 2016Assignees: GLOBALFOUNDRIES Inc., International Business Machines CorporationInventors: Frank W. Mont, Shariq Siddiqui, Douglas M. Trickett, Brown Cornelius Peethala
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Publication number: 20150349147Abstract: A device having a broad-band, white incident angle range anti-reflection coating disclosed. The device includes a substrate having a first refractive index, at least one interference layer disposed on top of the substrate; and a gradient index optical layer. The gradient index optical layer has a gradient refractive index disposed on top of the at least one high index optical layer. The gradient index optical layer has a bottom refractive index at a bottom surface of the gradient index optical layer and a top refractive index at a top surface of the gradient index optical layer. The gradient refractive index of the gradient index optical layer decreases gradually from the bottom surface to the top surface. The at least one interference layer has a refractive index between the first refractive index of the substrate and the bottom refractive index of the gradient index optical layer.Type: ApplicationFiled: December 12, 2013Publication date: December 3, 2015Applicant: Raydex Technology, Inc.Inventors: Jingqun Xi, Frank W. Mont
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Publication number: 20130209780Abstract: The invention is directed to a composite polymer/nanoporous film system and methods of fabrication of tunable nanoporous coatings on flexible polymer substrates. The porosity of the nanoporous film can be tuned during fabrication to a desired value by adjusting the deposition conditions. Experiments show that SiO2 coatings with tunable porosity fabricated by oblique-angle electron beam deposition can be deposited on polymer substrates. These conformable coatings have many applications, including in the field of optics where the ability to fabricate tunable refractive index coatings on a variety of materials and shapes is of great importance.Type: ApplicationFiled: August 25, 2011Publication date: August 15, 2013Applicant: RENSSELAER POLYTECHNIC INSTITUTEInventors: David J. Poxson, Frank W. Mont, E. Fred Schubert, Richard W. Siegel
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Publication number: 20130021669Abstract: There is herein described an optical filter. The optical filter includes a substrate and a plurality of at least four optical thin film layers. The optical thin film layers are disposed on top of the substrate. Each of the optical thin film layers has an effective refractive index different from effective refractive indices of the immediate upper and lower optical thin film layers. At least one of the optical thin film layers is a thickness tunable nano-feature layer. The nano-feature layer contains a plurality of flexible nano-features. At least one of the optical thin film layers is a dense layer.Type: ApplicationFiled: July 21, 2011Publication date: January 24, 2013Applicant: RAYDEX TECHNOLOGY, INC.Inventors: Jingqun Xi, Frank W. Mont
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Publication number: 20110168261Abstract: Designs for ultra-high, broadband transmittance through windows over a wide range of incident angles are disclosed. The improvements in transmittance result from coating the windows with a new class of materials consisting of porous nanorods. A high transmittance optical window comprises a transparent substrate coated on one or both sides with a multiple layer coating. Each multiple layer coating includes optical films with a refractive index intermediate between the refractive index of the transparent substrate and air. The optical coatings are applied using an oblique-angle deposition material synthesis technique. The coating can be performed by depositing porous SiO2 layers using oblique angle deposition. The high transmittance window coated with the multiple layer coating exhibits reduced reflectance and improved transmittance, as compared to an uncoated transparent substrate.Type: ApplicationFiled: November 15, 2010Publication date: July 14, 2011Applicants: MAGNOLIA SOLAR, INC., RENNSELAER POLYTECHNIC INSTITUTEInventors: Roger E. Welser, Ashok K. Sood, David J. Poxson, Sameer Chhajed, Frank W. Mont, Jaehee Cho, E. Fred Schubert
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Publication number: 20110120554Abstract: An anti-reflection coating has an average total reflectance of less than 10%, for example less than 5.9% such as from 4.9% to 5.9%, over a spectrum of wavelengths of 400-1100 nm and a range of angles of incidence of 0-90 degrees with respect to a surface normal of the anti-reflection coating. An anti-reflection coating has a total reflectance of less than 10%, for example less than 6% such as less than 4%, over an entire spectrum of wavelengths of 400-1600 nm and an entire range of angles of incidence of 0-70 degrees with respect to a surface normal of the anti-reflection coating.Type: ApplicationFiled: March 27, 2009Publication date: May 26, 2011Inventors: Sameer Chhajed, Jong Kyu Kim, Shawn-Yu Lin, Mei-Ling Kuo, Frank W. Mont, David J. Poxson, E. Fred Schubert, Martin F. Schubert
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Publication number: 20100148199Abstract: A semiconductor light emitting device includes a semiconductor light emitting structure including first and second conductivity type semiconductor layers, and an active layer disposed therebetween, first and second electrodes connected to the first and second conductivity type semiconductor layers, respectively, and a fine pattern for light extraction, formed on a light emitting surface from which light generated from the active layer is emitted. The fine pattern for light extraction is formed as a graded refractive index layer having a refractive index which decreases with vertical distance from the light emitting surface.Type: ApplicationFiled: November 4, 2009Publication date: June 17, 2010Applicants: SAMSUNG LED CO., LTD., RENSSELAER POLYTECHNIC INSTITUTEInventors: Jong Kyu Kim, Frank W. Mont, Ahmed N. Noemaun, David J. Poxson, E. Fred Schubert, Hyunsoo Kim, Cheolsoo Sone