Patents by Inventor Franz Schrank
Franz Schrank has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11764109Abstract: A substrate is provided with a dielectric, a metal layer embedded in the dielectric, and a metallic layer arranged on the metal layer between the substrate and the metal layer. A via hole is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer is applied in the via hole and removed from above a contact area of the metal layer, and the metallic layer is completely removed from the contact area. A metallization is applied in the via hole on the contact area.Type: GrantFiled: April 3, 2019Date of Patent: September 19, 2023Assignee: AMS AGInventors: Jochen Kraft, Georg Parteder, Stefan Jessenig, Franz Schrank, Jörg Siegert
-
Patent number: 11460181Abstract: In an embodiment an LED module includes a support having at least two segments, wherein each segment is configured to emit light, wherein each segment has at least two light-emitting diodes that differ in terms of their colors, wherein the support has a multilayer structure and/or wherein the support has a substrate having a ceramic material and the ceramic material includes aluminum nitride, aluminum oxide or a varistor ceramic, and wherein the LED module is configured to set a brightness and a color of the emitted light separately for each segment.Type: GrantFiled: November 14, 2019Date of Patent: October 4, 2022Assignee: TDK ELECTRONICS AGInventors: Franz Schrank, Thomas Feichtinger
-
Publication number: 20220221363Abstract: In an embodiment a method for forming a pressure sensor device includes providing a pressure sensor on a substrate body, the pressure sensor comprising a membrane, depositing a top layer on top of the substrate body and the pressure sensor, connecting a cap body with the top layer, a mass of the cap body being approximately equal to a mass of the substrate body and introducing at least one opening in the cap body.Type: ApplicationFiled: March 30, 2022Publication date: July 14, 2022Inventors: Jörg Siegert, Willem Frederik Adrianus Besling, Coenraad Cornelis Tak, Martin Schrems, Franz Schrank
-
Patent number: 11367672Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.Type: GrantFiled: March 20, 2019Date of Patent: June 21, 2022Assignee: AMS AGInventors: Jochen Kraft, Georg Parteder, Anderson Pires Singulani, Raffaele Coppeta, Franz Schrank
-
Patent number: 11313749Abstract: In an embodiment a pressure sensor device includes a substrate body, a pressure sensor having a membrane and a cap body having at least one opening, wherein the pressure sensor is arranged between the substrate body and the cap body in a vertical direction which is perpendicular to a main plane of extension of the substrate body, and wherein the mass of the substrate body amounts to at least 80% of the mass of the cap body and at most 120% of the mass of the cap body.Type: GrantFiled: October 2, 2017Date of Patent: April 26, 2022Assignee: SCIOSENSE B.V.Inventors: Joerg Siegert, Willem Frederik Adrianus Besling, Coenraad Cornelis Tak, Martin Schrems, Franz Schrank
-
Patent number: 11271134Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench.Type: GrantFiled: October 15, 2018Date of Patent: March 8, 2022Assignee: AMS AGInventors: Gregor Toschkoff, Thomas Bodner, Franz Schrank, Miklos Labodi, Joerg Siegert, Martin Schrems
-
Publication number: 20220065431Abstract: In an embodiment an LED module includes a support having at least two segments, wherein each segment is configured to emit light, wherein each segment has at least two light-emitting diodes that differ in terms of their colors, wherein the support has a multilayer structure and/or wherein the support has a substrate having a ceramic material and the ceramic material includes aluminum nitride, aluminum oxide or a varistor ceramic, and wherein the LED module is configured to set a brightness and a color of the emitted light separately for each segment.Type: ApplicationFiled: November 14, 2019Publication date: March 3, 2022Inventors: Franz Schrank, Thomas Feichtinger
-
Patent number: 11139207Abstract: A method for manufacturing a semiconductor device comprises the steps of providing a semiconductor body with a main plane of extension, and forming a trench in the semiconductor body from a top side of the semiconductor body in a vertical direction which is perpendicular to the main plane of extension of the semiconductor body. The method further comprises the steps of coating inner walls of the trench with an isolation layer, depositing a metallization layer within the trench, and depositing a passivation layer within the trench such that an inner volume of the trench is free of any material, wherein inner surfaces that are adjacent to the inner volume are treated to be hydrophobic at least in places. Furthermore, a semiconductor device is provided.Type: GrantFiled: October 11, 2018Date of Patent: October 5, 2021Assignee: AMS AGInventors: Thomas Bodner, Stefan Jessenig, Franz Schrank
-
Patent number: 11127656Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via.Type: GrantFiled: February 14, 2018Date of Patent: September 21, 2021Assignee: AMS AGInventors: Jochen Kraft, Georg Parteder, Anderson Singulani, Raffaele Coppeta, Franz Schrank
-
Patent number: 11107848Abstract: The semiconductor device for detection of radiation comprises a semiconductor substrate (1) with a main surface (11), a dielectric layer (6) comprising at least one compound of a semiconductor material, an integrated circuit (2) including at least one component sensitive to radiation (3), a wiring (4) of the integrated circuit embedded in an intermetal layer (8) of the dielectric layer (6), an electrically conductive through-substrate via (5) contacting the wiring, and an optical filter element (7) arranged immediately on the dielectric layer above the component sensitive to radiation. The dielectric layer comprises a passivation layer (9) at least above the through-substrate via, the passivation layer comprises a dielectric material that is different from the intermetal layer (8), and the wiring is arranged between the main surface and the passivation layer.Type: GrantFiled: February 24, 2014Date of Patent: August 31, 2021Assignee: AMS AGInventors: Hubert Enichlmair, Franz Schrank, Joerg Siegert
-
Publication number: 20210175153Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.Type: ApplicationFiled: March 20, 2019Publication date: June 10, 2021Inventors: Jochen KRAFT, Georg PARTEDER, Anderson PIRES SINGULANI, Raffaele COPPETA, Franz SCHRANK
-
Patent number: 10943936Abstract: A method is proposed to produce an optical sensor at wafer-level, the methods comprises the following steps. A wafer is provided and has a main top surface and a main back surface. At or near the top surface of the wafer at least one integrated circuit is arranged having a light sensitive component. A first mold tool is placed over the at least one integrated circuit such that at least one channel remains between the first mold tool and the top surface to enter a first mold material. A first mold structure is formed by wafer-level molding the first mold material via the at least one channel. The first mold material creates at least one runner structure. A second mold tool is placed over the first mold structure and a second mold structure is formed by wafer-level molding a second mold material by means of the second mold tool. A light path blocking structure is arranged on the top surface to block light from entering via the at least one runner structure.Type: GrantFiled: August 8, 2017Date of Patent: March 9, 2021Assignee: AMS AGInventors: Gregor Toschkoff, Thomas Bodner, Franz Schrank
-
Publication number: 20210020511Abstract: A substrate is provided with a dielectric, a metal layer embedded in the dielectric, and a metallic layer arranged on the metal layer between the substrate and the metal layer. A via hole is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer is applied in the via hole and removed from above a contact area of the metal layer, and the metallic layer is completely removed from the contact area. A metallization is applied in the via hole on the contact area.Type: ApplicationFiled: April 3, 2019Publication date: January 21, 2021Inventors: Jochen Kraft, Georg Parteder, Stefan Jessenig, Franz Schrank, Jörg Siegert
-
Patent number: 10847664Abstract: An optical package is proposed comprising a carrier, an optoelectronic component, an aspheric lens, and a reflective layer. The carrier comprises electrical interconnections and the optoelectric component is arranged for emitting and/or detecting electromagnetic radiation in a specified wavelength range. Furthermore, the optoelectric component is mounted on the carrier or integrated into the carrier and electrically connected to the electric interconnections. The aspheric lens has an upper surface, a lateral surface, and a bottom surface and the bottom surface is arranged on or near the optoelectric component. The aspheric lens comprises a material which is at least transparent in the specified wavelength range. The reflective layer comprises a reflective material, wherein the reflective layer at least partly covers the lateral surface of the aspheric lens, and wherein the reflective material is at least partly reflective in the specified wavelength range.Type: GrantFiled: November 4, 2016Date of Patent: November 24, 2020Assignee: AMS AGInventors: David Mehrl, Thomas Bodner, Gregor Toschkoff, Harald Etschmaier, Franz Schrank
-
Publication number: 20200313031Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench.Type: ApplicationFiled: October 15, 2018Publication date: October 1, 2020Inventors: Gregor TOSCHKOFF, Thomas BODNER, Franz SCHRANK, Miklos LABODI, Joerg SIEGERT, Martin SCHREMS
-
Patent number: 10734534Abstract: A method of producing an optical sensor at wafer-level, comprising the steps of providing a wafer having a main top surface and a main back surface and arrange at or near the top surface of the wafer at least one first integrated circuit having at least one light sensitive component. Furthermore, providing in the wafer at least one through-substrate via for electrically contacting the top surface and back surface and forming a first mold structure by wafer-level molding a first mold material over the top surface of the wafer, such that the first mold structure at least partly encloses the first integrated circuit. Finally, forming a second mold structure by wafer-level molding a second mold material over the first mold structure, such that the second mold structure at least partly encloses the first mold structure.Type: GrantFiled: July 22, 2016Date of Patent: August 4, 2020Assignee: ams AGInventors: Harald Etschmaier, Gregor Toschkoff, Thomas Bodner, Franz Schrank
-
Publication number: 20200243387Abstract: A method for manufacturing a semiconductor device comprises the steps of providing a semiconductor body with a main plane of extension, and forming a trench in the semiconductor body from a top side of the semiconductor body in a vertical direction which is perpendicular to the main plane of extension of the semiconductor body. The method further comprises the steps of coating inner walls of the trench with an isolation layer, depositing a metallization layer within the trench, and depositing a passivation layer within the trench such that an inner volume of the trench is free of any material, wherein inner surfaces that are adjacent to the inner volume are treated to be hydrophobic at least in places. Furthermore, a semiconductor device is provided.Type: ApplicationFiled: October 11, 2018Publication date: July 30, 2020Inventors: Thomas BODNER, Stefan JESSENIG, Franz SCHRANK
-
Publication number: 20200168772Abstract: The invention relates to an illuminating device (1) comprising a substrate (2), a non-transparent spacer (4) which is connected to the substrate (2) so as to be hermetically sealed, an opening in the spacer (4), opposite said substrate (2), and an illumination element (3) positioned beneath the spacer (4) and beneath the opening, which element is connected to the substrate (2) so as to be hermetically sealed, characterized in that the opening in the spacer (4) is closed, so as to be hermetically sealed, by an optical element (5) consisting of a glass material the volume of which comprises at least one luminophore and thus constitutes a luminescent composite glass material.Type: ApplicationFiled: May 24, 2018Publication date: May 28, 2020Inventors: Steffen RIEMER, Franz SCHRANK, Patrick UITZ, Wilhelm BRUGGER, Thomas IRRAN
-
Patent number: 10644047Abstract: A top surface of a substrate is provided with a detection element for detecting electromagnetic radiation. A refractive element is formed by a portion of a cover element, which is attached to the substrate, so that the refractive element is arranged facing the detection element. The refractive element may be arranged within a recess of the cover element, so that a cavity is formed between the detection element and the refraction element.Type: GrantFiled: December 15, 2016Date of Patent: May 5, 2020Assignee: ams AGInventors: Jens Hofrichter, Franz Schrank, Joerg Siegert
-
Publication number: 20200020611Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via.Type: ApplicationFiled: February 14, 2018Publication date: January 16, 2020Inventors: Jochen Kraft, Georg Parteder, Anderson Singulani, Raffaele Coppeta, FRANZ SCHRANK