Patents by Inventor Franz Schrank

Franz Schrank has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11367672
    Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: June 21, 2022
    Assignee: AMS AG
    Inventors: Jochen Kraft, Georg Parteder, Anderson Pires Singulani, Raffaele Coppeta, Franz Schrank
  • Patent number: 11313749
    Abstract: In an embodiment a pressure sensor device includes a substrate body, a pressure sensor having a membrane and a cap body having at least one opening, wherein the pressure sensor is arranged between the substrate body and the cap body in a vertical direction which is perpendicular to a main plane of extension of the substrate body, and wherein the mass of the substrate body amounts to at least 80% of the mass of the cap body and at most 120% of the mass of the cap body.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: April 26, 2022
    Assignee: SCIOSENSE B.V.
    Inventors: Joerg Siegert, Willem Frederik Adrianus Besling, Coenraad Cornelis Tak, Martin Schrems, Franz Schrank
  • Patent number: 11271134
    Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: March 8, 2022
    Assignee: AMS AG
    Inventors: Gregor Toschkoff, Thomas Bodner, Franz Schrank, Miklos Labodi, Joerg Siegert, Martin Schrems
  • Publication number: 20220065431
    Abstract: In an embodiment an LED module includes a support having at least two segments, wherein each segment is configured to emit light, wherein each segment has at least two light-emitting diodes that differ in terms of their colors, wherein the support has a multilayer structure and/or wherein the support has a substrate having a ceramic material and the ceramic material includes aluminum nitride, aluminum oxide or a varistor ceramic, and wherein the LED module is configured to set a brightness and a color of the emitted light separately for each segment.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 3, 2022
    Inventors: Franz Schrank, Thomas Feichtinger
  • Patent number: 11139207
    Abstract: A method for manufacturing a semiconductor device comprises the steps of providing a semiconductor body with a main plane of extension, and forming a trench in the semiconductor body from a top side of the semiconductor body in a vertical direction which is perpendicular to the main plane of extension of the semiconductor body. The method further comprises the steps of coating inner walls of the trench with an isolation layer, depositing a metallization layer within the trench, and depositing a passivation layer within the trench such that an inner volume of the trench is free of any material, wherein inner surfaces that are adjacent to the inner volume are treated to be hydrophobic at least in places. Furthermore, a semiconductor device is provided.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: October 5, 2021
    Assignee: AMS AG
    Inventors: Thomas Bodner, Stefan Jessenig, Franz Schrank
  • Patent number: 11127656
    Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: September 21, 2021
    Assignee: AMS AG
    Inventors: Jochen Kraft, Georg Parteder, Anderson Singulani, Raffaele Coppeta, Franz Schrank
  • Patent number: 11107848
    Abstract: The semiconductor device for detection of radiation comprises a semiconductor substrate (1) with a main surface (11), a dielectric layer (6) comprising at least one compound of a semiconductor material, an integrated circuit (2) including at least one component sensitive to radiation (3), a wiring (4) of the integrated circuit embedded in an intermetal layer (8) of the dielectric layer (6), an electrically conductive through-substrate via (5) contacting the wiring, and an optical filter element (7) arranged immediately on the dielectric layer above the component sensitive to radiation. The dielectric layer comprises a passivation layer (9) at least above the through-substrate via, the passivation layer comprises a dielectric material that is different from the intermetal layer (8), and the wiring is arranged between the main surface and the passivation layer.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: August 31, 2021
    Assignee: AMS AG
    Inventors: Hubert Enichlmair, Franz Schrank, Joerg Siegert
  • Publication number: 20210175153
    Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.
    Type: Application
    Filed: March 20, 2019
    Publication date: June 10, 2021
    Inventors: Jochen KRAFT, Georg PARTEDER, Anderson PIRES SINGULANI, Raffaele COPPETA, Franz SCHRANK
  • Patent number: 10943936
    Abstract: A method is proposed to produce an optical sensor at wafer-level, the methods comprises the following steps. A wafer is provided and has a main top surface and a main back surface. At or near the top surface of the wafer at least one integrated circuit is arranged having a light sensitive component. A first mold tool is placed over the at least one integrated circuit such that at least one channel remains between the first mold tool and the top surface to enter a first mold material. A first mold structure is formed by wafer-level molding the first mold material via the at least one channel. The first mold material creates at least one runner structure. A second mold tool is placed over the first mold structure and a second mold structure is formed by wafer-level molding a second mold material by means of the second mold tool. A light path blocking structure is arranged on the top surface to block light from entering via the at least one runner structure.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: March 9, 2021
    Assignee: AMS AG
    Inventors: Gregor Toschkoff, Thomas Bodner, Franz Schrank
  • Publication number: 20210020511
    Abstract: A substrate is provided with a dielectric, a metal layer embedded in the dielectric, and a metallic layer arranged on the metal layer between the substrate and the metal layer. A via hole is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer is applied in the via hole and removed from above a contact area of the metal layer, and the metallic layer is completely removed from the contact area. A metallization is applied in the via hole on the contact area.
    Type: Application
    Filed: April 3, 2019
    Publication date: January 21, 2021
    Inventors: Jochen Kraft, Georg Parteder, Stefan Jessenig, Franz Schrank, Jörg Siegert
  • Patent number: 10847664
    Abstract: An optical package is proposed comprising a carrier, an optoelectronic component, an aspheric lens, and a reflective layer. The carrier comprises electrical interconnections and the optoelectric component is arranged for emitting and/or detecting electromagnetic radiation in a specified wavelength range. Furthermore, the optoelectric component is mounted on the carrier or integrated into the carrier and electrically connected to the electric interconnections. The aspheric lens has an upper surface, a lateral surface, and a bottom surface and the bottom surface is arranged on or near the optoelectric component. The aspheric lens comprises a material which is at least transparent in the specified wavelength range. The reflective layer comprises a reflective material, wherein the reflective layer at least partly covers the lateral surface of the aspheric lens, and wherein the reflective material is at least partly reflective in the specified wavelength range.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: November 24, 2020
    Assignee: AMS AG
    Inventors: David Mehrl, Thomas Bodner, Gregor Toschkoff, Harald Etschmaier, Franz Schrank
  • Publication number: 20200313031
    Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench.
    Type: Application
    Filed: October 15, 2018
    Publication date: October 1, 2020
    Inventors: Gregor TOSCHKOFF, Thomas BODNER, Franz SCHRANK, Miklos LABODI, Joerg SIEGERT, Martin SCHREMS
  • Patent number: 10734534
    Abstract: A method of producing an optical sensor at wafer-level, comprising the steps of providing a wafer having a main top surface and a main back surface and arrange at or near the top surface of the wafer at least one first integrated circuit having at least one light sensitive component. Furthermore, providing in the wafer at least one through-substrate via for electrically contacting the top surface and back surface and forming a first mold structure by wafer-level molding a first mold material over the top surface of the wafer, such that the first mold structure at least partly encloses the first integrated circuit. Finally, forming a second mold structure by wafer-level molding a second mold material over the first mold structure, such that the second mold structure at least partly encloses the first mold structure.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: August 4, 2020
    Assignee: ams AG
    Inventors: Harald Etschmaier, Gregor Toschkoff, Thomas Bodner, Franz Schrank
  • Publication number: 20200243387
    Abstract: A method for manufacturing a semiconductor device comprises the steps of providing a semiconductor body with a main plane of extension, and forming a trench in the semiconductor body from a top side of the semiconductor body in a vertical direction which is perpendicular to the main plane of extension of the semiconductor body. The method further comprises the steps of coating inner walls of the trench with an isolation layer, depositing a metallization layer within the trench, and depositing a passivation layer within the trench such that an inner volume of the trench is free of any material, wherein inner surfaces that are adjacent to the inner volume are treated to be hydrophobic at least in places. Furthermore, a semiconductor device is provided.
    Type: Application
    Filed: October 11, 2018
    Publication date: July 30, 2020
    Inventors: Thomas BODNER, Stefan JESSENIG, Franz SCHRANK
  • Publication number: 20200168772
    Abstract: The invention relates to an illuminating device (1) comprising a substrate (2), a non-transparent spacer (4) which is connected to the substrate (2) so as to be hermetically sealed, an opening in the spacer (4), opposite said substrate (2), and an illumination element (3) positioned beneath the spacer (4) and beneath the opening, which element is connected to the substrate (2) so as to be hermetically sealed, characterized in that the opening in the spacer (4) is closed, so as to be hermetically sealed, by an optical element (5) consisting of a glass material the volume of which comprises at least one luminophore and thus constitutes a luminescent composite glass material.
    Type: Application
    Filed: May 24, 2018
    Publication date: May 28, 2020
    Inventors: Steffen RIEMER, Franz SCHRANK, Patrick UITZ, Wilhelm BRUGGER, Thomas IRRAN
  • Patent number: 10644047
    Abstract: A top surface of a substrate is provided with a detection element for detecting electromagnetic radiation. A refractive element is formed by a portion of a cover element, which is attached to the substrate, so that the refractive element is arranged facing the detection element. The refractive element may be arranged within a recess of the cover element, so that a cavity is formed between the detection element and the refraction element.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: May 5, 2020
    Assignee: ams AG
    Inventors: Jens Hofrichter, Franz Schrank, Joerg Siegert
  • Publication number: 20200020611
    Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via.
    Type: Application
    Filed: February 14, 2018
    Publication date: January 16, 2020
    Inventors: Jochen Kraft, Georg Parteder, Anderson Singulani, Raffaele Coppeta, FRANZ SCHRANK
  • Patent number: 10468541
    Abstract: A dielectric layer (2) is arranged on the main surface (10) of a semiconductor substrate (1), and a passivation layer (6) is arranged on the dielectric layer. A metal layer (3) is embedded in the dielectric layer above an opening (12) in the substrate, and a metallization (14) is arranged in the opening. The metallization contacts the metal layer and forms a through-substrate via to a rear surface (11) of the substrate. A layer or layer sequence (7, 8, 9) comprising at least one further layer is arranged on the passivation layer above the opening. In this way the bottom of the through-substrate via is stabilized. A plug (17) may additionally be arranged in the opening without filling the opening.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: November 5, 2019
    Assignee: ams AG
    Inventors: Franz Schrank, Sara Carniello, Hubert Enichlmair, Jochen Kraft, Bernhard Loeffler, Rainer Holzhaider
  • Publication number: 20190265119
    Abstract: A pressure sensor device comprises a substrate body, a pressure sensor comprising a membrane, and a cap body comprising at least one opening. The pressure sensor is arranged between the substrate body and the cap body in a vertical direction which is perpendicular to the main plane of extension of the substrate body, and the mass of the substrate body equals approximately the mass of the cap body. Furthermore, a method for forming a pressure sensor device is provided.
    Type: Application
    Filed: October 2, 2017
    Publication date: August 29, 2019
    Inventors: Joerg Siegert, Willem Frederik Adrianus Besling, Coenraad Cornelis Tak, Martin SCHREMS, FRANZ SCHRANK
  • Patent number: 10340254
    Abstract: The method of producing an interposer-chip-arrangement, comprises providing an interposer (1) with an integrated circuit (25), arranging a dielectric layer (2) with metal layers embedded in the dielectric layer above a main surface (10) of the interposer, connecting the integrated circuit with at least one of the metal layers, forming an interconnection (7) through the interposer, the interconnection contacting one of the metal layers, arranging a further dielectric layer (3) above a further main surface (11) of the interposer opposite the main surface and arranging a further metal layer in or on the further dielectric layer, the further metal layer being connected with the interconnection, arranging a chip provided with at least one contact pad at the main surface or at the further main surface, and electrically conductively connecting the contact pad with the interconnection.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: July 2, 2019
    Assignee: ams AG
    Inventors: Jochen Kraft, Martin Schrems, Franz Schrank