Abstract: The photodiode device has an electrically conductive cathode layer (3) at a photodiode layer (4) composed of a semiconductor material. Doped anode regions (5) are situated at a top side of the photodiode layer facing away from the cathode layer. A trench (14) subdivides the photodiode layer. A conductor layer (7) is arranged in or at the trench and electrically conductively connects the cathode layer with a cathode connection (11). Anode connections (12) are electrically conductively connected with the anode regions.

Abstract: The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1), a further semiconductor wafer (2), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (3), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer (6) arranged on the further semiconductor wafer (2) and a metal layer connecting the contact layer with an integrated circuit.

Abstract: A semiconductor substrate (1) is provided on a main surface (14) with an intermetal dielectric (4) including metal planes (5) and on an opposite rear surface (15) with an insulation layer (2) and an electrically conductive connection pad (7). An etch stop layer (6) is applied on the intermetal dielectric to prevent a removal of the intermetal dielectric above the metal planes during subsequent method steps. An opening (9) having a side wall (3) and a bottom (13) is formed from the main surface through the substrate above the connection pad. A side wall spacer (10) is formed on the side wall by a production and subsequent partial removal of a dielectric layer (11). The insulation layer is removed from the bottom to uncover an area of the connection pad. A metal layer is applied in the opening and is provided for an interconnect through the substrate.

Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for three dimensional integration is offered by this scheme.

Abstract: Through the intermetal dielectric (2) and the semiconductor material of the substrate (1) a contact hole is formed, and a contact area of a connection metal plane (3) that faces the substrate is exposed in the contact hole. A metallization (11) is applied, which forms a connection contact (12) on the contact area, a through-contact (13) in the contact hole and a connection contact (20) on a contact area facing away from the substrate and/or on a vertical conductive connection (15) of the upper metal plane (24).

Abstract: In an insulation layer of an SOI substrate, a connection pad is arranged. A contact hole opening above the connection pad is provided on side walls and on the connection pad with a metallization that is contacted on top side with a top metal.

Abstract: A semiconductor substrate (1) is provided on a main surface (14) with an intermetal dielectric (4) including metal planes (5) and on an opposite rear surface (15) with an insulation layer (2) and an electrically conductive connection pad (7). An etch stop layer (6) is applied on the intermetal dielectric to prevent a removal of the intermetal dielectric above the metal planes during subsequent method steps. An opening (9) having a side wall (3) and a bottom (13) is formed from the main surface through the substrate above the connection pad. A side wall spacer (10) is formed on the side wall by a production and subsequent partial removal of a dielectric layer (11). The insulation layer is removed from the bottom to uncover an area of the connection pad. A metal layer is applied in the opening and is provided for an interconnect through the substrate.

Abstract: The photodiode device has an electrically conductive cathode layer (3) at a photodiode layer (4) composed of a semiconductor material. Doped anode regions (5) are situated at a top side of the photodiode layer facing away from the cathode layer. A trench (14) subdivides the photodiode layer. A conductor layer (7) is arranged in or at the trench and electrically conductively connects the cathode layer with a cathode connection (11). Anode connections (12) are electrically conductively connected with the anode regions.

Abstract: An opening (9) is made in the substrate (1) over a terminal pad (7). A dielectric layer (10), a metallization (11), a compensation layer (13) and a passivation layer (15) are deposited so that the passivation layer is separated from the metallization by the compensation layer at least within the opening. A material that is suitable for reducing a mechanical stress between the metallization and the passivation layer is chosen for the compensation layer.

Abstract: A connection contact layer (4) is disposed between semiconductor bodies (1,2). In the second semiconductor body (2), a recess is provided. A connection layer (7) on the top face extends as far as the recess, in which a metallization (10) is present that conductively connects the connection contact layer (4) to the connection layer (7) in an electrical manner. A polymer (8) or a further metallization is present in the recess.

Abstract: SiO2 layers are used as adhesion layers in the case of optoelectronic components. Durable adhesions can be produced with silicone rubbers. These materials normally have only an insufficient adhesive strength on materials as frequently used for optoelectronic components, such as LED modules. This then leads in further consequence to a clear reduction of the operating life of the manufactured components. These restrictions are avoided effectively by the use of the adhesion layers, endurance upon operation in damp surroundings and upon temperature change loading is substantially improved.

Abstract: Through the intermetal dielectric (2) and the semiconductor material of the substrate (1) a contact hole is formed, and a contact area of a connection metal plane (3) that faces the substrate is exposed in the contact hole. A metallization (11) is applied, which forms a connection contact (12) on the contact area, a through-contact (13) in the contact hole and a connection contact (20) on a contact area facing away from the substrate and/or on a vertical conductive connection (15) of the upper metal plane (24).

Abstract: The invention relates to a device for coating a surface of a wafer. The device includes a retaining system for placing the wafer on a retaining surface, a nozzle system for coating the wafer in a Z-direction, and a ring having an inside periphery that surrounds a side periphery of the wafer (2), wherein the ring can be arranged for expanding a coating surface when coating the wafer.

Abstract: A method, in which a first isolating trench, filled with a dielectric material, and a second conducting trench, filled with an electrically conductive material, can be produced. To this end, the first and second trenches are etched with different trench widths, so that the first trench is filled completely with the dielectric material after a deposition of a dielectric layer over the entire surface with the edges covered, whereas the wider second trench is covered by the dielectric layer only on the inside walls. By anisotropic back-etching of the dielectric layer, the semiconductor substrate is exposed at the bottom of the second trench. Subsequently, the second trench is filled with an electrically conductive material and then represents a low-ohmic connection from the substrate surface to the buried structure located below the second trench.

Abstract: The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.

Abstract: An MEMS microphone is bonded onto the surface of an IC component containing at least one integrated circuit suitable for the conditioning and processing of the electrical signal supplied by the MEMS microphone. The entire component is simple to produce and has a compact and space-saving construction. Production is accomplished in a simple and reliable manner.

Abstract: A connection contact layer (4) is disposed between semiconductor bodies (1,2). In the second semiconductor body (2), a recess is provided. A connection layer (7) on the top face extends as far as the recess, in which a metallization (10) is present that conductively connects the connection contact layer (4) to the connection layer (7) in an electrical manner. A polymer (8) or a further metallization is present in the recess.

Abstract: A microphone arrangement comprises a stack arrangement (1) which comprises a first semiconductor body (10) having a microphone structure (13) and a second semiconductor body (80). The second semiconductor body (80) comprises a first main face (81) on which an integrated circuit (83) is arranged and a second main face (82) which faces the first semiconductor body (10).

Abstract: A semiconductor circuit in a semiconductor body and a wafer bonding method for connecting the semiconductor circuit to another substrate, in which a diode is realized in a laminar structure. The semiconductor circuit is connected to the terminals of the diode by means of feedthroughs that extend through the semiconductor body.

Abstract: A micromechanical component that can be produced in an integrated thin-film method is disclosed, which component can be produced and patterned on the surface of a substrate as multilayer construction. At least two metal layers that are separated from the substrate and with respect to one another by interlayers are provided for the multilayer construction. Electrically conductive connecting structures provide for an electrical contact of the metal layers among one another and with a circuit arrangement arranged in the substrate. The freely vibrating membrane that can be used for an inertia sensor, a microphone or an electrostatic switch can be provided with matching and passivation layers on all surfaces in order to improve its mechanical properties, said layers being concomitantly deposited and patterned during the layer producing process or during the construction of the multilayer construction. Titanium nitride layers are advantageously used for this.