Patents by Inventor Franz Schrank

Franz Schrank has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110260284
    Abstract: In the insulation layer (2) of an SOI substrate (1), a connection pad (7) is arranged. A contact hole opening (9) above the connection pad is provided on side walls and on the connection pad with a metallization (11) that is contacted on the top side with a top metal (12).
    Type: Application
    Filed: June 25, 2009
    Publication date: October 27, 2011
    Applicant: AUSTRIAMICROSYSTEMS AG
    Inventors: Franz Schrank, Günther Koppitsch, Michael Beutl, Sara Carniello, Jochen Kraft
  • Patent number: 7923792
    Abstract: An MEMS sensor constructed on a base chip and having a capacitive mode of operation is disclosed. The MEMS sensor has a patterned layer construction applied on the base chip. A cutout is produced in the layer construction, the moveable electrode, for example a membrane, being arranged in said cutout. The cutout is spanned by a covering layer, which bears on the layer construction around the cutout and comprises the back electrode.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: April 12, 2011
    Assignee: austruamicrosystems AG
    Inventor: Franz Schrank
  • Patent number: 7898052
    Abstract: A component comprising a semiconductor junction (HU) is proposed which is formed from crystalline doped semiconductor layers. A semiconductor circuit (IC) is formed on the surface of the component, and a diode is formed internally and directly below the circuit. Integrated circuit and diode are connected to one another and formed and integrated diode component, in particular a photodiode array.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: March 1, 2011
    Assignee: Austriamicrosystems AG
    Inventors: Anton Prantl, Franz Schrank, Rainer Stowasser
  • Publication number: 20100314762
    Abstract: The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.
    Type: Application
    Filed: July 23, 2008
    Publication date: December 16, 2010
    Applicant: austriamicrosystems AG
    Inventors: Franz Schrank, Martin Schrems, Jochen Kraft
  • Publication number: 20100237766
    Abstract: An LED module, selectively comprising at least zero, one, or a plurality of LEDs from Group B and/or Group G and/or Group R and at least one or more LEDs from Group P. The concentration of phosphors/phosphor mixtures of the LEDs in Group P is selected such that the photometric efficiency (lm/W) thereof is at or near the maximum as a function of the CIE x-coordinates.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 23, 2010
    Applicant: LUMITECH PRODUKTION UND ENTWICKLUNG GMBH
    Inventors: Erwin BAUMGARTNER, Franz SCHRANK
  • Publication number: 20100193893
    Abstract: A semiconductor circuit in a semiconductor body and a wafer bonding method for connecting the semiconductor circuit to another substrate, in which a diode is realized in a laminar structure. The semiconductor circuit is connected to the terminals of the diode by means of that extend through the semiconductor body.
    Type: Application
    Filed: May 23, 2006
    Publication date: August 5, 2010
    Inventors: Gerald Meinhardt, Franz Schrank, Verena Vescoli
  • Publication number: 20100144114
    Abstract: A method, in which a first isolating trench, filled with a dielectric material, and a second conducting trench, filled with an electrically conductive material, can be produced. To this end, the first and second trenches are etched with different trench widths, so that the first trench is filled completely with the dielectric material after a deposition of a dielectric layer over the entire surface with the edges covered, whereas the wider second trench is covered by the dielectric layer only on the inside walls. By anisotropic back-etching of the dielectric layer, the semiconductor substrate is exposed at the bottom of the second trench. Subsequently, the second trench is filled with an electrically conductive material and then represents a low-ohmic connection from the substrate surface to the buried structure located below the second trench.
    Type: Application
    Filed: October 22, 2007
    Publication date: June 10, 2010
    Applicant: austriamicroystems AG
    Inventors: Hubert Enichlmair, Martin Schrems, Franz Schrank
  • Publication number: 20100123254
    Abstract: An opening (9) is made in the substrate (1) over a terminal pad (7). A dielectric layer (10), a metallization (11), a compensation layer (13) and a passivation layer (15) are deposited so that the passivation layer is separated from the metallization by the compensation layer at least within the opening. A material that is suitable for reducing a mechanical stress between the metallization and the passivation layer is chosen for the compensation layer.
    Type: Application
    Filed: November 18, 2009
    Publication date: May 20, 2010
    Applicant: austriamicrosystems AG
    Inventors: Jochen Kraft, Franz Schrank
  • Publication number: 20090309171
    Abstract: An MEMS sensor constructed on a base chip and having a capacitive mode of operation is disclosed. The MEMS sensor has a patterned layer construction applied on the base chip. A cutout is produced in the layer construction, the moveable electrode, for example a membrane, being arranged in said cutout. The cutout is spanned by a covering layer, which bears on the layer construction around the cutout and comprises the back electrode.
    Type: Application
    Filed: January 10, 2007
    Publication date: December 17, 2009
    Applicant: Austriamicrosystems AG
    Inventor: Franz Schrank
  • Publication number: 20090212378
    Abstract: The method serves for producing a micromechanical structure element (13) on or in a crystal substrate (3), wherein the micromechanical structure element (13) is arranged in vibratable fashion in a recess (4) of the crystal substrate (3) and is connected to the crystal substrate (3) by means of a web (15), comprising the following steps: providing the crystal substrate (3); depositing an etching mask layer (1); locally removing the etching mask layer (1), such that the remaining etching mask layer (1) has a border (8) extending at a predeterminable angle ? of less than 180° on both sides of a connection region (19) of the web (15) to the crystal substrate (3), and etching the crystal substrate (3) in order to form the recess (4) and the micromechanical structure element (13). What is thereby achieved is that an uncovered crystal plane (7) runs through the connection region (19).
    Type: Application
    Filed: May 19, 2006
    Publication date: August 27, 2009
    Applicant: AUSTRIAMICROSYSTEMS AG
    Inventor: Franz Schrank
  • Patent number: 7524337
    Abstract: An electrical component having a base body includes a layer stack of mutually overlapping, electrically conductive electrode layers that are separated from one another by electrically conductive ceramic layers. The electrically conductive ceramic layers are composed of a ceramic whose specific electrical resistance exhibits a negative temperature coefficient. The electrically conductive ceramic layers are produced of ceramic green films that are sintered in common with the electrode layers, and outside electrodes that are electrically conductively connected to the electrode layers are arranged at two opposite outside surfaces of the base body. A method for the manufacture of the component and to the employment of the component is also provided.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: April 28, 2009
    Assignee: EPCOS AG
    Inventors: Ingrid Rosc, legal representative, Berrit Ines Rosc, legal representative, Jördis Brit Rosc, legal representative, Franz Schrank, Gerald Kloiber, Friedrich Rosc
  • Publication number: 20090041270
    Abstract: An MEMS microphone is bonded onto the surface of an IC component containing at least one integrated circuit suitable for the conditioning and processing of the electrical signal supplied by the MEMS microphone. The entire component is simple to produce and has a compact and space-saving construction. Production is accomplished in a simple and reliable manner.
    Type: Application
    Filed: October 12, 2005
    Publication date: February 12, 2009
    Applicant: austriamicrosystems AG
    Inventors: Franz Schrank, Martin Schrems
  • Publication number: 20090014819
    Abstract: A micromechanical component that can be produced in an integrated thin-film method is disclosed, which component can be produced and patterned on the surface of a substrate as multilayer construction. At least two metal layers that are separated from the substrate and with respect to one another by interlayers are provided for the multilayer construction. Electrically conductive connecting structures provide for an electrical contact of the metal layers among one another and with a circuit arrangement arranged in the substrate. The freely vibrating membrane that can be used for an inertia sensor, a microphone or an electrostatic switch can be provided with matching and passivation layers on all surfaces in order to improve its mechanical properties, said layers being concomitantly deposited and patterned during the layer producing process or during the construction of the multilayer construction. Titanium nitride layers are advantageously used for this.
    Type: Application
    Filed: March 28, 2006
    Publication date: January 15, 2009
    Inventors: Bernhard Loeffler, Franz Schrank
  • Patent number: 7430797
    Abstract: An method for manufacturing an electrical component comprises providing a base body of a ceramic material with at least two contact regions with terminal elements secured thereto. The base body is immersed into a solution that contains a fluid that wets the base body and a hydrophobic and lipophobic intermediate layer material dissolved in the fluid. The base body is removed from the solution so that a part of the solution remains adhering thereto as a film that completely envelopes the base body. An intermediate layer is produced by evaporating the fluid contained in the film, and a protective layer is applied onto the intermediate layer.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: October 7, 2008
    Assignee: EPCOS AG
    Inventors: Roland Peinsipp, Franz Schrank
  • Publication number: 20080211051
    Abstract: A component comprising a semiconductor junction (HU) is proposed which is formed from crystalline doped semiconductor layers. A semiconductor circuit (IC) is formed on the surface of the component, and a diode is formed internally and directly below the circuit. Integrated circuit and diode are connected to one another and formed and integrated diode component, in particular a photodiode array.
    Type: Application
    Filed: November 28, 2005
    Publication date: September 4, 2008
    Inventors: Anton Prantl, Franz Schrank, Rainer Stowasser
  • Publication number: 20080203413
    Abstract: SiO2 layers are used as adhesion layers in the case of optoelectronic components. Durable adhesions can be produced with silicone rubbers. These materials normally have only an insufficient adhesive strength on materials as frequently used for optoelectronic components, such as LED modules. This then leads in further consequence to a clear reduction of the operating life of the manufactured components. These restrictions are avoided effectively by the use of the adhesion layers, endurance upon operation in damp surroundings and upon temperature change loading is substantially improved.
    Type: Application
    Filed: June 8, 2006
    Publication date: August 28, 2008
    Applicants: TridonicAtco Optoelectronics GmbH, Lumitech Produktion und Entwicklung GmbH
    Inventors: Franz Schrank, Peter Pachler
  • Publication number: 20080197443
    Abstract: An SOI substrate comprising a carrier substrate, a dielectric layer and a semiconductor layer. A continuous pn junction is realized in the semiconductor layer, which pn junction can be produced by applying differently doped partial layers on the SOI substrate. In this way, it is possible to use an SOI substrate for producing semiconductor components and, in particular, rear side diodes.
    Type: Application
    Filed: November 9, 2005
    Publication date: August 21, 2008
    Inventors: Franz Schrank, Rainer Stowasser
  • Publication number: 20080137886
    Abstract: A microphone arrangement comprises a stack arrangement (1) which comprises a first semiconductor body (10) having a microphone structure (13) and a second semiconductor body (80). The second semiconductor body (80) comprises a first main face (81) on which an integrated circuit (83) is arranged and a second main face (82) which faces the first semiconductor body (10).
    Type: Application
    Filed: October 5, 2007
    Publication date: June 12, 2008
    Applicant: austsriamicrosystems AG
    Inventor: Franz Schrank
  • Publication number: 20070175019
    Abstract: An electrical component having a base body includes a layer stack of mutually overlapping, electrically conductive electrode layers that are separated from one another by electrically conductive ceramic layers. The electrically conductive ceramic layers are composed of a ceramic whose specific electrical resistance exhibits a negative temperature coefficient. The electrically conductive ceramic layers are produced of ceramic green films that are sintered in common with the electrode layers, and outside electrodes that are electrically conductively connected to the electrode layers are arranged at two opposite outside surfaces of the base body. A method for the manufacture of the component and to the employment of the component is also provided.
    Type: Application
    Filed: April 9, 2007
    Publication date: August 2, 2007
    Inventors: Igrid Rosc, Berrit Rosc, Jordis Rosc, Franz Schrank, Gerald Kloiber
  • Patent number: 7215236
    Abstract: An electrical component having a base body includes a layer stack of mutually overlapping, electrically conductive electrode layers that are separated from one another by electrically conductive ceramic layers. The electrically conductive ceramic layers are composed of a ceramic whose specific electrical resistance exhibits a negative temperature coefficient. The electrically conductive ceramic layers are produced of ceramic green films that are sintered in common with the electrode layers, and outside electrodes that are electrically conductively connected to the electrode layers are arranged at two opposite outside surfaces of the base body. A method for the manufacture of the component and to the employment of the component is also provided.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: May 8, 2007
    Assignee: EPCOS AG
    Inventors: Ingrid Rosc, legal representative, Berrit Ines Rosc, legal representative, Jördis Brit Rosc, legal representative, Franz Schrank, Gerald Kloiber, Friedrich Rosc, deceased