Patents by Inventor Freeman L. Rawson, III

Freeman L. Rawson, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9494991
    Abstract: A method for managing energy. A processor unit identifies a plurality of groups of virtual machines in a computer system. The processor unit allocates the energy in the computer system to the plurality of groups of virtual machines based on a policy.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: November 15, 2016
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Arndt, Freeman L. Rawson, III
  • Patent number: 9477286
    Abstract: An embodiment of a system for managing energy identifies a plurality of groups of virtual machines in a computer system and allocates the energy in the computer system for a next time interval to a plurality of groups of virtual machines based on an energy budget and a policy selected from a set of policies in conjunction with a minimum energy, a group priority and a virtual machine priority.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: October 25, 2016
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Arndt, Freeman L. Rawson, III
  • Patent number: 9292662
    Abstract: A method, system, and computer program product for reducing power and energy consumption in a server system with multiple processor cores is disclosed. The system may include an operating system for scheduling user workloads among a processor pool. The processor pool may include active licensed processor cores and inactive unlicensed processor cores. The method and computer program product may reduce power and energy consumption by including steps and sets of instructions activating spare cores and adjusting the operating frequency of processor cores, including the newly activated spare cores to provide equivalent computing resources as the original licensed cores operating at a specified clock frequency.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: March 22, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Elmootazbellah N. Elnozahy, Heather L. Hanson, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 9081606
    Abstract: A processor includes a processor core, a cache, and a tracker. The processor core is configured to execute persistent write instructions and receive notifications of completed persistent write instructions. The tracker is configured to track the completion state of a persistent write instruction.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: July 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Gary D. Carpenter, Stefanie R. Chiras, Alexandre P. Ferreira, Jente B. Kuang, Karthick Rajamani, Freeman L. Rawson, III
  • Patent number: 9027021
    Abstract: A mechanism is provided in a logically partitioned data processing system for controlling depth and latency of exit of a virtual processor's idle state. A virtualization layer generates a cede latency setting information (CLSI) data. Responsive to booting a logical partition, the virtualization layer communicates the CLSI data to an operating system (OS) of the logical partition. The OS determines, based on the CLSI data, a particular idle state of a virtual processor under a control of the OS. Responsive to the OS calling the virtualization layer, the OS communicates the particular idle state of the virtual processor to the virtualization layer for assigning the particular idle state and wake-up characteristics to the virtual processor.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: May 5, 2015
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Arndt, Naresh Nayar, Christopher Francois, Karthick Rajamani, Freeman L. Rawson, III, Randal C. Swanberg
  • Patent number: 9026818
    Abstract: A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: May 5, 2015
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Heather L. Hanson, Charles Robert Lefurgy, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 8892916
    Abstract: Mechanisms for dynamically managing core pools are provided. The mechanisms measure the amount of a computational load on a computing device. One way of measuring the load may consist of executing a number of instructions, in a unit of time, with numerous cores of the computing device. The mechanisms compare the number of instructions executed with specific thresholds. Depending on whether the number of instructions is higher or lower than the thresholds, the computing devices may respond by activating and deactivating cores of the computing devices. By limiting execution of instructions of the computing device to a smaller number of cores and switching one or more cores to a lower power state, the devices may conserve power.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Andreas Bieswanger, Andrew Geissler, Hye-Young McCreary, Freeman L. Rawson, III
  • Publication number: 20140136786
    Abstract: A processor includes a processor core, a cache, and a tracker. The processor core is configured to execute persistent write instructions and receive notifications of completed persistent write instructions. The tracker is configured to track the completion state of a persistent write instruction.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 15, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary D. Carpenter, Stefanie R. Chiras, Alexandre P. Ferreira, Jente B. Kuang, Karthick Rajamani, Freeman L. Rawson, III
  • Patent number: 8707074
    Abstract: A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: April 22, 2014
    Assignee: International Business Machines Corporation
    Inventors: Heather L. Hanson, Charles R. Lefurgy, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 8677160
    Abstract: Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: March 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 8595721
    Abstract: A mechanism is provided for temporarily allocating dedicated processors to a shared processor pool. A virtual machine monitor determines whether a temporary allocation associated with an identified dedicated processor is long-term or short-term. Responsive to the temporary allocation being long-term, the virtual machine monitor determines whether an operating frequency of the identified dedicated processor is within a predetermined threshold of an operating frequency of one or more operating systems utilizing the shared processor pool. Responsive to the operating frequency of the identified dedicated processor failing to be within the predetermined threshold, the virtual machine monitor either increases or decreases the frequency of the identified dedicated processor to be within the predetermined threshold of the operating frequency of the one or more operating systems utilizing the shared processor pool and temporarily allocates the identified dedicated processor to the shared processor pool.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: November 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: Naresh Nayar, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 8589556
    Abstract: A mechanism is provided for allocating energy budgets to a plurality of logical partitions. An overall energy budget for the data processing system and a total of a set of requested initial energy budgets for the plurality of partitions are determined. A determination is made as to whether the total of the set of requested initial energy budgets for the plurality of partitions is greater than the overall energy budget for the data processing system. Responsive to the total of the set of requested initial energy budgets exceeding the overall energy budget, an initial energy budget is allocated to each partition in the plurality of partitions based on at least one of priority or proportionality of each partition in the plurality of partitions such that a total of the initial energy budgets for the plurality of partitions does not exceed the overall energy budget of the data processing system.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: November 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Arndt, Heather L. Hanson, Charles R. Lefurgy, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 8448006
    Abstract: A mechanism is provided for directed resource folding for power management. The mechanism receives a set of static platform characteristics and a set of dynamic platform characteristics for a set of resources associated with the data processing system thereby forming characteristic information. The mechanism determines whether one or more conditions have been met for each resource in the set of resources using the characteristic information. Responsive to the one or more conditions being met, the mechanism performs a resource optimization to determine at least one of a first subset of resources in the set of resources to keep active and a second subset of resources in the set of resources to dynamically fold. Based on the resource optimization, the mechanism performs either a virtual resource optimization to optimally schedule the first subset of resources or a physical resource optimization to dynamically fold the second subset of resources.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: Michael S. Floyd, Christopher Francois, Naresh Nayar, Karthick Rajamani, Freeman L. Rawson, III, Randal C. Swanberg, Malcolm S. Ware
  • Patent number: 8423811
    Abstract: A mechanism is provided for transparently consolidating resources of logical partitions. Responsive to the existence of the non-folded resource on an originating resource chip, the virtualization mechanism determines whether there is a destination resource chip to either exchange operations of the non-folded resource with a folded resource on the destination chip or migrate operations of the non-folded resource to a non-folded resource on the destination chip. Responsive to the existence of the folded resource on the destination resource chip, the virtualization mechanism transparently exchanges the operations of the non-folded resource from the originating resource chip to the folded resource on the destination resource chip, where the folded resource remains folded on the originating resource chip after the exchange. Responsive to the absence of another non-folded resource on the originating resource chip, the vitalization mechanism places the originating resource chip into a deeper power saving mode.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: April 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Naresh Nayar, Karthik Rajamani, Freeman L. Rawson, III
  • Patent number: 8381004
    Abstract: A mechanism is provided for scheduling application tasks. A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Elmootazbellah N. Elnozahy, Heather L. Hanson, Freeman L. Rawson, III, Malcolm S. Ware
  • Patent number: 8381005
    Abstract: A method, system and computer-usable medium are disclosed for managing power consumption in information processing systems. Processing resources are successively folded, allowing them to be placed into deeper and deeper power saving states while maintaining the ability to respond to new processing loads without exposing the latency of the deeper power saving states as they are unfolded. Before a deeper power saving state can be used, there must be sufficient processing resources in the prior power saving state to mask the latency of bringing a processing resource out of the deeper power saving state.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Arndt, Naresh Nayar, Freeman L. Rawson, III, Randal C. Swanberg
  • Patent number: 8381002
    Abstract: A mechanism is provided for transparently consolidating resources of logical partitions. Responsive to the existence of the non-folded resource on an originating resource chip, the virtualization mechanism determines whether there is a destination resource chip to either exchange operations of the non-folded resource with a folded resource on the destination chip or migrate operations of the non-folded resource to a non-folded resource on the destination chip. Responsive to the existence of the folded resource on the destination resource chip, the virtualization mechanism transparently exchanges the operations of the non-folded resource from the originating resource chip to the folded resource on the destination resource chip, where the folded resource remains folded on the originating resource chip after the exchange. Responsive to the absence of another non-folded resource on the originating resource chip, the vitalization mechanism places the originating resource chip into a deeper power saving mode.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Naresh Nayar, Karthick Rajamani, Freeman L. Rawson, III
  • Publication number: 20120324263
    Abstract: A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system.
    Type: Application
    Filed: August 24, 2012
    Publication date: December 20, 2012
    Applicant: International Business Machines Corporation
    Inventors: Heather L. Hanson, Charles Robert Lefurgy, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
  • Publication number: 20120324264
    Abstract: A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system.
    Type: Application
    Filed: August 24, 2012
    Publication date: December 20, 2012
    Applicant: International Business Machines Corporation
    Inventors: Heather L. Hanson, Charles R. Lefurgy, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
  • Publication number: 20120284540
    Abstract: Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor.
    Type: Application
    Filed: July 11, 2012
    Publication date: November 8, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcom S. Ware