Patents by Inventor Freeman L. Rawson, III
Freeman L. Rawson, III has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110154322Abstract: A mechanism is provided for temporarily allocating dedicated processors to a shared processor pool. A virtual machine monitor determines whether a temporary allocation associated with an identified dedicated processor is long-term or short-term. Responsive to the temporary allocation being long-term, the virtual machine monitor determines whether an operating frequency of the identified dedicated processor is within a predetermined threshold of an operating frequency of one or more operating systems utilizing the shared processor pool. Responsive to the operating frequency of the identified dedicated processor failing to be within the predetermined threshold, the virtual machine monitor either increases or decreases the frequency of the identified dedicated processor to be within the predetermined threshold of the operating frequency of the one or more operating systems utilizing the shared processor pool and temporarily allocates the identified dedicated processor to the shared processor pool.Type: ApplicationFiled: December 22, 2009Publication date: June 23, 2011Applicant: International Business Machines CorporationInventors: Naresh Nayar, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20110154323Abstract: A mechanism is provided in a logically partitioned data processing system for controlling depth and latency of exit of a virtual processor's idle state. A virtualization layer generates a cede latency setting information (CLSI) data. Responsive to booting a logical partition, the virtualization layer communicates the CLSI data to an operating system (OS) of the logical partition. The OS determines, based on the CLSI data, a particular idle state of a virtual processor under a control of the OS. Responsive to the OS calling the virtualization layer, the OS communicates the particular idle state of the virtual processor to the virtualization layer for assigning the particular idle state and wake-up characteristics to the virtual processor.Type: ApplicationFiled: December 23, 2009Publication date: June 23, 2011Applicant: International Business Machines CorporationInventors: Richard L. Arndt, Naresh Nayar, Christopher Francois, Karthick Rajamani, Freeman L. Rawson, III, Randal C. Swanberg
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Publication number: 20110154083Abstract: A method, system and computer-usable medium are disclosed for managing power consumption in information processing systems. Processing resources are successively folded, allowing them to be placed into deeper and deeper power saving states while maintaining the ability to respond to new processing loads without exposing the latency of the deeper power saving states as they are unfolded. Before a deeper power saving state can be used, there must be sufficient processing resources in the prior power saving state to mask the latency of bringing a processing resource out of the deeper power saving state.Type: ApplicationFiled: December 18, 2009Publication date: June 23, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard L. Arndt, Naresh Nayar, Freeman L. Rawson, III, Randal C. Swanberg
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Publication number: 20110154348Abstract: A method, system, and computer program product for reducing power and energy consumption in a server system with multiple processor cores is disclosed. The system may include an operating system for scheduling user workloads among a processor pool. The processor pool may include active licensed processor cores and inactive unlicensed processor cores. The method and computer program product may reduce power and energy consumption by including steps and sets of instructions activating spare cores and adjusting the operating frequency of processor cores, including the newly activated spare cores to provide equivalent computing resources as the original licensed cores operating at a specified clock frequency.Type: ApplicationFiled: December 17, 2009Publication date: June 23, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: ELMOOTAZBELLAH N. ELNOZAHY, HEATHER L. HANSON, FREEMAN L. RAWSON, III, MALCOLM S. WARE
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Publication number: 20110145555Abstract: A mechanism is provided for controlling power management policies on a per logical partition basis. A power management mechanism in a data processing system receives a notification that the logical partition has been generated, a set of processing units associated with the logical partition, and a current power management policy to be implemented for the logical partition. The power management mechanism adds the logical partition and the set of processing units to a list of logical partitions. The power management mechanism initializes the set of processing units based on settings for the set of processing units in the current power management policy. The power management mechanism notifies a virtualization mechanism that the set of processing units are running at a specified performance level in order for the logical partition to start executing tasks on the set of processing units.Type: ApplicationFiled: December 15, 2009Publication date: June 16, 2011Applicant: International Business Machines CorporationInventors: Naresh Nayar, Karthick Rajamani, Freeman L. Rawson, III, Todd J. Rosedahl, Malculm S. Ware
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Publication number: 20110113270Abstract: A mechanism is provided for controlling operational parameters associated with a plurality of processors. A control system in the data processing system determines a utilization slack value of the data processing system. The utilization slack value is determined using one or more active core count values and one or more slack core count values. The control system computes a new utilization metric to be a difference between a full utilization value and the utilization slack value. The control system determines whether the new utilization metric is below a predetermined utilization threshold. Responsive to the new utilization metric being below the predetermined utilization threshold, the control system decreases a frequency of the plurality of processors.Type: ApplicationFiled: November 12, 2009Publication date: May 12, 2011Applicant: International Business Machines CorporationInventors: John B. Carter, Heather L. Hanson, Karthick Rajamani, Freeman L. Rawson, III, Todd J. Rosedahl, Malcolm S. Ware
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Patent number: 7908493Abstract: A mechanism is provided for unified management of power, performance, and thermals in computer systems. This mechanism incorporates elements to effectively address all aspects of managing computing systems in an integrated manner, instead of independently. The mechanism employs an infrastructure for real-time measurements feedback, an infrastructure for regulating system activity, component operating levels, and environmental control, a dedicated control structure for guaranteed response/preemptive action, and interaction and integration components. The mechanism provides interfaces for user-level interaction. The mechanism also employs methods to address power/thermal concerns at multiple timescales. In addition, the mechanism improves efficiency by adopting an integrated approach, rather than treating different aspects of the power/thermal problem as individual issues to be addressed in a piecemeal fashion.Type: GrantFiled: June 6, 2007Date of Patent: March 15, 2011Assignee: International Business Machines CorporationInventors: Andreas Bieswanger, Michael S. Floyd, Soraya Ghiasi, Steven P. Hartman, Thomas W. Keller, Jr., Hye-Young McCreary, Karthick Rajamani, Freeman L. Rawson, III, Juan C. Rubio, Malcolm S. Ware
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Publication number: 20100332872Abstract: A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system.Type: ApplicationFiled: June 30, 2009Publication date: December 30, 2010Applicant: International Business Machines CorporationInventors: Heather L. Hanson, Charles Robert Lefurgy, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20100268968Abstract: Disclosed are systems, methods, and computer program products for managing power states in processors of a data processing system. In one embodiment, the invention is directed to a data processing system having dynamically configurable power-performance states (“pstates”). The data processing system includes a processor configured to operate at multiple states of frequency and voltage. The data processing system also has a power manager module configured to monitor operation of the data processing system. The data processing system further includes a pstates table having a plurality of pstate definitions, wherein each pstate definition includes a voltage value, a frequency value, and at least one unique pointer that indicates a transition from a given pstate to a different pstate.Type: ApplicationFiled: April 16, 2009Publication date: October 21, 2010Applicant: International Business Machines CorporationInventors: Soraya Ghiasi, Malcolm S. Ware, Karthick Rajamani, Freeman L. Rawson, III, Michael S. Floyd, Juan C. Rubio
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Publication number: 20100218029Abstract: Semiconductor device circuits and methods are provided for adjusting core processor performance based on usage metrics. Metric detection and adjustment are performed in digital logic hardware guided by registers providing maximum and minimum frequency settings, without intervening input from system software or firmware, thus greatly speeding the processor performance adjustment. Power-performance drivers provide applications or the operating system ability to specify maximum and minimum frequency requirements.Type: ApplicationFiled: February 23, 2009Publication date: August 26, 2010Applicant: International Business Machines CorporationInventors: Michael S. Floyd, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20100146316Abstract: A method, system, and computer program product for optimizing power consumption of an executing processor executing. The method includes determining a first sensitivity relationship (SR) based on a first and a second performance metric value (PMV) measured at a first and second operating frequency (OF), respectively. The first SR predicts workload performance over a range of OFs. A third OF is determined based on the first SR and a specified workload performance floor. A third PMV is measured by executing the processor operating at the third OF. A second SR based on the second and third PMVs is then determined. The first and second SRs are logically combined to generate a third SR. Based on the third SR, a fourth OF is outputted.Type: ApplicationFiled: December 8, 2008Publication date: June 10, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Carter, Heather L. Hanson, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20100115343Abstract: Semiconductor device circuits and methods are provided for adjusting core processor performance and energy-efficiency based on usage metrics. Metric detection, performance state selection, and adjustment are done in digital logic hardware without intervening input from system software or firmware, thus greatly speeding the processor performance adjustment. Mapping usage and state information to desired processor power-performance states is also provided in circuitry rather than firmware or power control software. The mapping values may be programmable software or firmware, but detection, selection, and adjustment occur automatically in hardware without intervening input from firmware or software.Type: ApplicationFiled: November 3, 2008Publication date: May 6, 2010Applicant: International Business Machines CorporationInventors: Michael S. Floyd, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20100070787Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for determining a safe lower bound for a commonly powered data processing system. A power management module operates the data processing system using at least one nominal operating parameter during an exploration periodicity, with the at least one nominal operating parameter being clock speed. The power management module determines whether a calibration period is occurring. The power management module calibrates the data processing system up to a measurement interval duration expiration. The power management module may repeat operating the data processing system using the at least one nominal operating parameter.Type: ApplicationFiled: September 18, 2008Publication date: March 18, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andreas Bieswanger, Thomas M. Brey, Ajay Dholakia, Andrew Geissler, Hye-Young McCreary, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20100037038Abstract: Embodiments that dynamically manage core pools are disclosed. Various embodiments involve measuring the amount of a computational load on a computing device. One way of measuring the load may consist of executing a number of instructions, in a unit of time, with numerous cores of the computing device. These embodiments may compare the number of instructions executed with specific thresholds. Depending on whether the number of instructions is higher or lower than the thresholds, the computing devices may respond by activating and deactivating cores of the computing devices. By limiting execution of instructions of the computing device to a smaller number of cores and switching one or more cores to a lower power state, the devices may conserve power.Type: ApplicationFiled: August 6, 2008Publication date: February 11, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Andreas Bieswanger, Andrew Geissler, Hye-Young McCreary, Freeman L. Rawson, III
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Publication number: 20090327765Abstract: Methods and products for managing power consumption of a computer and computers for which power consumption is managed. The computer includes the computer including a computer processor and embodiments of the present invention include providing, by an in-band power manger to an out-of-band power manager, a proposed performance state (‘p-state’) for the computer processor; determining, by the out-of-band power manager, in dependence upon a power setpoint and currently-measured operating metrics of the computer processor, whether to approve the proposed p-state; and if the out-of-band power manager approves the proposed p-state, setting operating parameters of the computer processor according to the approved p-state.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20090327764Abstract: Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20080307238Abstract: A system is provided for unified management of power, performance, and thermals in computer systems. This system incorporates elements to effectively address all aspects of managing computing systems in an integrated manner, instead of independently. The system employs an infrastructure for real-time measurements feedback, an infrastructure for regulating system activity, component operating levels, and environmental control, a dedicated control structure for guaranteed response/preemptive action, and interaction and integration components. The system provides interfaces for user-level interaction. The system also employs methods to address power/thermal concerns at multiple timescales. In addition, the system improves efficiency by adopting an integrated approach, rather than treating different aspects of the power/thermal problem as individual issues to be addressed in a piecemeal fashion.Type: ApplicationFiled: June 6, 2007Publication date: December 11, 2008Inventors: Andreas Bieswanger, Michael S. Floyd, Soraya Ghiasi, Steven P. Hartman, Thomas W. Keller, JR., Hye-Young McCreary, Karthick Rajamani, Freeman L. Rawson, III, Juan C. Rubio, Malcolm S. Ware
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Publication number: 20080301473Abstract: A method of hypervisor based power management, includes: allocating resources to a plurality of partitions defined within a virtual machine environment; monitoring performance of the plurality of partitions with respect to a service level agreement (SLA); tracking power consumption in the plurality of partitions; scaling power consumption rates of the plurality of partitions based on the allocated resources, wherein the power consumption rate of physical resources is scaled by adjusting resource allocations to each partition; identifying partitions that are sources of excessive power consumption based on the SLA; and adjusting the allocation of resources based on the power consumption of the plurality of partitions, the performance of the plurality of partitions, and the SLA.Type: ApplicationFiled: May 29, 2007Publication date: December 4, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ronald Perez, Freeman L. Rawson, III, Leendert van Doorn, Xiaolan Zhang
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Patent number: 6985952Abstract: Cluster systems having central processor units (CPUs) with multiple processors (MPs) are configured as high density servers. Power density is managed within the cluster systems by assigning a utilization to persistent states and connections within the cluster systems. If a request to reduce overall power consumption within the cluster system is received, persistent states and connections are moved (migrated) within the multiple processors based on their utilization to balance power dissipation within the cluster systems. If persistent connections and states, that must be maintained have a low rate of reference, they may be maintained in processors that are set to a standby mode where memory states are maintained. In this way the requirement to maintain persistent connections and states does not interfere with an overall strategy of managing power within the cluster systems.Type: GrantFiled: October 31, 2001Date of Patent: January 10, 2006Assignee: International Business Machines CorporationInventors: Patrick J. Bohrer, Elmootazbellah N. Elnozahy, Thomas W. Keller, Michael D. Kistler, Freeman L. Rawson, III
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Patent number: 5771383Abstract: A data processing system and method provide for sharing a partition of a memory in the system between a first task and thread and a second task and thread, so as to more efficiently enable adaptive sharing of data for local tasks or alternately copying of data into I/O buffers for remote tasks. The system and method automatically determine whether sharing has been established between two local tasks and if not, the system and method will adaptively copy data for messages to be transferred between the tasks.Type: GrantFiled: February 13, 1997Date of Patent: June 23, 1998Assignee: International Business Machines Corp.Inventors: James Michael Magee, Freeman L. Rawson, III, Christopher Dean Youngworth