Abstract: An optical structure is provided. The optical structure includes a substrate, a light-emitting element, a glue layer, and a light-adjusting element. The light-emitting element is disposed on the substrate. The glue layer covers the light-emitting element. The light-adjusting element is disposed on the glue layer. Moreover, the refractive index of the glue layer is different from the refractive index of the light-adjusting element.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.

Abstract: This disclosure is directed to an adsorption unit having spring structure, which has a frame, multiple limiting springs and multiple adsorption granules. The frame has an inlet side and an exhaust side. The limiting springs are arranged in the frame, and a slot is provided on each limiting spring. The adsorbed granules are arranged in the frame and restricted by the spacers and fixed in the frame so as to locate between the inlet side and the exhaust side. Air enters the adsorption unit from the environment through the inlet side, passes through the adsorption unit, and leaves the adsorption unit through the exhaust side. The air passes through the adsorption unit and returns to the environment so as to contact the adsorption granules to remove carbon dioxide and water.

Abstract: This disclosure is directed to an adsorption unit, having a frame, multiple spacer pieces and multiple adsorption structures. The frame has an inlet side and an exhaust side. The spacer pieces are arranged in the frame. The adsorbed structures are arranged in the frame, and are restricted by the spacers and fixed in the frame so as to locate between the inlet side and the exhaust side. Air enters the adsorption unit from the environment through the inlet side, passes through the adsorption unit, and leaves the adsorption unit through the exhaust side. The air passes through the adsorption unit and returns to the environment so as to contact the adsorption structures to remove carbon dioxide and water.

Abstract: A cleaning system includes a cleaning device, a tray, a charging assembly, a body and a floor brush assembly. The floor brush assembly has rollers which rotate around an X-axis, and can rotate at least in the X-axis direction relative to the body. The charging assembly has a male charging end and a female charging end, wherein one of the male charging end and the female charging end is provided on the body, and the other is provided on the tray. Opposite sides of the male charging end have first electrode sheets and the female charging end has corresponding second electrode sheets. The body of the cleaning system, the body rotates such that the location of the first electrode sheets of the male charging end avoid a problem of poor contact with second electrode sheets of the female charging end.

Abstract: This disclosure is directed to an adsorption unit, having a frame, multiple spacer tubes and multiple adsorption granules. The frame has an inlet side and an exhaust side. The spacer tubes are arranged in the frame, and a plurality of through holes are provided on each of the spacer tubes. The adsorbed granules are arranged in the frame, and the adsorbed granules are restricted by the spacers and fixed in the frame so as to locate between the inlet side and the exhaust side. Air enters the adsorption unit from the environment through the inlet side, passes through the adsorption unit, and leaves the adsorption unit through the exhaust side. The air passes through the adsorption unit and returns to the environment so as to contact the adsorption granules to remove carbon dioxide and water.

Abstract: This disclosure is directed to a carbon capture system having an adsorption module, a fan module, a desorption chamber and a desorption line. The adsorption module has a plurality of adsorption units arranged in a coplanar array. Each of the adsorption units has a frame and a plurality of adsorption structures. The frame has an inlet end and an exhaust end. The adsorption structures are arranged in the frame, and the adsorption module is defined with a flow direction from the inlet ends toward the exhaust ends. The fan module is defined with an air outlet direction, and the air outlet direction is arranged along the flow direction. The desorption chamber is used for accommodating the adsorption module. One end of the desorption pipeline is connected to the desorption chamber, and the desorption pipeline is connected with a gas storage tank and a negative pressure pump arranged in series.

Abstract: A stacked via structure disposed on a conductive pillar of a semiconductor die is provided. The stacked via structure includes a first dielectric layer, a first conductive via, a first redistribution wiring, a second dielectric layer, a second conductive via, and a second redistribution wiring. The first dielectric layer covers the semiconductor die. The first conductive via is embedded in the first dielectric layer and electrically connected to the conductive pillar. The first redistribution wiring covers the first conductive via and the first dielectric layer. The second dielectric layer covers the first dielectric layer and the first redistribution wiring. The second conductive via is embedded in the second dielectric layer and landed on the first redistribution wiring. The second redistribution wiring covers the second conductive via and the second dielectric layer. A lateral dimension of the first conductive via is greater than a lateral dimension of the second conductive via.

Abstract: An optoelectronic device includes a first substrate, a second substrate, a photonic integrated circuit, and a laser diode. The second substrate is over the first substrate. The photonic integrated circuit is disposed on the first substrate and includes a first waveguide channel, a second waveguide channel, and a patterned structure. The first waveguide channel and the second waveguide channel are coupled to the patterned structure. The laser diode is disposed on the second substrate and configured to emit a light beam toward the patterned structure.

Abstract: A method for operating an emergency charging device includes when a mutual charging switch of the emergency charging device is triggered, setting a plurality of batteries whose power is lower than a predetermined threshold as a target battery group, selecting a battery with a highest capacity from the target battery group as a battery to be recharged, selecting a battery with a capacity lower than the battery to be recharged from the target battery group as a discharge battery, and charging the battery to be recharged from the discharge battery.

Abstract: An antenna assembly includes a patch antenna, a metal layer, and a feed-in signal layer. The metal layer is disposed on a side of the patch antenna and includes a first slot and a second slot. The feed-in signal layer is disposed on a side of the metal layer opposite the second antenna and includes a transmitting port, a receiving port, a hybrid coupler, and two microstrips. The transmitting port and the receiving port are connected to the hybrid coupler, and the two microstrips are extended in the direction away from the hybrid coupler. Projections of two ends of the two microstrips onto the metal layer are overlapped with the first slot and the second slot. An antenna array is also mentioned.

Abstract: A minimum IC operating voltage searching method includes acquiring a corner type of an IC, acquiring ring oscillator data of the IC, generating a first prediction voltage according to the corner type and the ring oscillator data by using a training model, generating a second prediction voltage according to the ring oscillator data by using a non-linear regression approach under an N-ordered polynomial, and generating a predicted minimum IC operating voltage according to the first prediction voltage and the second prediction voltage. N is a positive integer.

Abstract: This disclosure provides systems, methods, and devices for image signal processing that support image signal processing of exposure bracketed image frames. In a first aspect, a method of image processing includes receiving, by at least one processor, image data comprising first image data of a first exposure duration, second image data of a second exposure duration, and third image data of a third exposure duration, wherein the first exposure duration is equal to the third exposure duration; determining, by the at least one processor, fourth image data by subtracting corresponding pixel intensity values of the third image data from the second image data; and determining, by the at least one processor, a first output image frame by combining the fourth image data with the first image data. Other aspects and features are also claimed and described.

Abstract: This disclosure provides systems, methods, and devices for image signal processing that support high dynamic range (HDR) image processing on image frames with temporally-aligned centers to reduce artifacts resulting from fusing image frames with different temporal centers. In some aspects, a method of image processing includes capturing three or more image frames having at least two different exposure lengths. The three or more image frames are processed to obtain two image frames with temporally-aligned centers, and those two image frames are processed in HDR fusion logic to obtain an output HDR image frame. Other aspects and features are also claimed and described.

Abstract: The present application provides a flexible screen support device and a flexible screen inward bending terminal. The flexible screen support device includes a first housing and a second housing connected through a rotating assembly. The first housing includes a first part and a second part that are rotatably connected, and the first part is located on one side, close to the rotating assembly, of the second part. The second housing includes a third part and a fourth part that are rotatably connected, and the third part is located on one side, close to the rotating assembly, of the fourth part. In a process of switching from the unfolded state to the folded state, the first part of the first housing and the third part of the second housing rotate in opposite directions to form an accommodating space above the rotating assembly.

Abstract: A method includes: coupling a first gate to a first word line through a first gate via, wherein the first gate extends along a first direction; coupling the first gate to a second word line through a second gate via, wherein each of the first gate, a second gate, the first gate via and the second gate via is disposed on a first active area which extends along the second direction, wherein the second gate extends along the first direction and is separated from the first gate along a second direction; coupling the first active area to a first bit line through a first conductive via; and aligning the first gate via, the second gate via and the a first conductive via with each other along the second direction.

Abstract: An integrated circuit includes a memory cell array, a row decoder configured to generate a first decoder signal, a column decoder configured to generate a second decoder signal, and an array of write assist circuits coupled to the row and column decoder and the memory cell array. Each write assist circuit is configured to set an operating voltage of a corresponding memory cell, and generate the output signal in response to a first control signal. The operating voltage corresponds to an output signal. Each write assist circuit includes an AND gate coupled to a programmable voltage tuner. The programmable voltage tuner includes a set of P-type transistors coupled to a first P-type transistor. The set of P-type transistors is coupled together in parallel, and receives a set of select control signals. A first terminal of the first P-type transistor is configured to receive an AND signal from the AND gate.

Abstract: A semiconductor package includes a substrate, a semiconductor device, and a ring structure. The semiconductor device disposed on the substrate. The ring structure disposed on the substrate and surrounds the semiconductor device. The ring structure includes a first portion and a second portion. The first portion bonded to the substrate. The second portion connects to the first portion. A cavity is between the second portion and the substrate.

Abstract: An image displaying device includes a planar display panel and a light penetrating unit. The planar display panel displays a plane image. The planar display panel at least includes a first pixel group, a second pixel group and a third pixel group. The second pixel group is located between the first pixel group and the third pixel group. When vision passes through the light penetrating unit toward the planar display panel, the vision acquires a second distance of a second imaging position within the plane image relevant to the second pixel group relative to the planar display panel being greater than a first distance of a first imaging position within the plane image relevant to the first pixel group relative to the planar display panel and a third distance of a third imaging position within the plane image relevant to the third pixel group relative to the planar display panel.

Abstract: A semiconductor device includes anti-fuse cells. The anti-fuse cells include a first active area, a first gate, a second gate, at least one first gate via, and at least one second gate via. The first gate and the second gate are separate from each other. The first gate and the second gate extend to cross over the first active area. The at least one first gate via is coupled to the first gate and disposed directly above the first active area. The at least one second gate via is coupled to the second gate. The first gate is coupled through the at least one first gate via to a first word line for receiving a first programming voltage, and the second gate is coupled through the at least one second gate via to a second word line for receiving a first reading voltage.