Patents by Inventor Fu Hsu

Fu Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240220049
    Abstract: A seamless touchpad device includes at least two adjacent touchpad units, a first touchpad unit and a second touchpad unit. The first touchpad unit includes a plurality of first horizontal signal lines, a plurality of first vertical signal lines and a first control unit connected thereto. The second touchpad unit includes second horizontal signal lines, second vertical signal lines and a second control unit connected, and the second control unit is electrically connected to the first control unit. Each first horizontal signal line is correspondingly connected to one of the second horizontal signal lines, and part of the first vertical signal lines close to the second touchpad unit among the first vertical signal lines is individually connected to part of the second vertical signal lines close to the first touchpad unit among the second vertical signal lines, so as to form an overlapping scanning area.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 4, 2024
    Inventors: Chin-Wen LIN, Hung-Yi LIN, Wei-Ting WONG, Ching-Fu HSU
  • Patent number: 12020938
    Abstract: A method of forming an electrode on a substrate is disclosed. The method may include: contacting the substrate with a first vapor phase reactant comprising a titanium tetraiodide (TiI4) precursor; contacting the substrate with a second vapor phase reactant comprising a nitrogen precursor; and depositing a titanium nitride layer over a surface of the substrate thereby forming the electrode; wherein the titanium nitride layer has an electrical resistivity of less than 400 ??-cm. Related semiconductor device structures including a titanium nitride electrode deposited by the methods of the disclosure are also provided.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: June 25, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Moataz Bellah Mousa, Peng-Fu Hsu, Ward Johnson, Petri Raisanen
  • Publication number: 20240186138
    Abstract: A method for depositing an oxide film on a substrate by a cyclical deposition is disclosed. The method may include: depositing a metal oxide film over the substrate utilizing at least one deposition cycle of a first sub-cycle of the cyclical deposition process; and depositing a silicon oxide film directly on the metal oxide film utilizing at least one deposition cycle of a second sub-cycle of the cyclical deposition process. Semiconductor device structures including an oxide film deposited by the methods of the disclosure are also disclosed.
    Type: Application
    Filed: February 13, 2024
    Publication date: June 6, 2024
    Inventors: Fu Tang, Delphine Longrie, Peng-Fu Hsu
  • Publication number: 20240170381
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Inventors: Chun-Hsien HUANG, Peng-Fu HSU, Yu-Syuan CAI, Min-Hsiu HUNG, Chen-Yuan KAO, Ken-Yu CHANG, Chun-I TSAI, Chia-Han LAI, Chih-Wei CHANG, Ming-Hsing TSAI
  • Publication number: 20240165400
    Abstract: A system for providing wireless electrical stimulation to muscles and nerves for the treatment of medical and non-medical conditions. The electrical stimulation is delivered to the stimulated object (individual) by small neuromuscular electrical stimulation devices attached to wearable supports featuring electrically conductive material rendered on the inside and acting as electrodes. The control of the electrical stimulation devices is provided by a dedicated application running on a mobile device by means of a Bluetooth Low Energy interface.
    Type: Application
    Filed: January 27, 2022
    Publication date: May 23, 2024
    Applicant: NMES Group AB
    Inventors: Vincent Tellenbach, Heiko Van Vliet, Jeffrey Fu Hsu, Mathias Jepson, Richard Charles Statham, Vedran Stankovic
  • Publication number: 20240153943
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 9, 2024
    Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
  • Patent number: 11929314
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 11923192
    Abstract: A method for depositing an oxide film on a substrate by a cyclical deposition is disclosed. The method may include: depositing a metal oxide film over the substrate utilizing at least one deposition cycle of a first sub-cycle of the cyclical deposition process; and depositing a silicon oxide film directly on the metal oxide film utilizing at least one deposition cycle of a second sub-cycle of the cyclical deposition process. Semiconductor device structures including an oxide film deposited by the methods of the disclosure are also disclosed.
    Type: Grant
    Filed: September 13, 2022
    Date of Patent: March 5, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Delphine Longrie, Peng-Fu Hsu
  • Patent number: 11916060
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
  • Publication number: 20240060909
    Abstract: A cylindrical shell detection method includes generating a first and a second terahertz transmitting electromagnetic waves; detecting a plurality of first terahertz reflected electromagnetic waves reflected by the first terahertz transmitting electromagnetic wave incident in a plurality of inner interface layers of a cylindrical shell; detecting a plurality of second terahertz reflected electromagnetic waves reflected by the second terahertz transmitting electromagnetic wave incident in a plurality of outer interface layers of a cylindrical shell; measuring a plurality of first characteristic signals according to the first terahertz transmitting electromagnetic waves and the first terahertz reflected electromagnetic waves to determine a plurality of first characteristics of the plurality of inner interface layers; and measuring a plurality of second characteristic signals according to the second terahertz transmitting electromagnetic waves and the plurality of second terahertz reflected electromagnetic waves
    Type: Application
    Filed: November 14, 2022
    Publication date: February 22, 2024
    Applicant: Advanced ACEBIOTEK CO., LTD.
    Inventors: Jyh-Chern Chen, Yi-Ping Lin, Yung-Chou Hsu, Shen-Fu Hsu
  • Publication number: 20240030296
    Abstract: Methods for forming a metal silicate film on a substrate in a reaction chamber by a cyclical deposition process are provided. The methods may include: regulating the temperature of a hydrogen peroxide precursor below a temperature of 70° C. prior to introduction into the reaction chamber, and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclical deposition process. Semiconductor device structures including a metal silicate film formed by the methods of the disclosure are also provided.
    Type: Application
    Filed: October 3, 2023
    Publication date: January 25, 2024
    Inventors: Fu Tang, Peng-Fu Hsu, Michael Eugene Givens, Qi Xie
  • Publication number: 20240030215
    Abstract: The ability of a grounded gate NMOS (ggNMOS) device to withstand and protect against human body model (HBM) electrostatic discharge (ESD) events is greatly increased by resistance balancing straps. The resistance balancing straps are areas of high resistance formed in the substrate between an active area that includes a MOSFET of the ggNMOS device and a bulk ring that surrounds the active area. A Vss rail is coupled to the substrate beneath the MOSFET through the bulk ring. The substrate beneath the MOSFET provides base regions for parasitic transistors that switch on for the ggNMOS device to operate. The straps inhibit low resistance pathways between the base regions and the bulk ring and prevent a large portion of the ggNMOS device from being switched off while a remaining portion of the ggNMOS device remains switched on. The strap may be divided into segments inserted at strategic locations.
    Type: Application
    Filed: July 25, 2022
    Publication date: January 25, 2024
    Inventors: Hsiao-Ching Huang, Sheng-Fu Hsu, Hao-Hua Hsu, Pin-Chen Chen, Lin-Yu Huang, Yu-Chang Jong
  • Publication number: 20230395592
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a first semiconductor device and second semiconductor device disposed on a semiconductor substrate. The first semiconductor device comprises a first gate structure, a first source region, and a first drain region. The first source and drain regions and are disposed in a first well region. The second semiconductor device comprises a second gate structure, a second source region, and a second drain region. The second source and drain regions are disposed in a second well region. The first and second well regions comprise a first doping type. The first well region is laterally offset from the second well region by a first distance. A third well region is disposed in the semiconductor substrate and laterally between the first and second well regions. The third well region comprises a second doping type opposite the first doping type.
    Type: Application
    Filed: June 3, 2022
    Publication date: December 7, 2023
    Inventors: Hsiao-Ching Huang, Hao-Hua Hsu, Sheng-Fu Hsu
  • Patent number: 11809328
    Abstract: The present invention provides a control method of the flash memory controller. In the control method, by establishing a valid page count table, a detailed valid page count table and/or a zone valid page count table according to deallocate command from the host device, the flash memory controller can efficiently and quickly determine if any one of the zones does not have any valid data, so that the flash memory controller can recommend the host device to send a reset command to reset the zone. In addition, after receiving the reset command from the host device, the flash memory controller can use a garbage collection operation or directly put the blocks corresponding to the erased zone into a spare block pool, for the further use.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: November 7, 2023
    Assignee: Silicon Motion, Inc.
    Inventors: Ken-Fu Hsu, Ching-Hui Lin
  • Patent number: 11804482
    Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate of a first type, a first doped region embedded within the substrate and having a first portion and a second portion, and a first gate electrode disposed above the substrate. The semiconductor device further comprises a well region of a second type and embedded within the substrate. The well region is in contact with the second portion of the first doped region.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: October 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Sheng-Fu Hsu, Hsiao-Ching Huang
  • Patent number: 11798999
    Abstract: Methods for forming a metal silicate film on a substrate in a reaction chamber by a cyclical deposition process are provided. The methods may include: regulating the temperature of a hydrogen peroxide precursor below a temperature of 70° C. prior to introduction into the reaction chamber, and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclical deposition process. Semiconductor device structures including a metal silicate film formed by the methods of the disclosure are also provided.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: October 24, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Peng-Fu Hsu, Michael Eugene Givens, Qi Xie
  • Publication number: 20230267717
    Abstract: A method for searching a path by using a 3D reconstructed map includes: receiving 3D point-cloud map information and 3D material map information; clustering the 3D point-cloud map information with a clustering algorithm to obtain clustering information, and identifying material attributes of objects in the 3D point-cloud map information with a material neural network model to obtain material attribute information; fusing the those map information based on their coordinate information, thereby outputting fused map information; identifying obstacle areas and non-obstacle areas in the fused map information based on an obstacle neural network model, the clustering information, and the material attribute information; and generating 3D path information according to the non-obstacle areas. Since the 3D path information is generated based on those map information, the obstacle areas and flight spaces are effectively determined to generate an accurate flight path.
    Type: Application
    Filed: May 26, 2022
    Publication date: August 24, 2023
    Inventors: Mang Ou-Yang, Yung-Jhe Yan, Ming-Da Jiang, Ta-Fu Hsu, Shao-Chun Yeh, Kun-Hsiang Chen, Tzung-Cheng Chen
  • Patent number: 11715734
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: August 1, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Fu Hsu, Ta-Yuan Kung, Chen-Liang Chu, Chih-Chung Tsai
  • Patent number: 11688804
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device has a source region and a drain region in a substrate, a gate structure and a metallic line. The source region surrounds the drain region in the substrate. The gate structure is disposed on the substrate, and disposed between the source region and the drain region. The gate structure surrounds the drain region. The metallic line is located above the source and drain regions and the gate structure and electrically connected to the drain region or the source region. The source region includes a doped region having a break region located between two opposite ends of the doped region. The metallic line extends from the drain region, across the gate structure and across the break region and beyond the source region.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: June 27, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Cheng Chiu, Tien-Sheng Lin, Sheng-Fu Hsu, Chen-Yi Lee, Chiu-Hua Chung
  • Patent number: 11687234
    Abstract: A computer system including an electronic device and an input device is disclosed. The electronic device includes a touch display area and a control unit. The input device includes a plurality of positioning structures and a grounding piece. The positioning structures are electrically connected to the grounding piece. When the input device is disposed on the touch display area of the electronic device, the control unit detects positions of the positioning structures on the touch display area, calculates a coverage area covered by the input device on the touch display area according to the positions, and determines a range of a display area of the touch display area according to the coverage area.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: June 27, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Ching-Fu Hsu, Wei-Ting Wong, Teng-Hui Huang