Patents by Inventor Fu Tang

Fu Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260168092
    Abstract: A substrate processing method for forming a rare earth metal oxide film includes providing a substrate in a reaction chamber and performing a rare earth metal oxide deposition cycle. The rare earth metal oxide deposition cycle includes pulsing a rare earth metal precursor and pulsing a reactant into the reaction chamber.
    Type: Application
    Filed: December 11, 2025
    Publication date: June 18, 2026
    Inventors: Rishabh Rastogi, Ren-Jie Chang, Fu Tang, Petri Raisanen, Jereld Lee Winkler
  • Patent number: 12644178
    Abstract: A method can comprise providing a zinc precursor to a reaction chamber comprising a substrate disposed therein; providing an oxygen species to the reaction chamber; forming a zinc oxide layer on the substrate in response to providing the zinc precursor and providing the oxygen species; and/or mitigating agglomeration of the zinc oxide layer. Mitigating agglomeration of the zinc oxide layer can comprise forming a capping layer on an outer surface of the zinc oxide layer such that the outer surface of the zinc oxide layer is not exposed to ambient oxygen, doping the zinc oxide layer with another material, and/or applying a post-deposition treatment to the zinc oxide layer.
    Type: Grant
    Filed: January 2, 2024
    Date of Patent: June 2, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Eric Jen Cheng Liu, Eric James Shero
  • Publication number: 20260122999
    Abstract: Threshold voltage (Vt) tuning layers may be sensitive to etching by reactants used to deposit overlying gate material, such as metal nitride. Methods for depositing Vt tuning layers are provided. In some embodiments Vt tuning layers may comprise a Vt tuning material in a neutral matrix. In some embodiments, processes for reducing or eliminating the etching of Vt tuning layers by halide reactants are described. In some embodiments a Vt tuning layer, such as a metal oxide layer, is treated by a nitridation process following deposition and prior to subsequent deposition of a metal nitride capping layer. In some embodiments an etch-protective layer, such as a NbO layer, is deposited over a Vt tuning layer prior to deposition of an overlying metal nitride layer.
    Type: Application
    Filed: April 3, 2025
    Publication date: April 30, 2026
    Inventors: Fu Tang, Eric James Shero, Gejian Zhao, Eric Jen Cheng Liu
  • Publication number: 20260114192
    Abstract: A method for depositing an oxide film on a substrate by a cyclical deposition is disclosed. The method may include: depositing a metal oxide film over the substrate utilizing at least one deposition cycle of a first sub-cycle of the cyclical deposition process; and depositing a silicon oxide film directly on the metal oxide film utilizing at least one deposition cycle of a second sub-cycle of the cyclical deposition process. Semiconductor device structures including an oxide film deposited by the methods of the disclosure are also disclosed.
    Type: Application
    Filed: December 18, 2025
    Publication date: April 23, 2026
    Inventors: Fu Tang, Delphine Longrie, Peng-Fu Hsu
  • Patent number: 12525451
    Abstract: A method for depositing an oxide film on a substrate by a cyclical deposition is disclosed. The method may include: depositing a metal oxide film over the substrate utilizing at least one deposition cycle of a first sub-cycle of the cyclical deposition process; and depositing a silicon oxide film directly on the metal oxide film utilizing at least one deposition cycle of a second sub-cycle of the cyclical deposition process. Semiconductor device structures including an oxide film deposited by the methods of the disclosure are also disclosed.
    Type: Grant
    Filed: February 13, 2024
    Date of Patent: January 13, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Delphine Longrie, Peng-Fu Hsu
  • Publication number: 20260005017
    Abstract: Disclosed herein is a method, system and apparatus for forming, by a cyclic process, a dopant concentration gradient in a doped hafnium zirconium oxide (HZO) layer on a substrate, the cyclic process includes, providing the substrate in a reaction chamber, a) pulsing a hafnium precursor(s) into the reaction chamber, where at least a part of the substrate is contacted with the hafnium precursor(s), b) pulsing a zirconium precursor(s) into the reaction chamber, where at least a part of the substrate is contacted with the zirconium precursor(s), c) pulsing an oxygen reactant(s) into the reaction chamber, where at least a part of the substrate is contacted with the oxygen reactant(s), d) pulsing a dopant precursor(s) into the reaction chamber, where at least a part of the substrate is contacted with the dopant precursor(s), and e) purging the reaction chamber.
    Type: Application
    Filed: June 27, 2025
    Publication date: January 1, 2026
    Inventors: Rohit Abraham John, Fu Tang, Eric James Shero
  • Publication number: 20250369110
    Abstract: Methods for forming a semiconductor structure are disclosed. The methods disclosed include depositing a dipole layer comprising a ternary gallium material on a surface of a high-k dielectric material by a cyclical deposition process. Methods for depositing a dipole layer on a substrate by an atomic layer deposition process are also disclosed. Methods of forming a semiconductor device employing a ternary gallium material are also disclosed.
    Type: Application
    Filed: May 28, 2025
    Publication date: December 4, 2025
    Inventors: Fu Tang, Eric James Shero, Ren-Jie Chang
  • Publication number: 20250349548
    Abstract: A method, system and apparatus for depositing a composite film, comprising, supporting a substrate, depositing a first metal electrode via a first non-Atomic Layer Deposition (non-ALD) process, depositing a first metal liner, via a first cyclic ALD process, depositing a dielectric layer comprising a first crystalline structure, via a second cyclic ALD process, wherein the dielectric layer is in physical contact with the first metal liner layer and at least in electrical communication with the first metal electrode, inducing a first in-plane tensile stress in the dielectric layer at a first interface between the first metal liner and the dielectric layer and converting the first crystalline structure to a second crystalline structure, responsive to the first in-plane tensile stress.
    Type: Application
    Filed: May 7, 2025
    Publication date: November 13, 2025
    Inventors: Jessica Akemi Cimada da Silva, Fu Tang, Rohit Abraham John, Alessandra Leonhardt, Andrea Illiberi
  • Publication number: 20250313953
    Abstract: A method of forming a doped silicon nitride film on a surface of a substrate and structures including the doped silicon nitride film are disclosed. Exemplary methods include forming a layer comprising silicon nitride using a first thermal process and forming a layer comprising doped silicon nitride using a second thermal process to thereby form the doped silicon nitride film.
    Type: Application
    Filed: June 18, 2025
    Publication date: October 9, 2025
    Inventors: Xingye Wang, Fu Tang, Eric Jen cheng Liu, Peijun Jerry Chen, YoungChol Byun
  • Publication number: 20250277308
    Abstract: Apparatus, systems and methods for providing a pulse of a precursor are provided. The apparatus, systems and methods as described herein can be used to, for example, rapidly pulse a precursor to a reactor and provide relatively high flow of a purge gas during a purge of the reactor.
    Type: Application
    Filed: February 27, 2025
    Publication date: September 4, 2025
    Inventors: Jereld Lee Winkler, Harihara Krishnan Krishnamoorthy, Eric James Shero, Eric Jen Cheng Liu, Fu Tang, Petri Raisanen, Chaokai Chen, Kyle Fondurulia
  • Publication number: 20250273558
    Abstract: Methods for manufacturing metal-insulator-metal (MIM) capacitors are disclosed. The methods include, forming a dielectric layer on at least part of a substrate, the dielectric layer being disposed between a first conductive layer and a second conductive layer, and forming at least one of a first dipole layer or a second dipole layer between the dielectric layer and one or more of the conductive layers. The disclosed first dipole layer and/or the second dipole layer are configured to create an asymmetric charge distribution across the dielectric layer. Systems constructed and arranged for manufacturing MIM capacitors are also disclosed.
    Type: Application
    Filed: February 20, 2025
    Publication date: August 28, 2025
    Inventors: Alessandra Leonhardt, Fu Tang, Vivek Koladi Mootheri, Leo Lukose, Jerome Innocent, Michael Eugene Givens, Andrea Illiberi, Rohit Abraham John
  • Patent number: 12378667
    Abstract: A method of forming a doped silicon nitride film on a surface of a substrate and structures including the doped silicon nitride film are disclosed. Exemplary methods include forming a layer comprising silicon nitride using a first thermal process and forming a layer comprising doped silicon nitride using a second thermal process to thereby form the doped silicon nitride film.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: August 5, 2025
    Assignee: ASM IP Holding B.V.
    Inventors: Xingye Wang, Fu Tang, Eric Jen cheng Liu, Peijun Jerry Chen, YoungChol Byun
  • Publication number: 20250218783
    Abstract: A method comprising depositing a threshold voltage shifting layer on a substrate, wherein the layer comprises a metal and has the formula M(NxCyOz), wherein M is a metal, N is nitrogen, C is carbon, and O is oxygen, wherein x=0 to 5, y=0 to 5, z=0 to (x+y), wherein (x+y)?0.1, wherein depositing the threshold voltage shifting layer further comprises one or more of the following operations: providing the substrate having a surface within a reaction chamber; providing a metal-containing precursor comprising the metal to the reaction chamber to contact the surface; providing one or more additional precursors comprising at least one of N or C to the reaction chamber to contact the surface; and/or purging the reaction chamber; and repeating one or more of the disclosed operations or any combination thereof in any order until the threshold voltage shifting layer of a predetermined thickness is deposited on the surface.
    Type: Application
    Filed: December 30, 2024
    Publication date: July 3, 2025
    Inventors: Giuseppe Alessio Verni, Suvidyakumar Vinod Homkar, Vivek Koladi Mootheri, Ren-Jie Chang, Michael Eugene Givens, Patricio Romero, Charles Dezelah, Fu Tang, Eric James Shero
  • Patent number: 12295163
    Abstract: Threshold voltage (Vt) tuning layers may be sensitive to etching by reactants used to deposit overlying gate material, such as metal nitride. Methods for depositing Vt tuning layers are provided. In some embodiments Vt tuning layers may comprise a Vt tuning material in a neutral matrix. In some embodiments, processes for reducing or eliminating the etching of Vt tuning layers by halide reactants are described. In some embodiments a Vt tuning layer, such as a metal oxide layer, is treated by a nitridation process following deposition and prior to subsequent deposition of a metal nitride capping layer. In some embodiments an etch-protective layer, such as a NbO layer, is deposited over a Vt tuning layer prior to deposition of an overlying metal nitride layer.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: May 6, 2025
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Eric James Shero, Gejian Zhao, Eric Jen Cheng Liu
  • Publication number: 20250105012
    Abstract: Aspects of the disclosure relate to the field of semiconductor devices, including methods and systems for manufacturing semiconductor devices. More particularly, semiconductor structures comprise a dipole layer, which can be formed from a metal and carbon containing layer. Further described are related methods, deposition systems, and devices.
    Type: Application
    Filed: September 25, 2024
    Publication date: March 27, 2025
    Inventors: Charles Dezelah, Giueseppe Alessio Verni, Petro Deminskyi, Balaji Kannan, Eric Jen cheng Liu, Fu Tang, Michael Givens, Eric James Shero
  • Publication number: 20250101579
    Abstract: The technology of the present disclosure generally relates to the field of capacitor devices. More particularly to Metal-Insulator-Metal capacitors (MIM CAPS) comprising a Hafnium Zirconium Oxide (HZO) layer, and a method for producing the same. Further described are related methods, deposition systems, and devices. The method for forming the doped HZO layer on a substrate, comprises the steps of providing a substrate in a reaction chamber; executing one or more cycles whereby each cycle comprising contacting a hafnium precursor, a zirconium precursor, an oxygen reactant and a dopant precursor on at least part of the substrate by introducing the precursors and reactant in the reaction chamber; the dopant precursor comprises a dopant element having three or four valence electrons and an atomic radius which is less than the atomic radius of an Hf or Zr element of the HZO layer.
    Type: Application
    Filed: September 26, 2024
    Publication date: March 27, 2025
    Inventors: Alessandra Leonhardt, Matthew Surman, Rohit Abraham John, Fu Tang, Andrea llliberi, Vivek Koladi Mootheri, Leo Lukose, Varun Sharma, Jessica Akemi Cimada da Silva
  • Publication number: 20250079160
    Abstract: Methods and systems are disclosed for depositing an oxide in a recess of a substrate, including providing the substrate in a chamber, the substrate including at least one opening to the recess where the at least one opening is bordered by a perimeter in a surface area adjacent to and outside of the recess, where the recess includes an inner surface, pulsing an inhibitor into the chamber to preferentially deposit the inhibitor in a portion of the recess adjacent to at least one opening of the recess and on at least a portion of the surface area, pulsing a precursor into the chamber to chemisorb to the inner surface within the recess, pulsing an oxygen species into the chamber to form the oxide within the recess upon contact with the chemisorbed precursor, and repeating the above recited steps to deposit the oxide to a desired thickness level within the recess.
    Type: Application
    Filed: August 27, 2024
    Publication date: March 6, 2025
    Inventors: Jereld Lee Winkler, Devika Choudhury, Fu Tang, Leonard Rodriguez
  • Publication number: 20250043422
    Abstract: A method for depositing one or more layers on a substrate is disclosed. The method may comprise providing a substrate, etching a native oxide from a surface of the substrate responsive to exposure to an etchant, contacting an etched surface of the substrate with an oxidizing agent oxidizing a first layer of the substrate responsive to contact with the oxidizing agent and depositing a second layer on the first layer.
    Type: Application
    Filed: July 29, 2024
    Publication date: February 6, 2025
    Inventors: Fu Tang, Eric Shero, Michael Eugene Givens
  • Publication number: 20250034701
    Abstract: Method, system and apparatus for forming one or more metal oxide layers on a substrate is disclosed. An example method comprises a) providing a substrate in a reaction chamber, b) flowing a first precursor comprising zinc or gallium or a combination thereof and an oxygen species into the chamber to deposit a first oxide layer on a top surface of the substrate, c) flowing a second precursor into the chamber to deposit a second oxide layer on the first oxide layer wherein the second precursor comprises aluminum having at least one R ligand and at least one L ligand, wherein the R ligand is an alkyl ligand and wherein the R ligand and the L ligand are different and repeating steps b) or c) or a combination thereof until a desired thickness of the first oxide layer or the second oxide layer, or a combination thereof is achieved.
    Type: Application
    Filed: July 24, 2024
    Publication date: January 30, 2025
    Inventors: Bo Yin, Fu Tang, Andrea Illiberi, Charles Dezelah
  • Patent number: 12094936
    Abstract: Methods for forming a metal silicate film on a substrate in a reaction chamber by a cyclical deposition process are provided. The methods may include: regulating the temperature of a hydrogen peroxide precursor below a temperature of 70° C. prior to introduction into the reaction chamber, and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclical deposition process. Semiconductor device structures including a metal silicate film formed by the methods of the disclosure are also provided.
    Type: Grant
    Filed: October 3, 2023
    Date of Patent: September 17, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Peng-Fu Hsu, Michael Eugene Givens, Qi Xie