Abstract: The present invention provides a power switch control circuit and an open detection method thereof. The power switch control circuit is for generating an operation signal at an operation signal output pin according to an input signal, wherein the operation signal is for operating a power switch. The power switch control circuit includes: a current injection circuit, which is connected to the operation signal output pin, and provides a predetermined current to the operation signal output pin according to an enable signal; and an open detection circuit, which is coupled to the current injection circuit, and determines whether a connection between the operation signal output pin and the power switch is open according to a level of the operation signal output pin at a detection time point or according to a level variation of the operation signal output pin during a detection time period, whereby an open detection signal is generated.

Abstract: A discrete-time current sense circuit includes: a current mirror circuit, which includes: a power switch, for providing the communication current; and a sampling switch, which is for sampling the communication protocol current in a sampling period in a discrete manner, to generate a sampling current; a bias circuit, for providing a reference voltage to the reference node in the sampling period according to a communication protocol voltage of the communication protocol voltage node; a signal conversion circuit, for generating the discrete-time current sense signal according to the sampling current; and a first switch, for operating to determine the sampling period; wherein the sampling period is part of a complete period in which the power switch provides the communication protocol current.

Abstract: A system and a method for passivating a surface of a semiconductor. The method includes providing the surface of the semiconductor to a reaction chamber of a reactor, exposing the surface of the semiconductor to a gas-phase metal containing precursor in the reaction chamber and exposing the surface of the semiconductor to a gas-phase chalcogenide containing precursor. The methods also include passivating the surface of the semiconductor using the gas-phase metal containing precursor and the gas-phase chalcogenide containing precursor to form a passivated surface.

Abstract: The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved.

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.

Abstract: The disclosure provides a substrate construction applicable to a 3D package, including a silicon substrate for carrying a chip on an upper side thereof, and a circuit structure formed underneath the silicon substrate for being connected to solder balls via conductive pads of the circuit structure, thereby obtaining the same specification of the conductive pads as ball-planting pads of conventional package substrates and avoiding the manufacturing and use of conventional package substrates.

Abstract: A flyback power converter circuit converting an input voltage to an output voltage includes a transformer, a power switch, a synchronous rectifier (SR) switch, and a secondary side control circuit. The secondary side control circuit controls the SR switch to be ON when the power switch is OFF. The secondary side control circuit includes a driving switch for controlling the SR switch, a synchronous control circuit powered by a voltage related to the output voltage, which controls the driving switch to operate the SR switch, and a clamping circuit including a clamping switch and a clamping switch control circuit. The clamping switch control circuit controls the clamping switch according to a current inflow terminal voltage of the clamping switch and/or the voltage related to the output voltage, such that, during a secondary side power-on period, an equivalent impedance of the current inflow terminal of the clamping switch is smaller than a predetermined clamping impedance.

Abstract: A switching regulator includes: a controller power ON reset (POR) circuit, a controller post-POR signal generation circuit, and a pulse width modulation (PWM) signal generation circuit. The controller post-POR signal generation circuit switches the controller post-POR signal to a ready level after a controller pre-POR signal is switched to a controller reset-accomplished level and a driver signal starts switching levels to operate a power switch. The PWM signal generation circuit sets a duty ratio of a PWM signal to a predetermined minimum duty ratio after the controller pre-POR signal is switched to the controller reset-accomplished level and before the controller post-POR signal is switched to a ready level.

Abstract: The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved.

Abstract: An electronic package is provided, including: a first substrate having a first insulating portion; a first electronic component disposed on the first substrate; a second substrate having a second insulating portion and stacked on the first substrate through a plurality of conductive elements; and a first encapsulant formed between the first substrate and the second substrate. The first insulating portion of the first substrate differs in rigidity from the second insulating portion of the second substrate. As such, during a high temperature process, one of the first substrate and the second substrate pulls at the other to bend toward the same direction, thereby reducing warpage deviation of the overall electronic package. The present invention further provides a method for fabricating the electronic package.

Abstract: A flyback power converter includes a transformer having an auxiliary winding for generating an auxiliary voltage and providing a supply voltage on a supply node; a primary side controller circuit which is powered by the supply voltage from the supply node; and a high voltage (HV) start-up circuit. The HV start-up circuit is coupled to an high voltage signal through a HV input terminal and generates the supply voltage through a supply output terminal, wherein when the supply voltage does not exceed a start-up voltage threshold, a HV start-up switch conducts the HV input terminal and the supply output terminal to provide the supply voltage, and when the supply voltage exceeds a start-up voltage threshold, the HV start-up switch is OFF. The HV start-up circuit and the primary side controller circuit are packaged in two separate integrated circuit packages respectively.

Abstract: A switching regulator includes: a controller power ON reset (POR) circuit, a controller post-POR signal generation circuit, and a pulse width modulation (PWM) signal generation circuit. The controller post-POR signal generation circuit switches the controller post-POR signal to a ready level after a controller pre-POR signal is switched to a controller reset-accomplished level and a driver signal starts switching levels to operate a power switch. The PWM signal generation circuit sets a duty ratio of a PWM signal to a predetermined minimum duty ratio after the controller pre-POR signal is switched to the controller reset-accomplished level and before the controller post-POR signal is switched to a ready level.

Abstract: A flyback power converter includes: a transformer, a power switch, a switch control unit, a synchronous rectifier switch and a secondary side control circuit. The secondary side control circuit includes: a switch signal generation circuit and a first power conversion circuit. The secondary side control circuit is coupled to the synchronous rectifier switch and the secondary winding of the transformer. The switch signal generation circuit generates the synchronous rectifier switch signal selectively according to a first power or a second power, to control the synchronous rectifier switch. The first power is related to the output voltage. The first power conversion circuit generates the second power according to a secondary phase signal on a phase node between the secondary winding of the transformer and the synchronous rectifier switch.

Abstract: A method for fabricating an electronic package is provided, including steps of: providing a carrier having at least an electronic element and at least a package block disposed thereon, wherein the package block has a plurality of conductive posts bonded to the carrier; forming an encapsulant on the carrier for encapsulating the electronic element and the package block; and removing the carrier so as to expose the electronic element and the conductive posts from a surface of the encapsulant. As such, the invention dispenses with formation of through holes in the encapsulant for forming the conductive posts as in the prior art, thereby saving the fabrication cost.

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

Abstract: A semiconductor package is provided, including: a substrate; a first semiconductor element disposed on the substrate and having a first conductive pad grounded to the substrate; a conductive layer formed on the first semiconductor element and electrically connected to the substrate; a second semiconductor element disposed on the first semiconductor element through the conductive layer; and an encapsulant formed on the substrate and encapsulating the first and second semiconductor elements. Therefore, the first and second semiconductor elements are protected from electromagnetic interference (EMI) shielding with the conductive layer being connected to the grounding pad of the substrate. A fabrication method of the semiconductor package is also provided.

Abstract: A flyback power converter includes a transformer having an auxiliary winding for generating an auxiliary voltage and providing a supply voltage on a supply node; a primary side controller circuit which is powered by the supply voltage from the supply node; and a high voltage (HV) start-up circuit. The HV start-up circuit is coupled to an high voltage signal through a HV input terminal and generates the supply voltage through a supply output terminal, wherein when the supply voltage does not exceed a start-up voltage threshold, a HV start-up switch conducts the HV input terminal and the supply output terminal to provide the supply voltage, and when the supply voltage exceeds a start-up voltage threshold, the HV start-up switch is OFF. The HV start-up circuit and the primary side controller circuit are packaged in two separate integrated circuit packages respectively.

Abstract: A computer aided medical method include following steps. An initial symptom is collected through an interaction interface. A representative prediction model is selected from plural candidate prediction models according to the initial symptom. The candidate prediction models are trained by a machine learning algorithm according to clinical data. A series of sequential actions is generated according to the representative prediction model and the initial symptom. The sequential actions are selected from plural candidate actions in the representative prediction model. The candidate actions include plural inquiry actions and plural disease prediction actions. Each of the sequential actions is one of the inquiry actions or the disease prediction actions. The series of sequential actions is displayed on the interaction interface.

Abstract: A computer aided medical method includes the following steps. An initial symptom of a patient and context information is collected through an interaction interface. Actions in a series are sequentially generated according to the candidate prediction models and the initial symptom. Each of the actions corresponds to one of the inquiry actions or one of the disease prediction actions. If the latest one of the sequential actions corresponds to one of the disease prediction actions, potential disease predictions are generated in a first ranking evaluated by the candidate prediction models. The first ranking is adjusted into a second ranking according to the context information. A result prediction corresponding to the potential disease predictions is generated in the second ranking.