Abstract: A method includes adding a first additive to an electroplating solution, wherein the first additive is a relatively weak suppressing agent; adding a second additive to the electroplating solution, wherein the second additive is a relatively strong suppressing agent; adding a third additive to the electroplating solution, wherein the third additive is a leveling agent; and depositing copper using the electroplating solution, wherein most of the copper is nanotwinned grains having a (111)-orientation.

Abstract: A semiconductor device includes anti-fuse cells. The anti-fuse cells include a first active area, a first gate, a second gate, at least one first gate via, and at least one second gate via. The first gate and the second gate are separate from each other. The first gate and the second gate extend to cross over the first active area. The at least one first gate via is coupled to the first gate and disposed directly above the first active area. The at least one second gate via is coupled to the second gate. The first gate is coupled through the at least one first gate via to a first word line for receiving a first programming voltage, and the second gate is coupled through the at least one second gate via to a second word line for receiving a first reading voltage.

Abstract: An unmanned aerial vehicle (UAV) having a dismantling status determination system is provided. The UAV includes a casing, having at least one casing assembly, and a dismantling status determination system. The dismantling status determination system includes a dismantling detection unit, a position detection unit, a storage unit, and a processing unit. The dismantling detection unit is disposed on the at least one casing assembly to provide a body status information according to whether the at least one casing assembly is detached. The position detection unit detects a current position of the UAV. The storage unit stores a safe position list. When the processing unit determines that the at least one casing assembly is in the dismantling status, the processing unit determines whether the current position is included in the safe position list. If not, the processing unit determines that the dismantling status corresponds to an illegal dismantling action.

Abstract: A method for operating an emergency charging device includes when a mutual charging switch of the emergency charging device is triggered, setting a plurality of batteries whose power is lower than a predetermined threshold as a target battery group, selecting a battery with a highest capacity from the target battery group as a battery to be recharged, selecting a battery with a capacity lower than the battery to be recharged from the target battery group as a discharge battery, and charging the battery to be recharged from the discharge battery.

Abstract: A method includes: coupling a first gate to a first word line through a first gate via, wherein the first gate extends along a first direction; coupling the first gate to a second word line through a second gate via, wherein each of the first gate, a second gate, the first gate via and the second gate via is disposed on a first active area which extends along the second direction, wherein the second gate extends along the first direction and is separated from the first gate along a second direction; coupling the first active area to a first bit line through a first conductive via; and aligning the first gate via, the second gate via and the a first conductive via with each other along the second direction.

Abstract: An integrated circuit includes a memory cell array, a row decoder configured to generate a first decoder signal, a column decoder configured to generate a second decoder signal, and an array of write assist circuits coupled to the row and column decoder and the memory cell array. Each write assist circuit is configured to set an operating voltage of a corresponding memory cell, and generate the output signal in response to a first control signal. The operating voltage corresponds to an output signal. Each write assist circuit includes an AND gate coupled to a programmable voltage tuner. The programmable voltage tuner includes a set of P-type transistors coupled to a first P-type transistor. The set of P-type transistors is coupled together in parallel, and receives a set of select control signals. A first terminal of the first P-type transistor is configured to receive an AND signal from the AND gate.

Abstract: An image displaying device includes a planar display panel and a light penetrating unit. The planar display panel displays a plane image. The planar display panel at least includes a first pixel group, a second pixel group and a third pixel group. The second pixel group is located between the first pixel group and the third pixel group. When vision passes through the light penetrating unit toward the planar display panel, the vision acquires a second distance of a second imaging position within the plane image relevant to the second pixel group relative to the planar display panel being greater than a first distance of a first imaging position within the plane image relevant to the first pixel group relative to the planar display panel and a third distance of a third imaging position within the plane image relevant to the third pixel group relative to the planar display panel.

Abstract: A semiconductor device includes anti-fuse cells. The anti-fuse cells include a first active area, a first gate, a second gate, at least one first gate via, and at least one second gate via. The first gate and the second gate are separate from each other. The first gate and the second gate extend to cross over the first active area. The at least one first gate via is coupled to the first gate and disposed directly above the first active area. The at least one second gate via is coupled to the second gate. The first gate is coupled through the at least one first gate via to a first word line for receiving a first programming voltage, and the second gate is coupled through the at least one second gate via to a second word line for receiving a first reading voltage.

Abstract: A landing/takeoff response system and method for an UAV, including a fuselage having a housing and a flight power module connected to the fuselage, are provided. The system includes a first sensor for detecting a first sensing information, at least one second sensor for detecting a second sensing information, and a processing unit coupled to the first sensor and the second sensor. The first sensor is disposed on a bottom portion of the housing at a position below a center of gravity of the UAV. The second sensor is disposed on a side portion of the housing adjacent to the bottom portion. The processing unit is configured to: determine whether the first sensing information satisfies a first contact condition to determine a landing/takeoff operation of the UAV; and determine whether the second sensing information satisfies a second contact condition to determine an on/off status of the flight power module.

Abstract: A ballbar testing tune-up method for machine tool includes the steps of letting a machine tool system execute a ballbar test; obtaining a phase characteristic and a peak-value characteristic; creating a Lagrange interpolation polynomial and inputting a servo controller parameter, a phase characteristic and a peak-value characteristic of the machine tool system each time when executing the ballbar test, and obtaining a proposed servo parameter. This method is simple and easy without incurring additional equipment costs, but just using existing equipment to find the proposed servo parameter quickly and input it into a machine tool system, so as to improve the response issue of a servo system and reduce manufacturing contour error to enhance the working precision of the machine tool system.

Abstract: An unmanned vehicle includes a body and a plurality of battery packs. The battery packs are detachably stacked on the body, wherein the body sequentially uses the power of the battery packs in an anti-gravity direction.

Abstract: A memory circuit includes a NAND logic gate configured to receive a first bit line signal and a second bit line signal, and to generate a first signal. The memory circuit further includes a first P-type transistor coupled to the NAND logic gate, and configured to receive a first clock signal. The memory circuit further includes a first N-type transistor coupled to the NAND logic gate, and configured to receive a first pre-charge signal. The memory circuit further includes a first latch coupled to the NAND logic gate, and configured to latch the first signal in response to at least the first clock signal or the first pre-charge signal.

Abstract: A biochip includes a chip unit and an elastic pad. The chip unit comprises a plurality of liquid inlets arranged at intervals, and a plurality of micro flow channels respectively communicating with the liquid inlets. The elastic pad has an upper surface and a lower surface, and the lower surface is pasted on the chip unit. The elastic pad includes a plurality of guide channels arranged at intervals and penetrating the upper surface and the lower surface of the elastic pad. The guide channels respectively correspond to the liquid inlets of the chip unit. Each guide channel has an upper guiding section, and the diameter of the upper guiding section is gradually reduced from top to bottom. The detection liquid can enter the chip unit more quickly through the guide channel and improving the detection efficiency and accuracy. The invention also provides a connector module used in conjunction with the biochip.

Abstract: A wafer processing method including following steps is provided. A release layer is formed on a first wafer. An adhesive layer is formed on a second wafer. One of the first wafer and the second wafer is a device wafer. The device wafer includes a valid die region and a trimming region. A handler is applied to place the first wafer on the second wafer, so that the release layer and the adhesive layer are bonded to each other, and the adhesive layer completely covers the valid die region. During the process of placing the first wafer on the second wafer, the handler directly moves the first wafer.

Abstract: A vehicle-based monitoring system, a vehicle-based monitoring method, and a drone are provided. The monitoring method includes: capturing a first image by a first image capture device of the vehicle; extending a feedback interval of the first image by the vehicle in response to a first included angle between a first line of sight of the first image capture device and a travel direction of the vehicle being greater than an angle threshold; and feedbacking the first image according to the feedback interval by the vehicle.

Abstract: Disclosed herein is an integrated circuit including multiple magnetic tunneling junction (MTJ) cells coupled to a static random access memory (SRAM). In one aspect, the integrated circuit includes a SRAM having a first port and a second port, and a set of pass transistors coupled to the first port of the SRAM. In one aspect, the integrated circuit includes a set of MTJ cells, where each of the set of MTJ cells is coupled between a select line and a corresponding one of the set of pass transistors.

Abstract: A phase and an amplitude improving method includes performing a model establishing step, a phase compensating step, an amplitude compensating step and a compensation information generating step. The model establishing step includes establishing an inverter model. A voltage command is inputted to the inverter model to generate an actual voltage information. The voltage command includes a phase command information and an amplitude command information. The phase compensating step includes computing the phase command information and the actual voltage information to generate a compensating phase information. The amplitude compensating step includes computing the amplitude command information and the actual voltage information to generate a compensating amplitude information. The compensation information generating step includes generating a compensating voltage command. The compensating voltage command is inputted to the inverter model to generate a compensating actual voltage information.

Abstract: An calibration kit includes a base, a combination of calibration parts, and a manipulation part. The combination of calibration parts is disposed on the base and includes a first calibration part and a second calibration part. The first calibration part has a first calibration surface. The second calibration part has a second calibration surface. The first calibration part and the second calibration part are relatively movable in a movement direction and are movable relative to the base. The manipulation part is movably or rotatably disposed on the base. The manipulation part is configured to be operable to drive the first calibration part and the second calibration part to move in the movement direction relative to the base, so that the combination of calibration parts forms a three-dimensional calibration surface configuration through the first calibration surface and the second calibration surface.