Abstract: The present invention is a semiconductor metallization process for providing complete via fill on a substrate and a planar metal surface, wherein the vias are free of voids and the metal surface is free of grooves. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A PVD metal layer, such as PVD Al or PVD Cu, is then deposited onto the refractory layer at a pressure below about 1 milliTorr to provide a conformal PVD metal layer. Then the vias or contacts are filled with metal, such as by reflowing additional metal deposited by physical vapor deposition on the conformal PVD metal layer. The process is preferably carried out in an integrated processing system that includes a long throw PVD chamber, wherein a target and a substrate are separated by a long throw distance of at least 100 mm, and a hot metal PVD chamber that also serves as a reflow chamber.

Abstract: The present invention relates to plasma-enhanced chemical vapor deposition (PECVD) and related chamber hardware. Embodiments of the present invention include a PECVD system for depositing a film of titanium nitride from a TDMAT precursor. The present invention broadly provides a chamber, a gas delivery assembly, a pedestal which supports a substrate, and a plasma system to process substrates. In general, the invention includes a chamber body and a gas delivery assembly disposed thereon to define a chamber cavity. A pedestal movably disposed within the chamber cavity is adapted to support a substrate during processing. The gas delivery assembly is supported by the chamber body and includes a temperature control plate and a showerhead mounted thereto. Preferably, the interface between the showerhead and temperature control plate is parallel to a radial direction of the gas delivery assembly to accommodate lateral thermal expansion without separation of the showerhead and the temperature control plate.

Abstract: The present invention is a semiconductor metallization process for providing complete via fill on a substrate and a planar metal surface, wherein the vias are free of voids and the metal surface is free of grooves. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A PVD metal layer, such as PVD Al or PVD Cu, is then deposited onto the refractory layer at a pressure below about 1 milliTorr to provide a conformal PVD metal layer. Then the vias or contacts are filled with metal, such as by reflowing additional metal deposited by physical vapor deposition on the conformal PVD metal layer. The process is preferably carried out in an integrated processing system that includes a long throw PVD chamber, wherein a target and a substrate are separated by a long throw distance of at least 100 mm, and a hot metal PVD chamber that also serves as a reflow chamber.

Abstract: The present invention provides for improved liquid vaporizer systems and methods for their use. Vaporizer systems of the present invention are likely to be particularly useful for the vaporization of liquids having a relatively low vapor pressure, such as TDMAT. In one preferred embodiment, a liquid vaporizer system (10) includes a vaporizer unit (16) having first and second inlets (50 and 60) and an outlet (62). The vaporizer system further includes a vessel (22) having an inlet (70) and an outlet (72), whereby the vessel inlet is operably connected to the vaporizer outlet. The vessel contains a plurality of passages (78) which operably connect the vessel inlet and the vessel outlet. In this manner, liquids and/or gases flowing into the vaporizer unit through either or both of its two inlets, exit the vaporizer unit outlet and enter the vessel inlet. Liquids and/or gases pass through the plurality of passages and exit the vessel outlet.

Abstract: The present invention is a semiconductor metallization process for providing complete via fill on a substrate and a planar metal surface, wherein the vias are free of voids and the metal surface is free of grooves. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A PVD metal layer, such as PVD Al or PVD Cu, is then deposited onto the refractory layer at a pressure below about 1 milliTorr to provide a conformal PVD metal layer. Then the vias or contacts are filled with metal, such as by reflowing additional metal deposited by physical vapor deposition on the conformal PVD metal layer. The process is preferably carried out in an integrated processing system that includes a long throw PVD chamber, wherein a target and a substrate are separated by a long throw distance of at least 100 mm, and a hot metal PVD chamber that also serves as a reflow chamber.

Abstract: The present invention is a method of wafer processing which improves the reliability of an integrated titanium (Ti)/titanium nitride (TiN) CVD film formed from a reaction of titanium tetrachloride (TiCi4) and ammonia (NH3). A Ti film is subject to a treatment of NH3 gas to render the Ti film unreactive towards attack by chlorine and hydrogen chloride. A thin seed layer of TiN film is deposited upon the treated Ti film using a thermal TiCl4/NH3 reaction. Subsequent TiN film deposition upon the seed layer results in a successful integration of a Ti/TiN film stack for a Ti film thickness up to about 300 Å.

Abstract: The present invention provides methods and systems for forming deposition films on semiconductor wafers. In particular, the present invention measures the amount of liquid remaining in a bubbler ampule of a semiconductor processing system used for chemical vapor deposition (CVD) on a semiconductor wafer. More particularly, measurements are made when gas has stopped flowing through the ampule, and the liquid is in a static condition. The system of the present invention comprises a container containing a liquid, a gas inlet for introduction of gas into the liquid, a gas outlet, and a pressure transducer fluidly connected to the gas inlet and the gas outlet. The device measures the amount of liquid in a bubbler ampule through measurements of gas pressure differential between gas exiting a nozzle near the bottom of the liquid and gas located above the level of the liquid. The depth of liquid remaining in the ampule may be extrapolated from the measured pressure differential.

Abstract: The present invention provides for improved liquid vaporizer systems and methods for their use. Vaporizer systems of the present invention are likely to be particularly useful for the vaporization of liquids having a relatively low vapor pressure, such as TDMAT. In one preferred embodiment, a liquid vaporizer system (10) includes a vaporizer unit (16) having first and second inlets (50 and 60) and an outlet (62). The vaporizer system further includes a vessel (22) having an inlet (70) and an outlet (72), whereby the vessel inlet is operably connected to the vaporizer outlet. The vessel contains a plurality of passages (78) which operably connect the vessel inlet and the vessel outlet. In this manner, liquids and/or gases flowing into the vaporizer unit through either or both of its two inlets, exit the vaporizer unit outlet and enter the vessel inlet. Liquids and/or gases pass through the plurality of passages and exit the vessel outlet.

Abstract: A vacuum processing system is provided with a programmable interlock circuit for combining the interlock signals generated by the system into combined interlock signals. The programmable interlock circuit uses a matrix of switches to select which interlocks will be combined to form which combinations. The interlock signals are formed by two lines that are shorted together when the interlock signal is okay and not shorted together when the interlock signal is not okay. When the two lines are shorted together, then they activate a relay to send a signal in a line of relays, each of which is activated by a different interlock signal. The matrix of switches short out the relay switches in order to deselect one interlock input for one interlock output. Each interlock signal is associated with an LED for visual indication of whether the interlock is okay. Likewise, each combined interlock signal is associated with an LED for visual indication of whether the combination of interlocks is okay.