Patents by Inventor Fumihiro Inui

Fumihiro Inui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240073562
    Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Mineo Shimotsusa, Fumihiro Inui
  • Patent number: 11843886
    Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Fumihiro Inui
  • Patent number: 11843014
    Abstract: A photoelectric conversion apparatus includes a semiconductor substrate, a floating diffusion, an amplifying transistor, first and second contact plugs, a wire, and a metal portion. The semiconductor substrate has a first plane and a second plane to be entered by light, and includes a photoelectric conversion element. The amplifying transistor includes a first gate electrode. The first contact plug is connected to the floating diffusion. The second contact plug is connected to the first gate electrode. The wire is configured to electrically connect the first gate electrode and the floating diffusion to each other. The metal portion, which is arranged between the first plane and a third plane, covers at least a part of the photoelectric conversion element in a planar view, and has an opening over which at least a part of the wire is superimposed in a planar view.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yusuke Onuki, Fumihiro Inui
  • Publication number: 20230343798
    Abstract: Provided is a photoelectric conversion device including: a first substrate having a first face; photodiodes arranged in the first substrate and each having a first region that generates signal charges by photoelectrically converting an incident light and a second region that receives the signal charges moving from the first region; a first isolation region arranged in the first substrate at a first depth and including a first portion extending in a first direction so as to isolate the second regions from each other; and a second isolation region arranged in the first substrate at a second depth deeper than the first depth from the first face, and including a second portion extending in a second direction intersecting the first direction in plan view so as to isolate the first regions from each other, and the first and second portions are partially overlapped with each other in plan view.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 26, 2023
    Inventors: Fumihiro Inui, Junji Iwata, Hajime Ikeda, Koichi Fukuda, Kohei Okamoto
  • Patent number: 11784195
    Abstract: An apparatus includes a photodiode including an anode and a cathode, a switch connected to a node of one of the anode and the cathode and to a power supply line via which a driving voltage is supplied, and functioning to switch a resistance value between the node and the power supply line, and a generation unit configured to generate a pulse signal for controlling switching of the switch. The apparatus is operable in one of two modes including a first mode and a second mode, the second mode being usable in a lower luminance condition than a luminance condition in the first mode. In an exposure period for acquiring one frame of signals, the number of pulse signals in the second mode is smaller than in the first mode.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: October 10, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Morimoto, Wataru Endo, Fumihiro Inui
  • Patent number: 11742364
    Abstract: Provided is a photoelectric conversion device including: a first substrate having a first face; photodiodes arranged in the first substrate and each having a first region that generates signal charges by photoelectrically converting an incident light and a second region that receives the signal charges moving from the first region; a first isolation region arranged in the first substrate at a first depth and including a first portion extending in a first direction so as to isolate the second regions from each other; and a second isolation region arranged in the first substrate at a second depth deeper than the first depth from the first face, and including a second portion extending in a second direction intersecting the first direction in plan view so as to isolate the first regions from each other, and the first and second portions are partially overlapped with each other in plan view.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: August 29, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Fumihiro Inui, Junji Iwata, Hajime Ikeda, Koichi Fukuda, Kohei Okamoto
  • Patent number: 11528445
    Abstract: A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: December 13, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Katsuhito Sakurai, Yoshiaki Takada, Takahiro Shirai, Hideo Kobayashi, Kohichi Nakamura, Daisuke Yoshida, Fumihiro Inui
  • Patent number: 11502118
    Abstract: An imaging device is provided in which a shield wiring is arranged between signal lines of a first set out of a plurality of signal lines, and, in which signal lines of a second set out of a plurality of signal lines are adjacent to each other.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: November 15, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yoichi Wada, Daisuke Yoshida, Fumihiro Inui
  • Patent number: 11431929
    Abstract: Photoelectric conversion device includes stacked first and second substrates. The first substrate includes pixel array, first joint portion arranged in the pixel array and connected to pixels in the pixel array, and power supply pad connected to the first joint portion. The second substrate includes readout circuit to read signal from the pixel array via signal line, and second joint portion jointed to the first joint portion. The readout circuit includes limiter circuit to limit amplitude of potential of the signal line. Power supply terminal of the limiter circuit is connected to the second joint portion, and power supply potential applied to the power supply pad is supplied to the pixels and supplied to the power supply terminal of the limiter circuit via the first and second joint portions.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: August 30, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, Daisuke Yoshida, Fumihiro Inui
  • Patent number: 11393870
    Abstract: Provided is a photoelectric conversion device including: a pixel including a plurality of photoelectric conversion units; and a select unit configured to control each of the plurality of photoelectric conversion units to be in an active state or an inactive state. The plurality of photoelectric conversion units has a first group including a first avalanche diode and a second group including a second avalanche diode. The select unit controls the second group to be in the inactive state in a first case of controlling the first group to be in the active state, and the select unit controls the first group to be in the inactive state in a second case of controlling the second group to be in the active state. The pixel has no photoelectric conversion unit which is in the active state in both the first case and the second case.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: July 19, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Fumihiro Inui, Junji Iwata
  • Publication number: 20220216251
    Abstract: An apparatus includes a photodiode including an anode and a cathode, a switch connected to a node of one of the anode and the cathode and to a power supply line via which a driving voltage is supplied, and functioning to switch a resistance value between the node and the power supply line, and a generation unit configured to generate a pulse signal for controlling switching of the switch. The apparatus is operable in one of two modes including a first mode and a second mode, the second mode being usable in a lower luminance condition than a luminance condition in the first mode. In an exposure period for acquiring one frame of signals, the number of pulse signals in the second mode is smaller than in the first mode.
    Type: Application
    Filed: December 22, 2021
    Publication date: July 7, 2022
    Inventors: Kazuhiro Morimoto, Wataru Endo, Fumihiro Inui
  • Publication number: 20220115430
    Abstract: A photoelectric conversion apparatus includes a semiconductor substrate, a floating diffusion, an amplifying transistor, first and second contact plugs, a wire, and a metal portion. The semiconductor substrate has a first plane and a second plane to be entered by light, and includes a photoelectric conversion element. The amplifying transistor includes a first gate electrode. The first contact plug is connected to the floating diffusion. The second contact plug is connected to the first gate electrode. The wire is configured to electrically connect the first gate electrode and the floating diffusion to each other. The metal portion, which is arranged between the first plane and a third plane, covers at least a part of the photoelectric conversion element in a planar view, and has an opening over which at least a part of the wire is superimposed in a planar view.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Inventors: Yusuke Onuki, Fumihiro Inui
  • Patent number: 11268851
    Abstract: A photoelectric conversion apparatus includes a first substrate including a pixel array, a second substrate including a readout circuit configured to read out a signal from the pixel array, and a drive terminal to which a drive potential is externally applied. The readout circuit includes a first node to which the drive potential is supplied from the drive terminal via an electrically conductive line arranged in the pixel array, and a second node to which the drive potential is supplied from the drive terminal without going through the pixel array.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: March 8, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, Fumihiro Inui, Daisuke Yoshida
  • Patent number: 11239272
    Abstract: A photoelectric conversion apparatus includes a semiconductor substrate, a floating diffusion, an amplifying transistor, first and second contact plugs, a wire, and a metal portion. The semiconductor substrate has a first plane and a second plane to be entered by light, and includes a photoelectric conversion element. The amplifying transistor includes a first gate electrode. The first contact plug is connected to the floating diffusion. The second contact plug is connected to the first gate electrode. The wire is configured to electrically connect the first gate electrode and the floating diffusion to each other. The metal portion, which is arranged between the first plane and a third plane, covers at least a part of the photoelectric conversion element in a planar view, and has an opening over which at least a part of the wire is superimposed in a planar view.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: February 1, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yusuke Onuki, Fumihiro Inui
  • Publication number: 20210368121
    Abstract: A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.
    Type: Application
    Filed: August 4, 2021
    Publication date: November 25, 2021
    Inventors: Katsuhito Sakurai, Yoshiaki Takada, Takahiro Shirai, Hideo Kobayashi, Kohichi Nakamura, Daisuke Yoshida, Fumihiro Inui
  • Publication number: 20210368120
    Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
    Type: Application
    Filed: August 3, 2021
    Publication date: November 25, 2021
    Inventors: Mineo Shimotsusa, Fumihiro Inui
  • Publication number: 20210296383
    Abstract: Provided is a photoelectric conversion device including: a first substrate having a first face; photodiodes arranged in the first substrate and each having a first region that generates signal charges by photoelectrically converting an incident light and a second region that receives the signal charges moving from the first region; a first isolation region arranged in the first substrate at a first depth and including a first portion extending in a first direction so as to isolate the second regions from each other; and a second isolation region arranged in the first substrate at a second depth deeper than the first depth from the first face, and including a second portion extending in a second direction intersecting the first direction in plan view so as to isolate the first regions from each other, and the first and second portions are partially overlapped with each other in plan view.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Inventors: Fumihiro Inui, Junji Iwata, Hajime Ikeda, Koichi Fukuda, Kohei Okamoto
  • Patent number: 11108986
    Abstract: A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: August 31, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Katsuhito Sakurai, Yoshiaki Takada, Takahiro Shirai, Hideo Kobayashi, Kohichi Nakamura, Daisuke Yoshida, Fumihiro Inui
  • Patent number: 11108982
    Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: August 31, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Fumihiro Inui
  • Publication number: 20210258529
    Abstract: A unit circuit includes a photoelectric conversion element, an output transistor including an input node and configured to output a signal based on a charge from the photoelectric conversion element, a reset transistor, and a first transistor connected to the input node and configured to change a capacitance of the input node. A first control signal supplied to a gate electrode of the first transistor has at least three types of voltages.
    Type: Application
    Filed: April 30, 2021
    Publication date: August 19, 2021
    Inventors: Yu Arishima, Masahiro Kobayashi, Koichiro Iwata, Fumihiro Inui