Patents by Inventor Fumihiro Minami

Fumihiro Minami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096654
    Abstract: A substrate processing method includes: increasing a temperature of a substrate by heating the substrate; after the increasing the temperature of the substrate, forming a liquid film of a pre-wetting liquid on a first surface of the substrate by supplying the pre-wetting liquid to the first surface of the substrate while heating and rotating the substrate at a first rotational speed; after the forming the liquid film, processing the first surface of the substrate with a chemical liquid by supplying the chemical liquid to the first surface of the substrate while heating and rotating the substrate at a second rotational speed that is lower than the second rotational speed; and after the processing the first surface of the substrate, decreasing the temperature of the substrate.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: Fumihiro KAMIMURA, Masatoshi KASAHARA, Teruomi MINAMI, Ikuo SUNAKA
  • Patent number: 9587795
    Abstract: In a headlight for in-vehicle use, an LED serving as an optical source is provided in which one edge side of its light-emitting face is formed into a linear portion and placed at a side of an optical axis so that the center of the light-emitting face is displaced from the optical axis. A projection lens is constituted by a radiation-side convex lens and an LED-side convex lens that are arranged in a direction of the optical axis. Between the LED and the projection lens, a light distribution member is placed that is formed using a transparent material and has, on its inner surface, a reflection face for reflecting light emitted by the LED.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: March 7, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takashi Ohsawa, Masato Kurahashi, Fumihiro Minami
  • Publication number: 20160146417
    Abstract: In a headlight for in-vehicle use, an LED serving as an optical source is provided in which one edge side of its light-emitting face is formed into a linear portion and placed at a side of an optical axis so that the center of the light-emitting face is displaced from the optical axis. A projection lens is constituted by a radiation-side convex lens and an LED-side convex lens that are arranged in a direction of the optical axis. Between the LED and the projection lens, a light distribution member is placed that is formed using a transparent material and has, on its inner surface, a reflection face for reflecting light emitted by the LED.
    Type: Application
    Filed: September 17, 2013
    Publication date: May 26, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takashi OHSAWA, Masato KURAHASHI, Fumihiro MINAMI
  • Patent number: 9243768
    Abstract: In an LED2 having a directionality in an emission direction of emitted light, light emitted from a light emitting surface of the LED 2 is refracted by a semi-cylindrical concave lens 3 to be enlarged in the circumference direction of an optical axis of a headlight 1; thus, even when the LED2 is applied to a headlight that is constituted by optical members that are similar to optical members that are compatible with conventional light sources having no directionality, such as an incandescent lamp, a discharge lamp and the like, it can be used as a light source for headlight that is capable of illuminating the right and left directions ahead of a vehicle with a sufficient brightness.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: January 26, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Fumihiro Minami, Javier Escobar, Takashi Ohsawa
  • Publication number: 20150219300
    Abstract: In a projector-type headlight in which a light-emitting face of an LED 1 is placed perpendicular to an optical axis so that light emitted by the LED 1 is projected ahead of a vehicle through a convex lens 2, the light-emitting face is placed upward from the optical axis of the headlight, and a lower edge side 1a of the light-emitting face is formed into a linear shape and is placed on the optical axis, and a reflection face 3a is placed in a plane formed by the optical axis and the linear-shape edge side 1a of the LED 1 to thereby combine direct light emitted by the LED 1 and reflection light reflected on the reflection face 3a, so that an intensity of light emitted in a direction normal to the light-emitting face from the edge side 1a is enhanced.
    Type: Application
    Filed: August 28, 2012
    Publication date: August 6, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Naohiro Kishi, Fumihiro Minami, Takashi Ohsawa
  • Publication number: 20140340923
    Abstract: In an LED2 having a directionality in an emission direction of emitted light, light emitted from a light emitting surface of the LED 2 is refracted by a semi-cylindrical concave lens 3 to be enlarged in the circumference direction of an optical axis of a headlight 1; thus, even when the LED2 is applied to a headlight that is constituted by optical members that are similar to optical members that are compatible with conventional light sources having no directionality, such as an incandescent lamp, a discharge lamp and the like, it can be used as a light source for headlight that is capable of illuminating the right and left directions ahead of a vehicle with a sufficient brightness.
    Type: Application
    Filed: March 6, 2012
    Publication date: November 20, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Fumihiro Minami, Javier Escobar, Takashi Ohsawa
  • Publication number: 20130044504
    Abstract: There is provided a light source lighting device for a headlamp including: a headlamp case to which a front lens is attached; and a planar fixation section that is inserted into the headlamp case, together with an optical component having a light source, from a front opening portion formed in the headlamp case, and that is fixed along an inner wall of the headlamp case.
    Type: Application
    Filed: July 5, 2010
    Publication date: February 21, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroki Ushio, Fumihiro Minami, Takashi Ohsawa
  • Patent number: 8235553
    Abstract: A lighting device for a headlamp light source includes an connector to be connected to cables for supplying power to the light source, and attached to the bottom of a headlamp case that houses a light source, wherein the output connector is formed such that when the lighting device is attached to the headlamp case, the bottom of a connection opening to which cables of the output connector are connected is disposed at a higher position than a bottom face inside the headlamp case.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: August 7, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Fumihiro Minami, Takashi Ohsawa
  • Publication number: 20110280035
    Abstract: A lighting device for a headlamp light source includes an connector to be connected to cables for supplying power to the light source, and attached to the bottom of a headlamp case that houses a light source, wherein the output connector is formed such that when the lighting device is attached to the headlamp case, the bottom of a connection opening to which cables of the output connector are connected is disposed at a higher position than a bottom face inside the headlamp case.
    Type: Application
    Filed: November 4, 2009
    Publication date: November 17, 2011
    Inventors: Fumihiro Minami, Takashi Ohsawa
  • Patent number: 8026537
    Abstract: A semiconductor integrated circuit includes a function block arranged on a substrate, a first buffering cell arranged adjacent to a first side of the function block, a second buffering cell arranged adjacent to a second side adjacent to the first side of the function block, and signal wiring passing over the function block obliquely relative to the first side and the second side, connecting the first buffering cell and the second buffering cell.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: September 27, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naohito Kojima, Fumihiro Minami, Kimiyoshi Usami
  • Publication number: 20110102121
    Abstract: A sheet transformer includes a first core having central and lateral legs penetrating a coil on a circuit board, a plate-shaped second core positioned on an end of the first core, the cores being assembled into an integral piece and an air gap being formed between the central leg and the second core, and a fixing member for fixing the cores with respect to the coil. The fixing member has holder portions having claw portions for holding the lateral legs of the first core from a side of the second core respectively, a first spring portion extending from a side of the second core toward the circuit board, for bringing inner plane portions of the legs of the first core into contact with the coil, and a second spring portion for pressing positions of the second core which are opposite to the lateral legs.
    Type: Application
    Filed: July 2, 2009
    Publication date: May 5, 2011
    Inventors: Yasunori Otsuka, Takashi Osawa, Fumihiro Minami
  • Publication number: 20110041104
    Abstract: A semiconductor circuit pattern design method includes the following operations. A design pattern is created by placing a plurality of cells in each functional block as a unit of the semiconductor circuit and executing routing among the plurality of placed cells. Mask pattern data based on the design pattern is created. A predictive pattern to be formed on the substrate by the mask pattern data is predicted. A difference amount between the predictive pattern and a target pattern to be formed on the substrate by the mask pattern data is checked. The difference amount is compared with a predetermined allowable variation amount. If the difference amount is larger than the allowable variation amount in the comparison, at least one of placement and routing of the cells in the design pattern corresponding to the mask pattern data used to predict the predictive pattern is corrected.
    Type: Application
    Filed: July 12, 2010
    Publication date: February 17, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kyoko Izuha, Fumihiro Minami, Toshiaki Ueda, Ryuji Ogawa, Satoshi Tanaka
  • Patent number: 7784020
    Abstract: A semiconductor circuit pattern design method includes the following operations. A design pattern is created by placing a plurality of cells in each functional block as a unit of the semiconductor circuit and executing routing among the plurality of placed cells. Mask pattern data based on the design pattern is created. A predictive pattern to be formed on the substrate by the mask pattern data is predicted. A difference amount between the predictive pattern and a target pattern to be formed on the substrate by the mask pattern data is checked. The difference amount is compared with a predetermined allowable variation amount. If the difference amount is larger than the allowable variation amount in the comparison, at least one of placement and routing of the cells in the design pattern corresponding to the mask pattern data used to predict the predictive pattern is corrected.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: August 24, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kyoko Izuha, Fumihiro Minami, Toshiaki Ueda, Ryuji Ogawa, Satoshi Tanaka
  • Patent number: 7368875
    Abstract: A through hole that is slightly larger than a size of a rear end of a transformer container is formed in a rear cover constituting a part of an external wall of a starting circuit unit. The transformer container houses therein a transformer and constitutes a transformer portion. The transformer portion is assembled such that a rear end of the transformer container projects from the through hole. This allows the transformer container to constitute a part of the external wall of the starting circuit unit.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: May 6, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fumihiro Minami, Takashi Ohsawa, Kinsho Ando
  • Patent number: 7370314
    Abstract: A method for generating layout data of a semiconductor integrated circuit includes applying optical proximity correction conditions to cells so as to generate cell patterns, selecting cell patterns to correspond cells, based on layout information of cells along a specified signal propagating path; calculating delay times for the signal propagating path for combinations of cell patterns; selecting a combination of cell patterns, based on lengths of the calculated delay times and the allowable delay time; and generating layout data of the signal propagating path using the selected combination.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: May 6, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fumihiro Minami, Toshiya Kotani
  • Publication number: 20070235766
    Abstract: A semiconductor integrated circuit includes a function block arranged on a substrate, a first buffering cell arranged adjacent to a first side of the function block, a second buffering cell arranged adjacent to a second side adjacent to the first side of the function block, and signal wiring passing over the function block obliquely relative to the first side and the second side, connecting the first buffering cell and the second buffering cell.
    Type: Application
    Filed: June 14, 2007
    Publication date: October 11, 2007
    Inventors: Naohito Kojima, Fumihiro Minami, Kimiyoshi Usami
  • Patent number: 7211737
    Abstract: A mounting board has a board, retaining members mounted on the upper surface of the board, and a part retained by the retaining members. The part is mounted such that at least a part thereof is arranged below the lower surface of the board, and that the part is electrically connected to the board through the retaining members. Such an arrangement as described above eliminates the need of connecting the discharge gap element to the board by using lead wires, and of mounting it on the upper surface of the board. This lowers the height of the board and admits an elevated part.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: May 1, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Fumihiro Minami, Yukari Yamasaki, Mutsuo Sekiya
  • Publication number: 20060271907
    Abstract: A semiconductor circuit pattern design method includes the following operations. A design pattern is created by placing a plurality of cells in each functional block as a unit of the semiconductor circuit and executing routing among the plurality of placed cells. Mask pattern data based on the design pattern is created. A predictive pattern to be formed on the substrate by the mask pattern data is predicted. A difference amount between the predictive pattern and a target pattern to be formed on the substrate by the mask pattern data is checked. The difference amount is compared with a predetermined allowable variation amount. If the difference amount is larger than the allowable variation amount in the comparison, at least one of placement and routing of the cells in the design pattern corresponding to the mask pattern data used to predict the predictive pattern is corrected.
    Type: Application
    Filed: May 8, 2006
    Publication date: November 30, 2006
    Inventors: Kyoko Izuha, Fumihiro Minami, Toshiaki Ueda, Ryuji Ogawa, Satoshi Tanaka
  • Publication number: 20060184908
    Abstract: A method for generating layout data of a semiconductor integrated circuit includes applying optical proximity correction conditions to cells so as to generate cell patterns, selecting cell patterns to correspond cells, based on layout information of cells along a specified signal propagating path; calculating delay times for the signal propagating path for combinations of cell patterns; selecting a combination of cell patterns, based on lengths of the calculated delay times and the allowable delay time; and generating layout data of the signal propagating path using the selected combination.
    Type: Application
    Filed: February 3, 2006
    Publication date: August 17, 2006
    Inventors: Fumihiro Minami, Toshiya Kotani
  • Patent number: 7075336
    Abstract: A method for distributing clocks to flip-flop circuits which constitute a logic circuit includes obtaining a timing slack of a first minimum delay time with respect to a minimum delay constraint time and a timing slack of a first maximum delay time with respect to a maximum delay constraint time for a clock in an input path to a flip-flop circuit, obtaining a timing slack of a second minimum delay time with respect to a minimum delay constraint time and a timing slack of a second maximum delay time with respect to a maximum delay constraint time for a clock in an output path from all the flip-flop circuits which receive the clocks from a clock terminal directly and obtaining a delay value which maximizes a minimum value of each of the first and second minimum delay time and maximum delay time of timing slacks.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: July 11, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naohito Kojima, Fumihiro Minami, Masami Murakata, Takashi Ishioka