Patents by Inventor Fumio Echigo

Fumio Echigo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6691409
    Abstract: A circuit board is configured so as to include not less than two wiring layers, an insulator layer for electric insulation between the wiring layers, and an inner-via-hole conductive member provided in the insulator layer in a thickness direction of the insulator layer, for electric connection between the wiring layers. The insulator layer is made of a composite material containing an organic resin and a material having a smaller thermal expansion coefficient than that of the organic resin, and includes a surface part, a core part, and a surface part laminated in the stated order, the surface part having a high content of the organic resin, the core part having a low content of the organic resin. The wiring layers have a land portion that is connected with the inner-via-hole conductive member, the land portion being embedded so as to be substantially in contact with the core part, and the inner-via-hole conductive member has a thickness substantially equal to a thickness of the core part.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: February 17, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Tatsuo Ogawa, Yoshihiro Bessho, Satoru Tomekawa, Yasuhiro Nakatani, Yoji Ueda, Susumu Matsuoka, Daizo Andoh, Fumio Echigo
  • Patent number: 6686029
    Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: February 3, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
  • Publication number: 20040005443
    Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.
    Type: Application
    Filed: June 27, 2003
    Publication date: January 8, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takeshi Suzuki, Satoru Tomekawa, Yoshihiro Kawakita, Yasushi Nakagiri, Fumio Echigo
  • Publication number: 20030188428
    Abstract: Removable mask films 303 are formed on the both sides of the substrate having the adhesive layer 302 by applying and drying a resin varnish 304 including a ultraviolet-absorbing agent, and fine through holes 306 are formed by using a third harmonics YAG solid-state laser light with a relatively short wavelength not longer than that in the ultraviolet range in such a way that the effects of such a residual strain as the conventional embodiment forming a removable mask film by a laminating process may be decreased as well as the more fine hole drilling compared with conventional embodiment using the carbon dioxide gas laser with a relatively long wavelength may be performed.
    Type: Application
    Filed: March 31, 2003
    Publication date: October 9, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Fumio Echigo, Hideki Higashitani, Daizo Andoh, Noritake Fukuda, Yasuhiro Nakatani, Tadashi Nakamura
  • Publication number: 20030170434
    Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.
    Type: Application
    Filed: March 14, 2003
    Publication date: September 11, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
  • Publication number: 20030157307
    Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.
    Type: Application
    Filed: February 24, 2003
    Publication date: August 21, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
  • Publication number: 20030153197
    Abstract: A mask film includes a base material, a parting layer and a non-parting portion placed on the base material. Accordingly, an optimum adhesion strength of the mask film and a prepreg sheet can be maintained, and peeling between the mask film and prepreg sheet can be prevented. Further, by preventing the fusing adhesion between the mask film and prepreg sheet due to heat generated when forming penetration holes, a circuit board having an excellent quality is obtained.
    Type: Application
    Filed: January 9, 2003
    Publication date: August 14, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Toshiaki Takenaka, Toshikazu Kondo, Kunio Kishimoto, Shinji Nakamura, Fumio Echigo
  • Publication number: 20030137815
    Abstract: An electrically insulating base material includes a core layer 102, a resin layer 101 on each surface of the core layer 102 and a conductive material 105 filled into through holes 104 formed in a thickness direction. On each surface of the electrically insulating base material, a metal foil 106 is laminated, and a laminate thus obtained is heated and pressed. A conductive filler in the conductive material 105 has a mean particle diameter equal to or larger than a thickness of the resin layer 101, and thus the conductive filler can be prevented from being diffused into the resin layer 101 in a heating and pressing process. As a result, the conductive filler can be densified, thereby allowing a printed wiring board with via hole connection having high connection reliability to be obtained.
    Type: Application
    Filed: January 9, 2003
    Publication date: July 24, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shozo Ochi, Fumio Echigo, Yoji Ueda, Yasushi Nakagiri, Takeshi Suzuki
  • Patent number: 6596381
    Abstract: A compression function layer 60 is provided on at least one board surface. The compression function layer 60 adds a function of being compressed by receiving pressure in the direction of the board thickness to the resin board 10 which includes this layer. Thereby a sufficient pressure is applied to conductors 14.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: July 22, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Satoru Tomekawa, Yoshihiro Kawakita, Yasushi Nakagiri, Fumio Echigo
  • Patent number: 6558780
    Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: May 6, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo
  • Publication number: 20030082363
    Abstract: The present invention provides a prepreg and a circuit board that can achieve, e.g., low interstitial via connection resistance, excellent connection stability, and high durability, regardless of materials, physical properties, and a combination of the materials of an insulating layer. The present invention also provides a method for manufacturing the prepreg and the circuit board. The prepreg of the present invention includes a laminate including at least one first layer and at least one second layer. The first layer is an insulating layer that includes a resin. The second layer has pores that connect an upper and a lower surface of the second layer, and the upper and the lower surface of the second layer differ from each other in at least one selected from open are ratio and average pore diameter. Using this prepreg makes it possible to provide a circuit board that is characterized, e.g., by low interstitial via connection resistance, excellent connection stability, and high durability.
    Type: Application
    Filed: October 24, 2002
    Publication date: May 1, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasushi Nakagiri, Takeshi Suzuki, Fumio Echigo
  • Patent number: 6546624
    Abstract: Removable mask films 303 are formed on the both sides of the substrate having the adhesive layer 302 by applying and drying a resin varnish 304 including a ultraviolet-absorbing agent, and fine through holes 306 are formed by using a third harmonics YAG solid-state laser light with a relatively short wavelength not longer than that in the ultraviolet range in such a way that the effects of such a residual strain as the conventional embodiment forming a removable mask film by a laminating process may be decreased as well as the more fine hole drilling compared with conventional embodiment using the carbon dioxide gas laser with a relatively long wavelength may be performed.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: April 15, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Fumio Echigo, Hideki Higashitani, Daizo Andoh, Noritake Fukuda, Yasuhiro Nakatani, Tadashi Nakamura
  • Publication number: 20030066683
    Abstract: A circuit board is configured so as to include not less than two wiring layers, an insulator layer for electric insulation between the wiring layers, and an inner-via-hole conductive member provided in the insulator layer in a thickness direction of the insulator layer, for electric connection between the wiring layers. The insulator layer is made of a composite material containing an organic resin and a material having a smaller thermal expansion coefficient than that of the organic resin, and includes a surface part, a core part, and a surface part laminated in the stated order, the surface part having a high content of the organic resin, the core part having a low content of the organic resin. The wiring layers have a land portion that is connected with the inner-via-hole conductive member, the land portion being embedded so as to be substantially in contact with the core part, and the inner-via-hole conductive member has a thickness substantially equal to a thickness of the core part.
    Type: Application
    Filed: October 25, 2002
    Publication date: April 10, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Tatsuo Ogawa, Yoshihiro Bessho, Satoru Tomekawa, Yasuhiro Nakatani, Yoji Ueda, Susumu Matsuoka, Daizo Andoh, Fumio Echigo
  • Publication number: 20030045164
    Abstract: The present invention provides a nonwoven fabric material prepared from short fibers including thermal-resistant synthetic fibers bound with an inorganic binder, a prepreg and a circuit board using the same. The circuit board has an excellent dimensional stability even at a high temperature, and the circuit board is prevented from warping or being damaged by moisture absorption or the like. The inorganic binder is a residue formed from a low melting point glass solution or a water-dispersible colloidal solution including at least either fibers or particles of low melting point glass dispersed therein. When the binder is used, a chemical covalent bonding by a siloxane bonding is formed.
    Type: Application
    Filed: February 17, 2000
    Publication date: March 6, 2003
    Inventors: Fumio Echigo, Yoshihiro Kawakita
  • Patent number: 6518514
    Abstract: A circuit board is configured so as to include not less than two wiring layers, an insulator layer for electric insulation between the wiring layers, and an inner-via-hole conductive member provided in the insulator layer in a thickness direction of the insulator layer, for electric connection between the wiring layers. The insulator layer is made of a composite material containing an organic resin and a material having a smaller thermal expansion coefficient than that of the organic resin, and includes a surface part, a core part, and a surface part laminated in the stated order, the surface part having a high content of the organic resin, the core part having a low content of the organic resin. The wiring layers have a land portion that is connected with the inner-via-hole conductive member, the land portion being embedded so as to be substantially in contact with the core part, and the inner-via-hole conductive member has a thickness substantially equal to a thickness of the core part.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: February 11, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Tatsuo Ogawa, Yoshihiro Bessho, Satoru Tomekawa, Yasuhiro Nakatani, Yoji Ueda, Susumu Matsuoka, Daizo Andoh, Fumio Echigo
  • Publication number: 20020192485
    Abstract: A printed circuit board of the present invention is formed of an electrical insulating base material with through holes that are formed in a thickness direction of the electrical insulating base material and are filled with an electrical conductor; the electrical insulating base material including a core layer formed by impregnating a holder with a resin and resin layers formed on both sides of the core layer; and wiring layers that are formed on both surfaces of the electrical insulating base material into a predetermined pattern and are electrically connected to each other by the electrical conductor. The wiring layer is embedded in at least one of the resin layers. The resin layers on the both sides have different thicknesses from each other, and a thinner layer out of the resin layers has a thickness equal to or smaller than a mean particle diameter of an electrically conductive filler contained in the electrical conductor.
    Type: Application
    Filed: August 19, 2002
    Publication date: December 19, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shozo Ochi, Fumio Echigo, Yoji Ueda
  • Publication number: 20020182804
    Abstract: A capacitor sheet includes a laminate sheet, interface-connection feedthrough conductors for electrically connecting faces of the laminate sheet, and capacitor-connection feedthrough conductors. The laminate sheet has at least one laminate which is composed of a power source layer electrode, a grounding layer electrode, and a dielectric layer interposed between the power source layer electrode and the grounding layer electrode. The interface-connection feedthrough conductors are formed in through holes that pass through the dielectric layer, the power source layer electrode, and the grounding layer electrode, and are insulated by insulation walls from the power source layer electrode and the grounding layer electrode provided inside. The capacitor-connection feedthrough conductors are formed in regions where only either the power source layer electrode or the grounding layer electrode is provided, and are connected electrically with either the power source layer electrode or the grounding layer electrode.
    Type: Application
    Filed: May 24, 2002
    Publication date: December 5, 2002
    Applicant: Matsushita Electric Industrial Co. Ltd.
    Inventors: Fumio Echigo, Tadashi Nakamura, Daizo Andoh
  • Patent number: 6459046
    Abstract: A printed circuit board of the present invention is formed of an electrical insulating base material with through holes that are formed in a thickness direction of the electrical insulating base material and are filled with an electrical conductor; the electrical insulating base material including a core layer formed by impregnating a holder with a resin and resin layers formed on both sides of the core layer; and wiring layers that are formed on both surfaces of the electrical insulating base material into a predetermined pattern and are electrically connected to each other by the electrical conductor. The wiring layer is embedded in at least one of the resin layers. The resin layers on the both sides have different thicknesses from each other, and a thinner layer out of the resin layers has a thickness equal to or smaller than a mean particle diameter of an electrically conductive filler contained in the electrical conductor.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: October 1, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shozo Ochi, Fumio Echigo, Yoji Ueda
  • Publication number: 20020131248
    Abstract: A protective agent 6 for protecting a wiring 1 is dispersed and placed in mottle-like on an interface between a via 3 and a wiring layer 2. Then, each dimension of interface regions 7 where the protective agent 6 does not exist is set to such a size that a plurality of conductive powders 4 constituting the via 3 can abutted on the wiring layer 2. Therefore, the plurality of conductive powders 4 and the wiring layer 2 are abutted each other in each interface region 7 where the protective agent 6 does not exist to electrically connect, thereby stabilizing the connection resistance for a prolonged period of time.
    Type: Application
    Filed: November 8, 2001
    Publication date: September 19, 2002
    Inventors: Shinobu Kokufu, Takeshi Suzuki, Fumio Echigo, Daizo Andoh, Tatsuo Ogawa, Yoshihiro Kawakita, Satoru Tomekawa
  • Publication number: 20020127379
    Abstract: A circuit board includes an electrical insulator layer formed of a reinforcer sheet with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes provided in a high-density portion of the reinforcer sheet are formed to have a smaller cross-section than the inner via holes provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass-epoxy base material is used for an insulator layer.
    Type: Application
    Filed: October 25, 2001
    Publication date: September 12, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Suzuki, Toshihiro Nishii, Satoru Tomekawa, Fumio Echigo