Patents by Inventor Fumio Harima

Fumio Harima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200321289
    Abstract: A semiconductor chip includes a compound semiconductor substrate having a pair of main surfaces and a side surface therebetween, a circuit on one main surface of the pair of main surfaces, and first metals on the main surface. The first metals are positioned, in plan view of the main surface, closer to an outer edge of the main surface than the circuit, substantially in a ring shape to surround the circuit with gaps between first metals adjacent to each other. The semiconductor chip further includes second metals on the main surface. The second metals are positioned, in plan view of the main surface, between the circuit and the first metals or closer to the outer edge than the first metals. Also, the second metals each are positioned, in plan view of the side surface, such that at least a part thereof overlaps a gap between the first metals.
    Type: Application
    Filed: April 2, 2020
    Publication date: October 8, 2020
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yusuke TANAKA, Fumio HARIMA, Masayuki AOIKE, Koshi HIMEDA
  • Publication number: 20200321927
    Abstract: A power amplifier apparatus includes a semiconductor substrate, a plurality of first transistors on the semiconductor substrate, a plurality of second transistors, at least one collector terminal electrically connected to collectors of the plurality of first transistors, a first inductor having a first end electrically connected to the collector terminal and a second end electrically connected to a power supply potential, at least one emitter terminal electrically connected to emitters of the plurality of second transistors and adjacent to the collector terminal in a second direction, a second inductor having a first end electrically connected to the emitter terminal and a second end electrically connected to a reference potential, and at least one capacitor having a first end electrically connected to the collectors of the plurality of first transistors and a second end electrically connected to the emitters of the plurality of second transistors.
    Type: Application
    Filed: April 3, 2020
    Publication date: October 8, 2020
    Inventors: Toshikazu TERASHIMA, Fumio HARIMA, Makoto ITOU, Satoshi TANAKA, Kazuo WATANABE, Satoshi ARAYASHIKI, Chikara YOSHIDA
  • Publication number: 20200186104
    Abstract: A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Application
    Filed: February 19, 2020
    Publication date: June 11, 2020
    Inventors: Yuri HONDA, Fumio HARIMA, Satoshi TANAKA
  • Patent number: 10651804
    Abstract: A power amplifier circuit is capable of restraining uneven temperature distribution among a plurality of unit transistors while restraining the deterioration of the characteristics of the power amplifier circuit. The power amplifier circuit includes: a first transistor group which includes a plurality of unit transistors and which amplifies an input signal and outputs an amplified signal; a bias circuit which supplies a bias current or a bias voltage to a base or a gate of each unit transistor of the first transistor group; a plurality of first resistive elements, each of which is connected between the base or the gate of each unit transistor of the first transistor group and an output of the bias circuit; and a plurality of second resistive elements, each of which is connected between an emitter or a source of each unit transistor of the first transistor group and a reference potential.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: May 12, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Toshiki Matsui, Kenji Sasaki, Fumio Harima
  • Patent number: 10608597
    Abstract: A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: February 18, 2019
    Date of Patent: March 31, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Satoshi Tanaka
  • Publication number: 20200052658
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Application
    Filed: July 24, 2019
    Publication date: February 13, 2020
    Inventors: Yuri HONDA, Kenji MUKAI, Fumio HARIMA
  • Publication number: 20190356281
    Abstract: A power amplifier includes power amplification circuits in a plurality of stages including a first stage and a second stage, each power amplification circuit including a transistor. The power amplification circuit in the first stage includes a first impedance circuit between an emitter of the transistor and a reference potential. The first impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency. The power amplification circuit in the second stage includes a second impedance circuit between an emitter of the transistor and a reference potential. The second impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency.
    Type: Application
    Filed: May 9, 2019
    Publication date: November 21, 2019
    Inventors: Yuri HONDA, Fumio HARIMA, Kenji MUKAI
  • Publication number: 20190312554
    Abstract: A power amplifier circuit is capable of restraining uneven temperature distribution among a plurality of unit transistors while restraining the deterioration of the characteristics of the power amplifier circuit. The power amplifier circuit includes: a first transistor group which includes a plurality of unit transistors and which amplifies an input signal and outputs an amplified signal; a bias circuit which supplies a bias current or a bias voltage to a base or a gate of each unit transistor of the first transistor group; a plurality of first resistive elements, each of which is connected between the base or the gate of each unit transistor of the first transistor group and an output of the bias circuit; and a plurality of second resistive elements, each of which is connected between an emitter or a source of each unit transistor of the first transistor group and a reference potential.
    Type: Application
    Filed: June 11, 2019
    Publication date: October 10, 2019
    Inventors: Toshiki MATSUI, Kenji SASAKI, Fumio HARIMA
  • Publication number: 20190252368
    Abstract: Provided is a semiconductor device with a reduced variation in temperature among a plurality of unit transistors. A semiconductor device includes: a semiconductor substrate; and a transistor group including at least one column in which a plurality of unit transistors are aligned and arranged along a first axis on the semiconductor substrate. A first column of the at least one column includes: a first group of transistors including two of the unit transistors that are adjacent to each other with a first distance therebetween, and a second group of transistors including two of the unit transistors that are adjacent to each other with a second distance therebetween, the first group of transistors is disposed at a position closer to a center of the first column along the first axis than the second group of transistors, and the first distance is larger than the second distance.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Inventors: Yuri HONDA, Fumio HARIMA, Kazuhito NAKAI
  • Patent number: 10361664
    Abstract: A power amplifier circuit is capable of restraining uneven temperature distribution among a plurality of unit transistors while restraining the deterioration of the characteristics of the power amplifier circuit. The power amplifier circuit includes: a first transistor group which includes a plurality of unit transistors and which amplifies an input signal and outputs an amplified signal; a bias circuit which supplies a bias current or a bias voltage to a base or a gate of each unit transistor of the first transistor group; a plurality of first resistive elements, each of which is connected between the base or the gate of each unit transistor of the first transistor group and an output of the bias circuit; and a plurality of second resistive elements, each of which is connected between an emitter or a source of each unit transistor of the first transistor group and a reference potential.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: July 23, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Toshiki Matsui, Kenji Sasaki, Fumio Harima
  • Publication number: 20190181808
    Abstract: A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Application
    Filed: February 18, 2019
    Publication date: June 13, 2019
    Inventors: Yuri HONDA, Fumio HARIMA, Satoshi TANAKA
  • Patent number: 10319710
    Abstract: Provided is a semiconductor device with a reduced variation in temperature among a plurality of unit transistors. A semiconductor device includes: a semiconductor substrate; and a transistor group including at least one column in which a plurality of unit transistors are aligned and arranged along a first axis on the semiconductor substrate. A first column of the at least one column includes: a first group of transistors including two of the unit transistors that are adjacent to each other with a first distance therebetween, and a second group of transistors including two of the unit transistors that are adjacent to each other with a second distance therebetween, the first group of transistors is disposed at a position closer to a center of the first column along the first axis than the second group of transistors, and the first distance is larger than the second distance.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: June 11, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Kazuhito Nakai
  • Patent number: 10291187
    Abstract: A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: May 14, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Satoshi Tanaka
  • Publication number: 20190103846
    Abstract: The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.
    Type: Application
    Filed: September 19, 2018
    Publication date: April 4, 2019
    Inventors: Yuri HONDA, Fumio HARIMA, Yoshiki KOGUSHI, Shota ISHIHARA, Fuminori MORISAWA
  • Patent number: 10250209
    Abstract: Provided is a power amplification module that supports a plurality of communication systems. The power amplification module includes: two power amplifiers that can be selectively connected in parallel with each other; a switch that, in accordance with one communication system selected from among the plurality of communication systems, selects one power amplifier that is to operate by itself from among the two power amplifiers or selects the two power amplifiers and connects the two power amplifiers in parallel with each other; and a phase correction circuit that, when the two power amplifiers are both selected, corrects a phase difference by being selectively connected between the outputs of the two selected power amplifiers such that a phase difference is not generated between the output signals of the two selected power amplifiers.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: April 2, 2019
    Assignee: MURATA MANUGACTURING CO., LTD.
    Inventors: Takayuki Tsutsui, Fumio Harima
  • Patent number: 10177724
    Abstract: A power amplifier circuit includes first and second transistors and a first voltage output circuit. A radio frequency signal is input into a base of the first transistor. The first voltage output circuit outputs a first voltage in accordance with a power supply voltage. The first voltage is supplied to a base or a gate of the second transistor. An emitter or a source of the second transistor is connected to a collector of the first transistor. A first amplified signal generated by amplifying the radio frequency signal is output from a collector or a drain of the second transistor.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: January 8, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Takayuki Tsutsui, Masao Kondo, Satoshi Arayashiki, Fumio Harima, Masatoshi Hase
  • Publication number: 20180358933
    Abstract: A power amplifier circuit is capable of restraining uneven temperature distribution among a plurality of unit transistors while restraining the deterioration of the characteristics of the power amplifier circuit. The power amplifier circuit includes: a first transistor group which includes a plurality of unit transistors and which amplifies an input signal and outputs an amplified signal; a bias circuit which supplies a bias current or a bias voltage to a base or a gate of each unit transistor of the first transistor group; a plurality of first resistive elements, each of which is connected between the base or the gate of each unit transistor of the first transistor group and an output of the bias circuit; and a plurality of second resistive elements, each of which is connected between an emitter or a source of each unit transistor of the first transistor group and a reference potential.
    Type: Application
    Filed: June 7, 2018
    Publication date: December 13, 2018
    Inventors: Toshiki MATSUI, Kenji SASAKI, Fumio HARIMA
  • Publication number: 20180254759
    Abstract: Provided is a power amplification module that supports a plurality of communication systems. The power amplification module includes: two power amplifiers that can be selectively connected in parallel with each other; a switch that, in accordance with one communication system selected from among the plurality of communication systems, selects one power amplifier that is to operate by itself from among the two power amplifiers or selects the two power amplifiers and connects the two power amplifiers in parallel with each other; and a phase correction circuit that, when the two power amplifiers are both selected, corrects a phase difference by being selectively connected between the outputs of the two selected power amplifiers such that a phase difference is not generated between the output signals of the two selected power amplifiers.
    Type: Application
    Filed: May 3, 2018
    Publication date: September 6, 2018
    Inventors: Takayuki TSUTSUI, Fumio HARIMA
  • Publication number: 20180248524
    Abstract: A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Application
    Filed: February 26, 2018
    Publication date: August 30, 2018
    Inventors: Yuri HONDA, Fumio HARIMA, Satoshi TANAKA
  • Patent number: 9991859
    Abstract: Provided is a power amplification module that supports a plurality of communication systems. The power amplification module includes: two power amplifiers that can be selectively connected in parallel with each other; a switch that, in accordance with one communication system selected from among the plurality of communication systems, selects one power amplifier that is to operate by itself from among the two power amplifiers or selects the two power amplifiers and connects the two power amplifiers in parallel with each other; and a phase correction circuit that, when the two power amplifiers are both selected, corrects a phase difference by being selectively connected between the outputs of the two selected power amplifiers such that a phase difference is not generated between the output signals of the two selected power amplifiers.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: June 5, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takayuki Tsutsui, Fumio Harima