Patents by Inventor G. West

G. West has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7390299
    Abstract: A wireless patient monitor is adapted to communicate with any one of plural medical telemetry networks, each having one or more central stations, where each network is configured to communicate via wireless communications using one of multiple different communications settings. The monitor includes one or more sensor inputs for receiving vital signs data from a patient, a wireless transceiver, and a controller coupled to receive the vital signs data via the one or more sensor inputs and to communicate with a network via the transceiver. The monitor also includes a display device and is controllable by the controller to automatically display a notification to a user of the monitor upon establishing communications with the at least one central station. There is also a method of monitoring a patient and a wireless medical telemetry system.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: June 24, 2008
    Assignee: Welch Allyn, Inc.
    Inventors: Herbert S. Weiner, James B. Moon, Nhedti L. Colquitt, Eric G. Petersen, William H. Howell, Kenneth G. West
  • Patent number: 7371419
    Abstract: The present invention relates to chemoprotective compounds and a method for producing chemoprotectant precursor-enriched extracts from crucifer seeds. More particularly, a method is provided for producing chemoprotectant precursor-enriched extracts from radish seeds with increased ratio of glucoraphanin to glucoraphenin. The general method comprises preparing an aqueous extract, contacting the aqueous extract with an adsorbent, removing the adsorbent to obtain a glucosinolate-containing extract, drying the glucosinolate-containing extract to obtain a dried glucosinolate-containing extract, mixing at least a portion of the dried glucosinolate-containing extract with a solvent to form a glucosinolate-containing suspension, clarifying the glucosinolate-containing suspension, contacting the glucosinolate-containing suspension with a catalyst, and introducing hydrogen for a time sufficient to obtain a chemoprotectant precursor-enriched extract.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: May 13, 2008
    Assignee: Kraft Foods Holdings, Inc.
    Inventors: Leslie G. West, Nam-Cheol Kim, George W. Haas, Nathan V. Matusheski
  • Patent number: 7336066
    Abstract: Testing of an electronic device is carried out by combining power and signal delivery on a single pair of wires. The power delivery is decoupled from the signal delivery, using inductors, so the device power supplied does not interfere with the test signals delivered from the device and the response signals delivered to the device. Further, simultaneous bidirectional signal paths are decoupled, using capacitors, so that the tester transceiver and the device transceiver are not damaged by the power delivered to the device on the same wires. A common fixture may be used to test a number of different types of wafers, independent of the topography, size, or power requirements of the devices on the wafers, resulting in a significant cost saving, because fixture design has become very expensive, in some cases costing more than the tester whose signals it is implemented to deliver.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: February 26, 2008
    Assignee: Credence Systems Corporation
    Inventor: Burnell G. West
  • Patent number: 7311258
    Abstract: A data acquisition device includes a housing, a card reader, a scanner, an electronic signature pad, and a data communication system. The card reader, the scanner, and the electronic signature pad are integrated with the housing and with the data communication system. The data communication system is configured to receive the data that is read by the card reader, the scanner, and the electronic signature pad, and to communicate the received data to a computer connected to the data acquisition device. The computer processes the data acquired by the data acquisition device with appropriate software.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: December 25, 2007
    Assignee: Market Scan Information Systems, Inc.
    Inventors: Gavin Trippe, Steven Saigeon, Ronald H. Means, Russell G. West
  • Patent number: 7232805
    Abstract: The present invention provides a cobalamin-drug conjugate suitable for the treatment of tumor related diseases. Cobalamin is indirectly covalently bound to an anti-tumor drug via a cleavable linker and one or more optional spacers. Cobalamin is covalently bound to a first spacer or the cleavable linker via the 5?-OH of the cobalamin ribose ring. The drug is bound to a second spacer of the cleavable linker via an existing or added functional group on the drug. After administration, the conjugate forms a complex with transcobalamin (any of its isoforms). The complex then binds to a receptor on a cell membrane and is taken up into the cell. Once in the cell, an intracellular enzyme cleaves the conjugate thereby releasing the drug. Depending upon the structure of the conjugate, a particular class or type of intracellular enzyme affects the cleavage. Due to the high demand for cobalamin in growing cells, tumor cells typically take up a higher percentage of the conjugate than do normal non-growing cells.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: June 19, 2007
    Assignee: Inflabloc Pharmaceuticals, Inc.
    Inventors: Ned M. Weinshenker, Frederick G. West, Barbara A. Araneo, Weiping Li
  • Patent number: 7222280
    Abstract: A test apparatus including a means for sending a first test pattern to a device under test (DUT), where the first test pattern is a part of a planned sequence of tests, and further including a means for evaluating the test results received from the DUT, and a method of testing are described. The test results may include anomalous data indicative of a defect in the DUT. If so, a second test pattern that is not part of the planned sequence of tests is selected. The second test pattern is selected based on a diagnosis of the anomalous data by the test apparatus.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: May 22, 2007
    Assignee: Credence Systems Corporation
    Inventors: Burnell G. West, Rodolfo E. Garcia
  • Patent number: 7212941
    Abstract: A test apparatus implements a method for testing electronic devices that exhibit non-deterministic behavior. The test apparatus includes a high-speed buffer queue for storing data packets. The data packets arrive at one end of the queue and, as they exit at the other end, are compared against expect data packets stored in memory. If the data packet exiting the buffer queue corresponds to response signals generated by the device under test during a non-deterministic (e.g., idle) state, the expect data packet is not retrieved from memory and the comparison is not made.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: May 1, 2007
    Assignee: Credence Systems Corporation
    Inventors: Angarai T. Sivaram, Burnell G. West, Howard Maassen
  • Patent number: 7171598
    Abstract: An apparatus for testing an integrated circuit, the apparatus including a sequence control logic unit having an output channel connectable to a device under test, and a memory to store at least two types of data sets, each data set being used by the sequence control logic unit to determine a test pattern to output on the output channel.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: January 30, 2007
    Assignee: Credence Systems Corporation
    Inventors: Jamie S. Cullen, Burnell G. West
  • Patent number: 7143326
    Abstract: Testing an integrated circuit (IC) device, for example, an IC that includes an embedded memory, may involve specifying one or more test parameters including at least one of a pipeline depth data (e.g., latency delay information) and a data width data (e.g. corresponding to a data width of an embedded memory), generating a test sequence by associating test parameters with a test pattern, and applying the generated test sequence to the integrated circuit device. A test system for testing ICs having embedded memories may include multiple test patterns and multiple data structures, each data structure defining one or more test parameters including at least one of a pipeline depth and a data width, an algorithmic pattern generator, and software for controlling the algorithmic pattern generator to generate a test sequence by associating a specified data structure with a specified test pattern.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: November 28, 2006
    Assignee: Credence Systems Corporation
    Inventors: Daniel Fan, Kris Sakaitani, Burnell G. West
  • Patent number: 7113886
    Abstract: A circuit and related method for distributing events in an event stream (i.e., an electronic signal having a plurality of rising edge transitions and falling edge transitions). The circuit distributes the events in a primary event stream across multiple secondary event streams in such a way that the event rate in each of the secondary event streams is lower than the event rate in the primary event stream, but the relative timing of the events in the primary event stream is maintained in each of the secondary event streams. The secondary event streams can then be provided to respective timestamp circuits, which record the times at which events occur in the secondary event streams. Since the relative timing of the events in the primary event stream is maintained in each of the secondary event streams, the multiple timestamp circuits collectively record the times at which events occur in the primary event stream. The circuit and related method can be used when debugging/testing semiconductor devices.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: September 26, 2006
    Assignee: Credence Systems Corporation
    Inventor: Burnell G. West
  • Patent number: 7097874
    Abstract: The present invention discloses methods for preparing a processed peanut product containing high levels of peanut hearts material, with the peanut heart material being substantially stripped of bitter taste so as to provide debittered peanut hearts of comparable taste to actual peanuts or as being flavorless without adversely affecting the taste of a foodstuff end product. The processed product includes whole or fragmented peanut hearts and peanut heart powder processed using alkaline wash, neutralization, and drying for inactivating enzymes and removing bitter flavoring components. The peanut heart materials are debittered by adjusting the pH to about 8 to about 12 with an alkali material (e.g., sodium hydroxide) to solubilize the protein content and release the bitter flavor compounds making it possible to separate such compounds by ultrafiltration. The alkali treated peanut heart material is neutralized with an acidic aqueous solution.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: August 29, 2006
    Assignee: Kraft Foods Holdings, Inc.
    Inventors: Ronald L. Meibach, Ahmad Akashe, George W. Haas, Leslie G. West
  • Patent number: 7093177
    Abstract: Generating test signals for a device under test (DUT) involves generating a master reference signal, using a vernier technique to generate test pattern signals based on the master reference signal, generating a test clock signal that is phase-matched with and frequency similar to the test pattern signals by providing the master reference signal as input to a phase-locked loop (PLL) and controlling one or more programmable dividers in the PLL to adjust the test clock signal to be a multiple or sub-multiple of a frequency of the test pattern signals, applying the test clock signal to the clock input pin of the DUT, and applying the test pattern signals to data pins of the DUT. When the frequency of the test pattern signals is changed, the test clock signal frequency may be adjusted to calibrate to the changed frequency of the test pattern signals by re-programming the programmable dividers.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: August 15, 2006
    Assignee: Schlumberger Technologies, Inc.
    Inventors: Burnell G. West, Paolo Dalla Ricca
  • Patent number: 7055700
    Abstract: A rack for holding a bicycle by either its front or back wheel in an upright position on a floor. The rack includes a bracket which is adapted to be fitted on an elongate support frame. A rotatable lower brace extends outwardly from the bracket and includes spaced-apart arms which terminate in a downwardly extending lip. An upper brace extends generally upwardly from the bracket and includes spaced-apart arms. A bicycle is held on the rack by rolling the bicycle wheel directly into the lip of the lower brace and into and between the arms of the upper and lower braces respectively. A plurality of racks can be slidingly fitted onto a single support frame for holding a plurality of bicycles in spaced-apart relationship.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: June 6, 2006
    Assignee: Colony Incorporated
    Inventor: Kent G. West
  • Patent number: 7035755
    Abstract: Method and apparatus for circuit testing with ring-connected test instrument modules. A system for controlling one or more test instruments to test one or more integrated circuits includes a master clock and a controller. The test instruments are connected to form a communication ring. The master clock is connected to each test instrument and provides a clock signal to the one or more test instruments. The controller is connected to the communication ring and is configured to align counters of test instruments to derive a common clock time value from the clock signal. The controller is further configured to generate and send data words into the communication ring to carry the data words to each test instrument. The data words includes at least one data word specifying a test event to be performed, a common clock time value, and at least one of the test instruments.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: April 25, 2006
    Assignee: Credence Systems Corporation
    Inventors: Michael F. Jones, Robert Whyte, Jamie S. Cullen, Naveed Zaman, Yann Gazounaud, Burnell G. West, William Fritzsche
  • Patent number: 7017091
    Abstract: A test system formatter may include a programmable drive circuit configurable to operate in any of a plurality of drive modes, each mode corresponding to a different combination of drive signals or drive timing markers or both, and a programmable response circuit configurable to operate in any of a plurality of strobe modes, each strobe mode corresponding to a different combination of strobe signals. The formatter may also include multiple drive channels and/or multiple response channels, each channel being formed, e.g., of an event logic interface and a corresponding linear delay element. The drive channels provide signals to the drive circuit to be used to generate drive signals or drive timing markers or both. The response channels receive from one or more pin-electronics comparators response signals used to generate fail outputs. The programmable drive and response circuits are configurable to route signals through multiple channels in parallel.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: March 21, 2006
    Assignee: Credence Systems Corporation
    Inventor: Burnell G. West
  • Publication number: 20060037259
    Abstract: A roof ventilation apparatus for a sloped roof having a cap and base plate is provided. The cap has a top surface and a bottom surface. The bottom surface has a flange that defines an opening to a cavity formed between the top and bottom cap surface. The cavity provides a path for air exchange from a roof opening through an air passage formed between the flange and cap top. The base plate has a flange surrounding a rim that fits inside the cap bottom cavity. The base plate preferably is shaped such that when installed on the sloped roof the cap entirely covers the base plate. Alternatively, a roof vent base plate with a flange having an angled edge configured to channel moisture is described. In addition, a method of installing a roof ventilation apparatus having a base plate and roof cap on a sloped roof is described.
    Type: Application
    Filed: August 17, 2004
    Publication date: February 23, 2006
    Inventor: G. West
  • Patent number: 7002566
    Abstract: A system including a failsafe mechanism adapted to visually display frame locked digital image data and a method therefor. The system receives input image data at an input frame rate and/or input resolution. The packing circuit generates coded image data by compressing the input image data. An unpacking circuit decompresses the coded image and provides output image data to a display device at an output frame rate and/or output resolution.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: February 21, 2006
    Assignee: Pixelworks, Inc.
    Inventors: Michael G. West, Jamie J. LeVasseur
  • Patent number: 6988989
    Abstract: A medical monitoring system includes a central station adapted to receive vital signs data concerning a plurality of patients, and one or more transmitter/receivers associated with the central station. At least one patient monitor is configured to monitor a particular one of the plurality of patients by collecting vital signs data from the particular patient, and configured to establish communications with the central station and communicate the collected vital signs data to the central station via the one or more transmitter/receivers. The at least one patient monitor is operable by a user to identify the particular patient from the plurality of patients, and to inform the central station of the identity of the particular patient. The central station is configured to associate the vital signs data received from the at least one patient monitor with the particular patient. The system, transmitter/receivers and at least one patient monitor may be wireless or wired.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: January 24, 2006
    Assignee: Welch Allyn Protocol, Inc.
    Inventors: Herbert S. Weiner, James B. Moon, Nhedti L. Colquitt, Eric G. Petersen, William H. Howell, Kenneth G. West
  • Patent number: 6940271
    Abstract: A pin electronics circuit for use in automatic test equipment may include a reconfigurable logic device in which different logic configurations may be installed to make measurements according to multiple tests to be applied to a device under test; a level generating circuit coupled to the reconfigurable logic device, and configured to generate a number of test levels and a number of reference levels; and a switching circuit, coupled to the reconfigurable logic device and the level generating circuit, configured to receive the test levels and the reference levels, and controlled by the reconfigurable logic device to selectively apply the test levels to the device under test according to a selected test and to sense levels inputted to or outputted from the device under test by comparing the reference levels generated by the level generating circuit to the levels inputted to our outputted from the device under test.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: September 6, 2005
    Assignee: NPTest, Inc.
    Inventor: Burnell G. West
  • Patent number: 6937006
    Abstract: A pin electronics circuit for use in automatic test equipment may include a reconfigurable logic device in which different logic configurations may be installed to make measurements according to multiple tests to be applied to a device under test; a level generating circuit coupled to the reconfigurable logic device, and configured to generate a number of test levels and a number of reference levels; and a switching circuit, coupled to the reconfigurable logic device and the level generating circuit, configured to receive the test levels and the reference levels, and controlled by the reconfigurable logic device to selectively apply the test levels to the device under test according to a selected test and to sense levels inputted to or outputted from the device under test by comparing the reference levels generated by the level generating circuit to the levels inputted to our outputted from the device under test.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: August 30, 2005
    Assignee: Credence Systems Corporation
    Inventor: Burnell G. West