Abstract: Technologies are generally described for systems and methods effective to detect an alteration in augmented reality. A processor may receive a real image that corresponds to a real object and may receive augmented reality instructions to generate a virtual object. The processor may determine that the virtual object at least partially obscures the real object when the virtual object is rendered on a display. The processor may, upon determining that the virtual object at least partially obscures the real object when the virtual object is rendered on the display, simulate an activity on the real object to produce a first activity simulation and simulate the activity on the virtual object to produce a second activity simulation. The processor may determine a difference between the first and the second activity simulation and modify the augmented reality instructions to generate a modified virtual object in response to the determination of the difference.

Abstract: Technologies are generally described for systems and methods effective to detect an alteration in augmented reality. A processor may receive a real image that corresponds to a real object and may receive augmented reality instructions to generate a virtual object. The processor may determine that the virtual object at least partially obscures the real object when the virtual object is rendered on a display. The processor may, upon determining that the virtual object at least partially obscures the real object when the virtual object is rendered on the display, simulate an activity on the real object to produce a first activity simulation and simulate the activity on the virtual object to produce a second activity simulation. The processor may determine a difference between the first and the second activity simulation and modify the augmented reality instructions to generate a modified virtual object in response to the determination of the difference.

Abstract: Technologies are generally described for systems and methods effective to detect an alteration in augmented reality. A processor may receive a real image that corresponds to a real object and may receive augmented reality instructions to generate a virtual object. The processor may determine that the virtual object at least partially obscures the real object when the virtual object is rendered on a display. The processor may, upon determining that the virtual object at least partially obscures the real object when the virtual object is rendered on the display, simulate an activity on the real object to produce a first activity simulation and simulate the activity on the virtual object to produce a second activity simulation. The processor may determine a difference between the first and the second activity simulation and modify the augmented reality instructions to generate a modified virtual object in response to the determination of the difference.

Abstract: In an example embodiment, one or more series of executable components may be configured to execute a respective processes, and one or more corresponding scheduling components may be configured to direct migration of each of the corresponding one or more series of executable components to a processing element thereof.

Abstract: Methods to facilitate monitoring the execution of a first instance and a second instance, such as multiple instantiations of a program, are generally described. The methods may include generating a first instance and a second instance, appending first monitoring instructions to the first instance to produce a first modified instance and appending second monitoring instructions to the second instance to produce a second modified instance. The first and second monitoring instructions may relate to monitoring an execution of the first instance and the second instance. The processor may further send the first modified instance to a first computing device and send the second modified instance to a second computing device different from the first computing device. The computing devices may provide different computational functionality and/or may split a load in processing the program.

Abstract: The disclosed technology receives at a second computing device a message from a first computing device comprising at least an indication of a physical motion, a requested motion, or an indication of a camera control operation. The indicated motion can correspond to a physical motion made to the first computing device. The indicated camera control operation can correspond to a camera control operation made at the first computing device. The technology requests to physically move the second computing device if the received message indicates a motion; and controls a digital camera associated with the second computing device if the received message indicates a camera control operation made at the first computing device.

Abstract: The disclosed technology receives at a second computing device a message from a first computing device comprising at least an indication of a physical motion, a requested motion, or an indication of a camera control operation. The indicated motion can correspond to a physical motion made to the first computing device. The indicated camera control operation can correspond to a camera control operation made at the first computing device. The technology requests to physically move the second computing device if the received message indicates a motion; and controls a digital camera associated with the second computing device if the received message indicates a camera control operation made at the first computing device.

Abstract: In an example embodiment, one or more series of executable components may be configured to execute a respective processes, and one or more corresponding scheduling components may be configured to direct migration of each of the corresponding one or more series of executable components to a processing element thereof.

Abstract: Technologies are generally described for systems and methods effective to detect an alteration in augmented reality. A processor may receive a real image that corresponds to a real object and may receive augmented reality instructions to generate a virtual object. The processor may determine that the virtual object at least partially obscures the real object when the virtual object is rendered on a display. The processor may, upon determining that the virtual object at least partially obscures the real object when the virtual object is rendered on the display, simulate an activity on the real object to produce a first activity simulation and simulate the activity on the virtual object to produce a second activity simulation. The processor may determine a difference between the first and the second activity simulation and modify the augmented reality instructions to generate a modified virtual object in response to the determination of the difference.

Abstract: Methods to facilitate monitoring the execution of a first instance and a second instance, such as multiple instantiations of a program, are generally described. The methods may include generating a first instance and a second instance, appending first monitoring instructions to the first instance to produce a first modified instance and appending second monitoring instructions to the second instance to produce a second modified instance. The first and second monitoring instructions may relate to monitoring an execution of the first instance and the second instance. The processor may further send the first modified instance to a first computing device and send the second modified instance to a second computing device different from the first computing device. The computing devices may provide different computational functionality and/or may split a load in processing the program.

Abstract: The disclosed technology receives at a second computing device a message from a first computing device comprising at least an indication of a physical motion, a requested motion, or an indication of a camera control operation. The indicated motion can correspond to a physical motion made to the first computing device. The indicated camera control operation can correspond to a camera control operation made at the first computing device. The technology requests to physically move the second computing device if the received message indicates a motion; and controls a digital camera associated with the second computing device if the received message indicates a camera control operation made at the first computing device.

Abstract: Technologies are generally described for systems and methods configured to produce an executable code. In some examples, a developer may send machine language code to a system manager. The machine language code may include two or more machine language blocks and linking information. The system manager may include a processor configured to permute the machine language blocks to produce permuted machine language code. The processor may modify the linking information based on the permuted machine language code to produce modified linking information. The processor may link the permuted machine language code with use of the modified linking information to produce the executable code.

Abstract: A technique for using memory attributes to relay information to a program or other agent. More particularly, embodiments of the invention relate to using memory attribute bits to check various memory properties in an efficient manner.

Abstract: A method and system to facilitate full throughput operation of cache memory line split accesses in a device. By facilitating full throughput operation of cache memory line split accesses in the device, the device minimizes the performance and throughput loss associated with the handling of non-aligned cache memory accesses that cross two or more cache memory lines and/or page memory boundaries in one embodiment of the invention. When the device receives a non-aligned cache memory access request, the merge logic combines or merges the incoming data of a particular cache memory line from a data cache memory with the stored data of the preceding cache memory line of the particular cache memory line.

Abstract: A method and system to facilitate full throughput operation of cache memory line split accesses in a device. By facilitating full throughput operation of cache memory line split accesses in the device, the device minimizes the performance and throughput loss associated with the handling of non-aligned cache memory accesses that cross two or more cache memory lines and/or page memory boundaries in one embodiment of the invention. When the device receives a non-aligned cache memory access request, the merge logic combines or merges the incoming data of a particular cache memory line from a data cache memory with the stored data of the preceding cache memory line of the particular cache memory line.

Abstract: Apparatuses and methods to perform data re-ordering are presented. In one embodiment, an apparatus comprises an input permutation unit, a multi-bank memory array, and an output permutation unit. The multi-bank memory array is coupled to receive data from the input permutation unit. The output permutation unit is coupled to receive data from the multi-bank memory array. The memory array comprises two or more memory rows. Each memory row comprises two or more memory elements.

Abstract: A technique for using memory attributes to relay information to a program or other agent. More particularly, embodiments of the invention relate to using memory attribute bits to check various memory properties in an efficient manner.

Abstract: A technique for using memory attributes to relay information to a program or other agent. More particularly, embodiments of the invention relate to using memory attribute bits to check various memory properties in an efficient manner.

Abstract: A method and apparatus for changing the configuration of a multi-core processor is disclosed. In one embodiment, a throttle module (or throttle logic) may determine the amount of parallelism present in the currently-executing program, and change the execution of the threads of that program on the various cores. If the amount of parallelism is high, then the processor may be configured to run a larger amount of threads on cores configured to consume less power. If the amount of parallelism is low, then the processor may be configured to run a smaller amount of threads on cores configured for greater scalar performance.

Abstract: A method and apparatus for a integrated circuit having flexible-ratio frequency domain cross-overs. In one embodiment, an integrated circuit has at least three cooperating frequency domains with variable operating frequencies. The integrated circuit includes cross-over logic to allow integral fraction ratio frequency domain cross-overs between more than one pair of frequency domains.