Patents by Inventor Gang Zhao

Gang Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230340000
    Abstract: Embodiments of the present application relate to functionalized N-acetylgalactosamine-analogs, methods of making, and uses of the same. In particular, mono or trivalent N-acetylgalactosamine analogs may be prepared by utilizing a wide variety of linkers containing functional groups. These functionalized N-acetylgalactosamine-analogs may be used in the preparation of targeted delivery of oligonucleotide-based therapeutics.
    Type: Application
    Filed: May 18, 2023
    Publication date: October 26, 2023
    Inventors: Wing C. POON, Gang ZHAO, Gengyu DU, Yun-Chiao YAO, Mufa ZOU, Xiaoyang GUAN, Xiaoling ZHENG, David YU, Ruiming ZOU, Aldrich N.K. LAU
  • Patent number: 11786629
    Abstract: The present invention relates to a polyvinyl alcohol/sodium alginate/hydroxyapatite composite fibrous membrane, and a preparation method and an application thereof. The preparation method of the composite fibrous membrane includes the following steps: firstly, reacting a diammonium hydrogen phosphate with a calcium nitrate to prepare a hydroxyapatite, and performing ultrasonic dispersion on the hydroxyapatite with a sodium alginate to form a stable hydroxyapatite suspension; separately preparing a sodium alginate solution of which the mass fraction is 2% and a polyvinyl alcohol solution of which the mass fraction is 18% using the above stable hydroxyapatite suspension; and finally, proportionally and uniformly mixing the two solutions, and performing electrospinning.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: October 17, 2023
    Assignee: WUHAN UNIVERSITY OF TECHNOLOGY
    Inventors: Yingchao Han, Gang Zhao, Honglian Dai
  • Publication number: 20230324457
    Abstract: A method for bit error rate testing a processing unit using a bit error rate tester (BERT) includes transmitting a signal pair to a receiver of the processing unit, the signal pair having jitter levels complying with a jitter threshold, tuning the signal pair to obtain a first stressed eye measurement for the receiver, wherein the first stressed eye measurement complies with a stressed eye mask, placing the processing unit into a loop-back mode, wherein data transmitted to the processing unit by the BERT is transmitted back to the BERT, transmitting a data pattern to the processing unit, receiving a looped back version of the data pattern from the processing unit, and calculating a bit error rate in accordance with the data pattern and the looped back version of the data pattern.
    Type: Application
    Filed: April 10, 2023
    Publication date: October 12, 2023
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Gang Zhao, Howard David, Xusheng Liu, Yongyao Li
  • Patent number: 11781714
    Abstract: An LED-filament comprising: a partially light transmissive substrate; a plurality of LED chips on a front face of the substrate; a photoluminescence material that is in direct contact with and covers all of the plurality of LED chips; and a light scattering layer that is in direct contact with and covers at least the photoluminescence material, wherein the light scattering layer comprises particles of light scattering material, and wherein the photoluminescence material comprises broadband green to red photoluminescence materials and narrowband red photoluminescence material.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: October 10, 2023
    Assignee: Bridgelux, Inc.
    Inventors: Gang Wang, Jun-Gang Zhao, Yi-Qun Li
  • Patent number: 11774928
    Abstract: An interventional control method based on a computer control system. An interventional control system is designed on the basis of an original computer control system; the analog-to-digital conversion unit of the interventional control system receives a signal from the data acquisition module of the original computer control system and said signal is processed by a control processing unit according to a built-in program; then a digital-to-analog conversion unit performs digital-to-analog conversion on the signal output by the control processing unit and then outputs a signal obtained after the digital-to-analog conversion to the analog-to-digital conversion unit of the original computer control system.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: October 3, 2023
    Assignee: Puyang Baifu Reide Petroleum Science and Technology Company Limited
    Inventors: Gang Zhao, Chen Chen, Chun Yu, Yulong Xia, Yingdong Zhang
  • Publication number: 20230290759
    Abstract: There is provided a full spectrum white light emitting device comprising: a broadband LED flip chip that generates broadband light of dominant wavelength from about 420 nm to about 480 nm and a FWHM from 25 nm to 50 nm; and at least one photoluminescence layer covering a light emitting face of the broadband LED flip chip; wherein the broadband LED flip chip comprises a broadband InGaN/GaN multiple quantum wells LED chip comprising multiple different wavelength quantum wells in its active region that generate multiple narrowband light emissions of multiple different wavelengths and wherein broadband light generated by the broadband LED flip chip is composed of a combination of the multiple narrowband light emissions, and wherein the at least one photoluminescence material layer comprises a first photoluminescence material which generates light with a peak emission wavelength from 490 nm to 550 nm; and a second photoluminescence material which generates light with a peak emission wavelength from 600 nm to 680 n
    Type: Application
    Filed: February 6, 2023
    Publication date: September 14, 2023
    Inventors: Yi-Qun Li, Xianglong Yuan, Jun-Gang Zhao
  • Publication number: 20230279041
    Abstract: Embodiments of the present application relate to functionalized N-acetylgalactosamine-analogs, methods of making, and uses of the same. In particular, mono or trivalent N-acetylgalactosamine analogs may be prepared by utilizing a wide variety of linkers containing functional groups. These functionalized N-acetylgalactosamine-analogs may be used in the preparation of targeted delivery of oligonucleotide-based therapeutics.
    Type: Application
    Filed: December 13, 2022
    Publication date: September 7, 2023
    Inventors: Wing C. Poon, Xiaoyang Guan, David Yu, Ruiming Zou, Xiaojun Li, Michael Su, Gang Zhao, Gengyu Du, Yun-Chiao Yao
  • Publication number: 20230282054
    Abstract: A sheet-type medium accumulating and separating device includes a frame and a paper pressing mechanism. The frame is provided with an storage cavity for accommodating sheet-type media. The storage cavity is provided with a paper inlet, a paper outlet, and a paper kicking roller. A paper supporting plate for supporting the media is further provided in the storage cavity. The paper pressing mechanism includes a paper pressing plate and a driving assembly. The paper pressing plate is provided with a first position and a second position arranged in the direction of stacking. The paper pressing plate includes a paper pressing part arranged within the storage cavity. The driving assembly is in transmission connection with the paper pressing plate. When the paper pressing plate is in the first position, the paper pressing part is adjacent to the paper outlet, to press the sheet-type media towards the paper kicking roller.
    Type: Application
    Filed: July 9, 2021
    Publication date: September 7, 2023
    Inventors: Lei Zheng, Jianyu Sun, Chuntao Wang, Gang Zhao, Bingqing Liu
  • Patent number: 11726695
    Abstract: Systems, apparatus and methods are provided for electrical mirroring implemented by a storage controller in a non-volatile storage system. In one embodiment, a non-volatile storage system may comprise a plurality of non-volatile storage devices and a storage controller. The storage controller may be configured to perform an electrical mirroring configuration process comprising: determining a system topology of the non-volatile storage system and which targets are in mirrored non-volatile storage devices and setting respective register bits in the storage controller for all targets in all mirrored non-volatile storage devices of the plurality of non-volatile storage devices.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: August 15, 2023
    Assignee: Innogrit Technologies Co., Ltd.
    Inventors: Gang Zhao, Jie Chen, Lin Chen, Wei Jiang
  • Patent number: 11709789
    Abstract: Systems, apparatus and methods are provided for multi-drop multi-load NAND interface topology where a number of NAND flash devices share a common data bus with a NAND controller. A method for controlling on-die termination in a non-volatile storage device may comprise receiving a chip enable signal on a chip enable signal line from a controller, receiving an on-die termination (ODT) command on a data bus from the controller while the chip enable signal is on, decoding the on-die termination command and applying termination resistor (RTT) settings in the ODT command to a selected non-volatile storage unit at the non-volatile storage device to enable ODT for the selected non-volatile storage unit.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: July 25, 2023
    Assignee: Innogrit Technologies Co., Ltd.
    Inventors: Gang Zhao, Wei Jiang, Jie Chen, Lin Chen
  • Patent number: 11706878
    Abstract: The present disclosure discloses a multilayer circuit board comprising a plurality of metal layers, a blind via and/or a buried via, the multilayer circuit board is capable of transmitting signal between the different metal layers. The blind via has a pad on a non-opening side of the blind via. An upper or lower layer metal layer on the non-opening side of the blind via adjacent to the blind via has a first hole which is located in a position corresponding to the pad on the non-opening side of the blind via in a depth direction of the blind via; and/or an upper and/or lower layer adjacent to the buried via has a second hole which is located in a position corresponding to the pad of an upper and/or lower orifice of the buried via in a depth direction of the buried via.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: July 18, 2023
    Assignee: INNOGRIT TECHNOLOGIES CO., LTD.
    Inventors: Yanwen Bai, Shiann-Ming Liou, Gang Zhao, Lin Chen
  • Patent number: 11692001
    Abstract: Embodiments of the present application relate to functionalized N-acetylgalactosamine-analogs, methods of making, and uses of the same. In particular, mono or trivalent N-acetylgalactosamine analogs may be prepared by utilizing a wide variety of linkers containing functional groups. These functionalized N-acetylgalactosamine-analogs may be used in the preparation of targeted delivery of oligonucleotide-based therapeutics.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: July 4, 2023
    Assignee: Hongene Biotech Corporation
    Inventors: Wing C. Poon, Gang Zhao, Gengyu Du, Yun-Chiao Yao, Mufa Zou, Xiaoyang Guan, Xiaoling Zheng, David Yu, Ruiming Zou, Aldrich N. K. Lau
  • Publication number: 20230150087
    Abstract: A polishing apparatus includes a polishing device, a polishing fixing device, and a controller. The polishing fixing device includes a rotating mechanism, a sensor, a movement compensation assembly, a first moving assembly and a second moving assembly. The sensor in the polishing fixing device senses pressure applied to the workpiece during polishing, the movement compensation assembly can drive the rotating mechanism to move in compensation, so as to keep the polishing pressure within a certain range for uniformity in polishing, improving the polishing quality and production efficiency of the workpiece.
    Type: Application
    Filed: November 15, 2022
    Publication date: May 18, 2023
    Inventors: ZHI-GANG ZHAO, HSING-CHIH HSU, BIN LIU, CHONG-ZHEN WANG, LANG DING, XING-LONG ZHANG, ZHAO-HENG MENG, ZHI PENG
  • Patent number: 11649260
    Abstract: Embodiments of the present application relate to N-acetylgalactosamine-conjugated nucleosides. In particular, the N-acetylgalactosamine is installed on the nucleobase of the nucleosides through a wide variety of linkers. Methods of making N-acetylgalactosamine-conjugated nucleosides are also disclosed herein. N-acetylgalactosamine is a well-defined liver-targeted moiety and N-acetylgalactosamine-conjugated nucleosides may be used in the preparation of targeted delivery of oligonucleotide-based therapeutics.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: May 16, 2023
    Assignee: Hongene Biotech Corporation
    Inventors: Xiaoyang Guan, David Yu, Ruiming Zou, Xiaoling Zheng, John Liu, Aldrich N. K. Lau, Wing C. Poon, Gang Zhao, Gengyu Du, Yun-Chiao Yao
  • Publication number: 20230133278
    Abstract: Systems, apparatus and methods are provided for managing a removable solid state storage system for data loss prevention. A method may include maintaining a standby mode for a timer of the removable solid state storage system until the removable solid state storage system is disconnected from an external power supply, setting an operation time interval on the timer, using the timer to count how long the removable solid state storage system has been disconnected, sending an interrupt to a storage controller of the removable solid state storage system from the timer when the timer counts to the operation time Interval, and performing data loss prevention operations using a power supplied by a removable battery.
    Type: Application
    Filed: November 1, 2021
    Publication date: May 4, 2023
    Inventors: Gang ZHAO, Wei JIANG, Lin CHEN
  • Patent number: 11624780
    Abstract: A method for bit error rate testing a processing unit using a bit error rate tester (BERT) includes transmitting a signal pair to a receiver of the processing unit, the signal pair having jitter levels complying with a jitter threshold, tuning the signal pair to obtain a first stressed eye measurement for the receiver, wherein the first stressed eye measurement complies with a stressed eye mask, placing the processing unit into a loop-back mode, wherein data transmitted to the processing unit by the BERT is transmitted back to the BERT, transmitting a data pattern to the processing unit, receiving a looped back version of the data pattern from the processing unit, and calculating a bit error rate in accordance with the data pattern and the looped back version of the data pattern.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: April 11, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Gang Zhao, Howard David, Xusheng Liu, Yongyao Li
  • Publication number: 20230106101
    Abstract: Systems, apparatus and methods are provided for selecting a performance profile for a storage system. A method may include: generating a set of performance profiles for a non-volatile storage system, performing a thermal calibration by running a first test under a first performance profile and a second test under a second performance profile, obtaining a first maximum temperature under the first performance profile and a second maximum temperature under the second performance profile, selecting an optimal performance profile from the set of performance profiles based on comparing the first maximum temperature and the second maximum temperature to a predetermined threshold value and operating the non-volatile storage system under the optimal performance profile. Each of the set of performance profiles may include settings for hardware components of the non-volatile storage system.
    Type: Application
    Filed: October 2, 2021
    Publication date: April 6, 2023
    Inventors: Gang ZHAO, Lin CHEN, Wei JIANG
  • Patent number: D987705
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: May 30, 2023
    Assignee: SHENZHEN HOLATEK CO., LTD.
    Inventors: Luwei Ma, Dilong He, Qianshang Chen, Yusen Wang, Haitian Wang, Enyang Zhu, Jiachen Liu, Gang Zhao, Zhenyu Hu
  • Patent number: D992631
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: July 18, 2023
    Assignee: SHENZHEN HOLATEK CO., LTD.
    Inventors: Dilong He, Qianshang Chen, Luwei Ma, Yusen Wang, Haitian Wang, Enyang Zhu, Gang Zhao, Xuanyi Zhao
  • Patent number: D996504
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: August 22, 2023
    Assignee: SHENZHEN HOLATEK CO., LTD.
    Inventors: Haitian Wang, Gang Zhao, Sidney Wilson Nai, Enyang Zhu, Jiachen Liu, Zhenyu Hu