Patents by Inventor Gary Paek

Gary Paek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9423895
    Abstract: For one disclosed embodiment, an apparatus includes a first housing and a second housing coupled to the first housing. The first housing and the second housing are rotatable between an open configuration and a closed configuration. The apparatus further includes and a touch input device supported by the first housing. The touch input device is configured to have a first active touch surface when the first housing and the second housing are in the open configuration, and a second active touch surface when the first housing and the second housing are in the closed configuration. The first active touch surface is smaller than the second active touch surface.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: August 23, 2016
    Assignee: Intel Corporation
    Inventors: Peter S. Adamson, Gary Paek, Nicholas W. Oakley, John J. Valavi
  • Patent number: 9292114
    Abstract: For one disclosed embodiment, an apparatus includes a first housing and a touch input device supported by the first housing. The touch input device includes a first touch surface layer, a second touch surface layer, and a touch sensor disposed between the first touch surface layer and the second touch surface layer. The touch sensor is configured to detect a first touch input associated with the first touch surface layer and a second touch input associated with the second touch surface layer.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: March 22, 2016
    Assignee: Intel Corporation
    Inventors: Peter S Adamson, Gary Paek, Nicholas W Oakley, John J Valavi
  • Publication number: 20130321287
    Abstract: For one disclosed embodiment, an apparatus includes a first housing and a touch input device supported by the first housing. The touch input device includes a first touch surface layer, a second touch surface layer, and a touch sensor disposed between the first touch surface layer and the second touch surface layer. The touch sensor is configured to detect a first touch input associated with the first touch surface layer and a second touch input associated with the second touch surface layer.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 5, 2013
    Inventors: Peter S. Adamson, Gary Paek, Nicholas W. Oakley, John J. Valavi
  • Publication number: 20130321288
    Abstract: For one disclosed embodiment, an apparatus includes a first housing and a second housing coupled to the first housing. The first housing and the second housing are rotatable between an open configuration and a closed configuration. The apparatus further includes and a touch input device supported by the first housing. The touch input device is configured to have a first active touch surface when the first housing and the second housing are in the open configuration, and a second active touch surface when the first housing and the second housing are in the closed configuration. The first active touch surface is smaller than the second active touch surface.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 5, 2013
    Inventors: Peter S. Adamson, Gary Paek, Nicholas W. Oakley, John J. Valavi
  • Patent number: 7147141
    Abstract: A method for providing an improved solder joint for a via-in-pad ball grid array package. One or more bonding pads are formed upon a substrate. One or more vias are formed through the substrate within the bonding pad. The vias are plugged with a via plug material. The via plug material is then preconditioned such that an amount of volatiles within the via plug material is reduced.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: December 12, 2006
    Assignee: Intel Corporation
    Inventors: Daryl Sato, Gary Paek, John Dungan, David W. Boggs
  • Publication number: 20040219342
    Abstract: An electronic substrate for interconnecting electronic components comprises a substrate having one or more conductive inner layers and one or more interconnect cavities extending into the substrate to expose one or more of the inner layers.
    Type: Application
    Filed: December 31, 2003
    Publication date: November 4, 2004
    Inventors: David W. Boggs, Daryl A. Sato, John H. Dungan, Gary Paek
  • Publication number: 20040089700
    Abstract: A method for providing an improved solder joint for a via-in-pad ball grid array package. One or more bonding pads are formed upon a substrate. One or more vias are formed through the substrate within the bonding pad. The vias are plugged with a via plug material. The via plug material is then preconditioned such that an amount of volatiles within the via plug material is reduced.
    Type: Application
    Filed: November 13, 2002
    Publication date: May 13, 2004
    Inventors: Daryl Sato, Gary Paek, John Dungan, David W. Boggs
  • Patent number: D691995
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: October 22, 2013
    Assignee: Intel Corporation
    Inventors: Peter Adamson, Gary Paek, Nicholas Oakley
  • Patent number: D694232
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: November 26, 2013
    Assignee: Intel Corporation
    Inventors: Peter Adamson, Gary Paek, Nicholas Oakley
  • Patent number: D698350
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: January 28, 2014
    Assignee: Intel Corporation
    Inventors: Peter Adamson, Gary Paek, Nicholas Oakley
  • Patent number: D698778
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: February 4, 2014
    Assignee: Intel Corporation
    Inventors: Peter Adamson, Gary Paek, Nicholas Oakley
  • Patent number: D701501
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: March 25, 2014
    Assignee: Intel Corporation
    Inventors: Peter Adamson, Gary Paek, Nicholas Oakley
  • Patent number: D729791
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: May 19, 2015
    Assignee: Intel Corporation
    Inventors: Peter Adamson, Gary Paek, Nicholas Oakley
  • Patent number: D739398
    Type: Grant
    Filed: November 24, 2013
    Date of Patent: September 22, 2015
    Assignee: Intel Corporation
    Inventors: Peter Adamson, Gary Paek, Nicholas Oakley
  • Patent number: D739399
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: September 22, 2015
    Assignee: Intel Corporation
    Inventors: Peter S. Adamson, Gary Paek, Nicholas W. Oakley
  • Patent number: D739400
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: September 22, 2015
    Assignee: Intel Corporation
    Inventors: Peter S. Adamson, Gary Paek, Nicholas W. Oakley
  • Patent number: D749562
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: February 16, 2016
    Assignee: Intel Corporation
    Inventors: Peter S. Adamson, Gary Paek, Nicholas W. Oakley